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-rw-r--r--contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp54
1 files changed, 9 insertions, 45 deletions
diff --git a/contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp b/contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp
index ee32093..7d961a2 100644
--- a/contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp
+++ b/contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp
@@ -100,9 +100,6 @@ namespace {
void getAnalysisUsage(AnalysisUsage &AU) const override {
MachineFunctionPass::getAnalysisUsage(AU);
}
-
- private:
- void ChangeOpInto(MachineOperand &Dst, MachineOperand &Src);
};
}
@@ -132,7 +129,9 @@ bool HexagonPeephole::runOnMachineFunction(MachineFunction &MF) {
PeepholeDoubleRegsMap.clear();
// Traverse the basic block.
- for (MachineInstr &MI : *MBB) {
+ for (auto I = MBB->begin(), E = MBB->end(), NextI = I; I != E; I = NextI) {
+ NextI = std::next(I);
+ MachineInstr &MI = *I;
// Look for sign extends:
// %vreg170<def> = SXTW %vreg166
if (!DisableOptSZExt && MI.getOpcode() == Hexagon::A2_sxtw) {
@@ -280,14 +279,13 @@ bool HexagonPeephole::runOnMachineFunction(MachineFunction &MF) {
if (NewOp) {
unsigned PSrc = MI.getOperand(PR).getReg();
if (unsigned POrig = PeepholeMap.lookup(PSrc)) {
- MI.getOperand(PR).setReg(POrig);
+ BuildMI(*MBB, MI.getIterator(), MI.getDebugLoc(),
+ QII->get(NewOp), MI.getOperand(0).getReg())
+ .addReg(POrig)
+ .add(MI.getOperand(S2))
+ .add(MI.getOperand(S1));
MRI->clearKillFlags(POrig);
- MI.setDesc(QII->get(NewOp));
- // Swap operands S1 and S2.
- MachineOperand Op1 = MI.getOperand(S1);
- MachineOperand Op2 = MI.getOperand(S2);
- ChangeOpInto(MI.getOperand(S1), Op2);
- ChangeOpInto(MI.getOperand(S2), Op1);
+ MI.eraseFromParent();
}
} // if (NewOp)
} // if (!Done)
@@ -299,40 +297,6 @@ bool HexagonPeephole::runOnMachineFunction(MachineFunction &MF) {
return true;
}
-void HexagonPeephole::ChangeOpInto(MachineOperand &Dst, MachineOperand &Src) {
- assert (&Dst != &Src && "Cannot duplicate into itself");
- switch (Dst.getType()) {
- case MachineOperand::MO_Register:
- if (Src.isReg()) {
- Dst.setReg(Src.getReg());
- Dst.setSubReg(Src.getSubReg());
- MRI->clearKillFlags(Src.getReg());
- } else if (Src.isImm()) {
- Dst.ChangeToImmediate(Src.getImm());
- } else {
- llvm_unreachable("Unexpected src operand type");
- }
- break;
-
- case MachineOperand::MO_Immediate:
- if (Src.isImm()) {
- Dst.setImm(Src.getImm());
- } else if (Src.isReg()) {
- Dst.ChangeToRegister(Src.getReg(), Src.isDef(), Src.isImplicit(),
- false, Src.isDead(), Src.isUndef(),
- Src.isDebug());
- Dst.setSubReg(Src.getSubReg());
- } else {
- llvm_unreachable("Unexpected src operand type");
- }
- break;
-
- default:
- llvm_unreachable("Unexpected dst operand type");
- break;
- }
-}
-
FunctionPass *llvm::createHexagonPeephole() {
return new HexagonPeephole();
}
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