diff options
Diffstat (limited to 'contrib/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp')
| -rw-r--r-- | contrib/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp b/contrib/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp index a5dc002..072501d 100644 --- a/contrib/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp +++ b/contrib/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp @@ -39,7 +39,7 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol, // Populate the relocation type based on Hexagon target flags // set on an operand MCSymbolRefExpr::VariantKind RelocationType; - switch (MO.getTargetFlags()) { + switch (MO.getTargetFlags() & ~HexagonII::HMOTF_ConstExtended) { default: RelocationType = MCSymbolRefExpr::VK_None; break; @@ -109,11 +109,14 @@ void llvm::HexagonLowerToMC(const MCInstrInfo &MCII, const MachineInstr *MI, switch (MO.getType()) { default: - MI->dump(); + MI->print(errs()); llvm_unreachable("unknown operand type"); + case MachineOperand::MO_RegisterMask: + continue; case MachineOperand::MO_Register: // Ignore all implicit register operands. - if (MO.isImplicit()) continue; + if (MO.isImplicit()) + continue; MCO = MCOperand::createReg(MO.getReg()); break; case MachineOperand::MO_FPImmediate: { |
