diff options
Diffstat (limited to 'contrib/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp')
-rw-r--r-- | contrib/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp | 121 |
1 files changed, 64 insertions, 57 deletions
diff --git a/contrib/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp b/contrib/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp index 3cb9021..3ccde79 100644 --- a/contrib/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp +++ b/contrib/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp @@ -31,8 +31,8 @@ using namespace llvm; namespace { -static bool isCFAlu(const MachineInstr *MI) { - switch (MI->getOpcode()) { +static bool isCFAlu(const MachineInstr &MI) { + switch (MI.getOpcode()) { case AMDGPU::CF_ALU: case AMDGPU::CF_ALU_PUSH_BEFORE: return true; @@ -47,19 +47,19 @@ private: static char ID; const R600InstrInfo *TII; - unsigned getCFAluSize(const MachineInstr *MI) const; - bool isCFAluEnabled(const MachineInstr *MI) const; + unsigned getCFAluSize(const MachineInstr &MI) const; + bool isCFAluEnabled(const MachineInstr &MI) const; /// IfCvt pass can generate "disabled" ALU clause marker that need to be /// removed and their content affected to the previous alu clause. /// This function parse instructions after CFAlu until it find a disabled /// CFAlu and merge the content, or an enabled CFAlu. - void cleanPotentialDisabledCFAlu(MachineInstr *CFAlu) const; + void cleanPotentialDisabledCFAlu(MachineInstr &CFAlu) const; /// Check whether LatrCFAlu can be merged into RootCFAlu and do it if /// it is the case. - bool mergeIfPossible(MachineInstr *RootCFAlu, const MachineInstr *LatrCFAlu) - const; + bool mergeIfPossible(MachineInstr &RootCFAlu, + const MachineInstr &LatrCFAlu) const; public: R600ClauseMergePass(TargetMachine &tm) : MachineFunctionPass(ID) { } @@ -71,38 +71,40 @@ public: char R600ClauseMergePass::ID = 0; -unsigned R600ClauseMergePass::getCFAluSize(const MachineInstr *MI) const { +unsigned R600ClauseMergePass::getCFAluSize(const MachineInstr &MI) const { assert(isCFAlu(MI)); - return MI->getOperand( - TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm(); + return MI + .getOperand(TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::COUNT)) + .getImm(); } -bool R600ClauseMergePass::isCFAluEnabled(const MachineInstr *MI) const { +bool R600ClauseMergePass::isCFAluEnabled(const MachineInstr &MI) const { assert(isCFAlu(MI)); - return MI->getOperand( - TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm(); + return MI + .getOperand(TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::Enabled)) + .getImm(); } -void R600ClauseMergePass::cleanPotentialDisabledCFAlu(MachineInstr *CFAlu) - const { +void R600ClauseMergePass::cleanPotentialDisabledCFAlu( + MachineInstr &CFAlu) const { int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT); - MachineBasicBlock::iterator I = CFAlu, E = CFAlu->getParent()->end(); + MachineBasicBlock::iterator I = CFAlu, E = CFAlu.getParent()->end(); I++; do { - while (I!= E && !isCFAlu(I)) + while (I != E && !isCFAlu(*I)) I++; if (I == E) return; - MachineInstr *MI = I++; + MachineInstr &MI = *I++; if (isCFAluEnabled(MI)) break; - CFAlu->getOperand(CntIdx).setImm(getCFAluSize(CFAlu) + getCFAluSize(MI)); - MI->eraseFromParent(); + CFAlu.getOperand(CntIdx).setImm(getCFAluSize(CFAlu) + getCFAluSize(MI)); + MI.eraseFromParent(); } while (I != E); } -bool R600ClauseMergePass::mergeIfPossible(MachineInstr *RootCFAlu, - const MachineInstr *LatrCFAlu) const { +bool R600ClauseMergePass::mergeIfPossible(MachineInstr &RootCFAlu, + const MachineInstr &LatrCFAlu) const { assert(isCFAlu(RootCFAlu) && isCFAlu(LatrCFAlu)); int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT); unsigned RootInstCount = getCFAluSize(RootCFAlu), @@ -112,7 +114,7 @@ bool R600ClauseMergePass::mergeIfPossible(MachineInstr *RootCFAlu, DEBUG(dbgs() << "Excess inst counts\n"); return false; } - if (RootCFAlu->getOpcode() == AMDGPU::CF_ALU_PUSH_BEFORE) + if (RootCFAlu.getOpcode() == AMDGPU::CF_ALU_PUSH_BEFORE) return false; // Is KCache Bank 0 compatible ? int Mode0Idx = @@ -121,12 +123,12 @@ bool R600ClauseMergePass::mergeIfPossible(MachineInstr *RootCFAlu, TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK0); int KBank0LineIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR0); - if (LatrCFAlu->getOperand(Mode0Idx).getImm() && - RootCFAlu->getOperand(Mode0Idx).getImm() && - (LatrCFAlu->getOperand(KBank0Idx).getImm() != - RootCFAlu->getOperand(KBank0Idx).getImm() || - LatrCFAlu->getOperand(KBank0LineIdx).getImm() != - RootCFAlu->getOperand(KBank0LineIdx).getImm())) { + if (LatrCFAlu.getOperand(Mode0Idx).getImm() && + RootCFAlu.getOperand(Mode0Idx).getImm() && + (LatrCFAlu.getOperand(KBank0Idx).getImm() != + RootCFAlu.getOperand(KBank0Idx).getImm() || + LatrCFAlu.getOperand(KBank0LineIdx).getImm() != + RootCFAlu.getOperand(KBank0LineIdx).getImm())) { DEBUG(dbgs() << "Wrong KC0\n"); return false; } @@ -137,56 +139,61 @@ bool R600ClauseMergePass::mergeIfPossible(MachineInstr *RootCFAlu, TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK1); int KBank1LineIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR1); - if (LatrCFAlu->getOperand(Mode1Idx).getImm() && - RootCFAlu->getOperand(Mode1Idx).getImm() && - (LatrCFAlu->getOperand(KBank1Idx).getImm() != - RootCFAlu->getOperand(KBank1Idx).getImm() || - LatrCFAlu->getOperand(KBank1LineIdx).getImm() != - RootCFAlu->getOperand(KBank1LineIdx).getImm())) { + if (LatrCFAlu.getOperand(Mode1Idx).getImm() && + RootCFAlu.getOperand(Mode1Idx).getImm() && + (LatrCFAlu.getOperand(KBank1Idx).getImm() != + RootCFAlu.getOperand(KBank1Idx).getImm() || + LatrCFAlu.getOperand(KBank1LineIdx).getImm() != + RootCFAlu.getOperand(KBank1LineIdx).getImm())) { DEBUG(dbgs() << "Wrong KC0\n"); return false; } - if (LatrCFAlu->getOperand(Mode0Idx).getImm()) { - RootCFAlu->getOperand(Mode0Idx).setImm( - LatrCFAlu->getOperand(Mode0Idx).getImm()); - RootCFAlu->getOperand(KBank0Idx).setImm( - LatrCFAlu->getOperand(KBank0Idx).getImm()); - RootCFAlu->getOperand(KBank0LineIdx).setImm( - LatrCFAlu->getOperand(KBank0LineIdx).getImm()); + if (LatrCFAlu.getOperand(Mode0Idx).getImm()) { + RootCFAlu.getOperand(Mode0Idx).setImm( + LatrCFAlu.getOperand(Mode0Idx).getImm()); + RootCFAlu.getOperand(KBank0Idx).setImm( + LatrCFAlu.getOperand(KBank0Idx).getImm()); + RootCFAlu.getOperand(KBank0LineIdx) + .setImm(LatrCFAlu.getOperand(KBank0LineIdx).getImm()); } - if (LatrCFAlu->getOperand(Mode1Idx).getImm()) { - RootCFAlu->getOperand(Mode1Idx).setImm( - LatrCFAlu->getOperand(Mode1Idx).getImm()); - RootCFAlu->getOperand(KBank1Idx).setImm( - LatrCFAlu->getOperand(KBank1Idx).getImm()); - RootCFAlu->getOperand(KBank1LineIdx).setImm( - LatrCFAlu->getOperand(KBank1LineIdx).getImm()); + if (LatrCFAlu.getOperand(Mode1Idx).getImm()) { + RootCFAlu.getOperand(Mode1Idx).setImm( + LatrCFAlu.getOperand(Mode1Idx).getImm()); + RootCFAlu.getOperand(KBank1Idx).setImm( + LatrCFAlu.getOperand(KBank1Idx).getImm()); + RootCFAlu.getOperand(KBank1LineIdx) + .setImm(LatrCFAlu.getOperand(KBank1LineIdx).getImm()); } - RootCFAlu->getOperand(CntIdx).setImm(CumuledInsts); - RootCFAlu->setDesc(TII->get(LatrCFAlu->getOpcode())); + RootCFAlu.getOperand(CntIdx).setImm(CumuledInsts); + RootCFAlu.setDesc(TII->get(LatrCFAlu.getOpcode())); return true; } bool R600ClauseMergePass::runOnMachineFunction(MachineFunction &MF) { - TII = static_cast<const R600InstrInfo *>(MF.getSubtarget().getInstrInfo()); + if (skipFunction(*MF.getFunction())) + return false; + + const R600Subtarget &ST = MF.getSubtarget<R600Subtarget>(); + TII = ST.getInstrInfo(); + for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end(); BB != BB_E; ++BB) { MachineBasicBlock &MBB = *BB; MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); MachineBasicBlock::iterator LatestCFAlu = E; while (I != E) { - MachineInstr *MI = I++; + MachineInstr &MI = *I++; if ((!TII->canBeConsideredALU(MI) && !isCFAlu(MI)) || - TII->mustBeLastInClause(MI->getOpcode())) + TII->mustBeLastInClause(MI.getOpcode())) LatestCFAlu = E; if (!isCFAlu(MI)) continue; cleanPotentialDisabledCFAlu(MI); - if (LatestCFAlu != E && mergeIfPossible(LatestCFAlu, MI)) { - MI->eraseFromParent(); + if (LatestCFAlu != E && mergeIfPossible(*LatestCFAlu, MI)) { + MI.eraseFromParent(); } else { - assert(MI->getOperand(8).getImm() && "CF ALU instruction disabled"); + assert(MI.getOperand(8).getImm() && "CF ALU instruction disabled"); LatestCFAlu = MI; } } |