summaryrefslogtreecommitdiffstats
path: root/Bindings/arm/cpus.txt
diff options
context:
space:
mode:
Diffstat (limited to 'Bindings/arm/cpus.txt')
-rw-r--r--Bindings/arm/cpus.txt37
1 files changed, 35 insertions, 2 deletions
diff --git a/Bindings/arm/cpus.txt b/Bindings/arm/cpus.txt
index 9130435..298e2f6 100644
--- a/Bindings/arm/cpus.txt
+++ b/Bindings/arm/cpus.txt
@@ -152,7 +152,9 @@ nodes to be present and contain the properties described below.
"arm,cortex-a7"
"arm,cortex-a8"
"arm,cortex-a9"
+ "arm,cortex-a12"
"arm,cortex-a15"
+ "arm,cortex-a17"
"arm,cortex-a53"
"arm,cortex-a57"
"arm,cortex-m0"
@@ -163,6 +165,7 @@ nodes to be present and contain the properties described below.
"arm,cortex-r4"
"arm,cortex-r5"
"arm,cortex-r7"
+ "brcm,brahma-b15"
"faraday,fa526"
"intel,sa110"
"intel,sa1100"
@@ -178,9 +181,20 @@ nodes to be present and contain the properties described below.
Usage and definition depend on ARM architecture version.
# On ARM v8 64-bit this property is required and must
be one of:
- "spin-table"
"psci"
- # On ARM 32-bit systems this property is optional.
+ "spin-table"
+ # On ARM 32-bit systems this property is optional and
+ can be one of:
+ "allwinner,sun6i-a31"
+ "arm,psci"
+ "brcm,brahma-b15"
+ "marvell,armada-375-smp"
+ "marvell,armada-380-smp"
+ "marvell,armada-xp-smp"
+ "qcom,gcc-msm8660"
+ "qcom,kpss-acc-v1"
+ "qcom,kpss-acc-v2"
+ "rockchip,rk3066-smp"
- cpu-release-addr
Usage: required for systems that have an "enable-method"
@@ -191,6 +205,21 @@ nodes to be present and contain the properties described below.
property identifying a 64-bit zero-initialised
memory location.
+ - qcom,saw
+ Usage: required for systems that have an "enable-method"
+ property value of "qcom,kpss-acc-v1" or
+ "qcom,kpss-acc-v2"
+ Value type: <phandle>
+ Definition: Specifies the SAW[1] node associated with this CPU.
+
+ - qcom,acc
+ Usage: required for systems that have an "enable-method"
+ property value of "qcom,kpss-acc-v1" or
+ "qcom,kpss-acc-v2"
+ Value type: <phandle>
+ Definition: Specifies the ACC[2] node associated with this CPU.
+
+
Example 1 (dual-cluster big.LITTLE system 32-bit):
cpus {
@@ -382,3 +411,7 @@ cpus {
cpu-release-addr = <0 0x20000000>;
};
};
+
+--
+[1] arm/msm/qcom,saw2.txt
+[2] arm/msm/qcom,kpss-acc.txt
OpenPOWER on IntegriCloud