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-rw-r--r--sys/amd64/amd64/apic_vector.S2
-rw-r--r--sys/amd64/amd64/local_apic.c16
-rw-r--r--sys/amd64/include/apicvar.h24
-rw-r--r--sys/amd64/include/intr_machdep.h4
-rw-r--r--sys/i386/i386/apic_vector.s2
-rw-r--r--sys/i386/i386/local_apic.c16
-rw-r--r--sys/i386/include/apicvar.h24
-rw-r--r--sys/i386/include/intr_machdep.h4
8 files changed, 54 insertions, 38 deletions
diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S
index ee17996..ecc4c67 100644
--- a/sys/amd64/amd64/apic_vector.S
+++ b/sys/amd64/amd64/apic_vector.S
@@ -117,6 +117,8 @@ MCOUNT_LABEL(bintr2)
ISR_VEC(3, apic_isr3)
ISR_VEC(4, apic_isr4)
ISR_VEC(5, apic_isr5)
+ ISR_VEC(6, apic_isr6)
+ ISR_VEC(7, apic_isr7)
MCOUNT_LABEL(eintr2)
#ifdef SMP
diff --git a/sys/amd64/amd64/local_apic.c b/sys/amd64/amd64/local_apic.c
index 3fb7f76..6f942bf 100644
--- a/sys/amd64/amd64/local_apic.c
+++ b/sys/amd64/amd64/local_apic.c
@@ -59,6 +59,10 @@ __FBSDID("$FreeBSD$");
*/
#define MAX_APICID 16
+/* Sanity checks on IDT vectors. */
+CTASSERT(APIC_IO_INTS + APIC_NUM_IOINTS <= APIC_LOCAL_INTS);
+CTASSERT(IPI_STOP < APIC_SPURIOUS_INT);
+
/*
* Support for local APICs. Local APICs manage interrupts on each
* individual processor as opposed to I/O APICs which receive interrupts
@@ -104,8 +108,8 @@ static inthand_t *ioint_handlers[] = {
IDTVEC(apic_isr3), /* 96 - 127 */
IDTVEC(apic_isr4), /* 128 - 159 */
IDTVEC(apic_isr5), /* 160 - 191 */
- NULL, /* 192 - 223 */
- NULL /* 224 - 255 */
+ IDTVEC(apic_isr6), /* 192 - 223 */
+ IDTVEC(apic_isr7), /* 224 - 255 */
};
volatile lapic_t *lapic;
@@ -491,7 +495,7 @@ apic_irq_to_idt(u_int irq)
u_int vector;
KASSERT(irq < NUM_IO_INTS, ("Invalid IRQ %u", irq));
- vector = irq + IDT_IO_INTS;
+ vector = irq + APIC_IO_INTS;
if (vector >= IDT_SYSCALL)
vector++;
return (vector);
@@ -501,12 +505,12 @@ u_int
apic_idt_to_irq(u_int vector)
{
- KASSERT(vector >= IDT_IO_INTS && vector != IDT_SYSCALL &&
- vector <= IDT_IO_INTS + NUM_IO_INTS,
+ KASSERT(vector >= APIC_IO_INTS && vector != IDT_SYSCALL &&
+ vector <= APIC_IO_INTS + NUM_IO_INTS,
("Vector %u does not map to an IRQ line", vector));
if (vector > IDT_SYSCALL)
vector--;
- return (vector - IDT_IO_INTS);
+ return (vector - APIC_IO_INTS);
}
/*
diff --git a/sys/amd64/include/apicvar.h b/sys/amd64/include/apicvar.h
index 1b03c6b..b202911 100644
--- a/sys/amd64/include/apicvar.h
+++ b/sys/amd64/include/apicvar.h
@@ -40,13 +40,13 @@
* Layout of local APIC interrupt vectors:
*
* 0xff (255) +-------------+
- * | | 15 (Spurious Vector)
+ * | | 15 (Spurious / IPIs / Local Interrupts )
* 0xf0 (240) +-------------+
- * | | 14 (Interprocessor Interrupts)
+ * | | 14 (I/O Interrupts)
* 0xe0 (224) +-------------+
- * | | 13 (Local Interrupt (LINT[01]))
+ * | | 13 (I/O Interrupts)
* 0xd0 (208) +-------------+
- * | | 12 (Local Timer and Error Interrupts)
+ * | | 12 (I/O Interrupts)
* 0xc0 (192) +-------------+
* | | 11 (I/O Interrupts)
* 0xb0 (176) +-------------+
@@ -66,7 +66,7 @@
* 0x40 (64) +-------------+
* | | 3 (I/O Interrupts)
* 0x30 (48) +-------------+
- * | | 2 (I/O Interrupts)
+ * | | 2 (ATPIC Interrupts)
* 0x20 (32) +-------------+
* | | 1 (Exceptions, traps, faults, etc.)
* 0x10 (16) +-------------+
@@ -78,23 +78,24 @@
*/
#define APIC_ID_ALL 0xff
-#define APIC_NUM_IOINTS 160
+#define APIC_IO_INTS (IDT_IO_INTS + 16)
+#define APIC_NUM_IOINTS 192
-#define APIC_LOCAL_INTS (IDT_IO_INTS + APIC_NUM_IOINTS)
+#define APIC_LOCAL_INTS 240
#define APIC_TIMER_INT APIC_LOCAL_INTS
#define APIC_ERROR_INT (APIC_LOCAL_INTS + 1)
#define APIC_THERMAL_INT (APIC_LOCAL_INTS + 2)
-#define APIC_IPI_INTS (APIC_LOCAL_INTS + 32)
+#define APIC_IPI_INTS (APIC_LOCAL_INTS + 3)
#define IPI_AST APIC_IPI_INTS /* Generate software trap. */
#define IPI_INVLTLB (APIC_IPI_INTS + 1) /* TLB Shootdown IPIs */
#define IPI_INVLPG (APIC_IPI_INTS + 2)
#define IPI_INVLRNG (APIC_IPI_INTS + 3)
+#define IPI_LAZYPMAP (APIC_IPI_INTS + 4) /* Lazy pmap release. */
#define IPI_HARDCLOCK (APIC_IPI_INTS + 8) /* Inter-CPU clock handling. */
#define IPI_STATCLOCK (APIC_IPI_INTS + 9)
#define IPI_RENDEZVOUS (APIC_IPI_INTS + 10) /* Inter-CPU rendezvous. */
-#define IPI_LAZYPMAP (APIC_IPI_INTS + 11) /* Lazy pmap release. */
-#define IPI_STOP (APIC_IPI_INTS + 12) /* Stop CPU until restarted. */
+#define IPI_STOP (APIC_IPI_INTS + 11) /* Stop CPU until restarted. */
#define APIC_SPURIOUS_INT 255
@@ -127,7 +128,8 @@ struct apic_enumerator {
inthand_t
IDTVEC(apic_isr1), IDTVEC(apic_isr2), IDTVEC(apic_isr3),
- IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(spuriousint);
+ IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(apic_isr6),
+ IDTVEC(apic_isr7), IDTVEC(spuriousint);
u_int apic_irq_to_idt(u_int irq);
u_int apic_idt_to_irq(u_int vector);
diff --git a/sys/amd64/include/intr_machdep.h b/sys/amd64/include/intr_machdep.h
index ed89186..0aacd91 100644
--- a/sys/amd64/include/intr_machdep.h
+++ b/sys/amd64/include/intr_machdep.h
@@ -31,8 +31,8 @@
#ifdef _KERNEL
-/* With I/O APIC's we can have up to 159 interrupts. */
-#define NUM_IO_INTS 159
+/* With I/O APIC's we can have up to 191 interrupts. */
+#define NUM_IO_INTS 191
#define INTRCNT_COUNT (1 + NUM_IO_INTS * 2)
#ifndef LOCORE
diff --git a/sys/i386/i386/apic_vector.s b/sys/i386/i386/apic_vector.s
index ee17996..ecc4c67 100644
--- a/sys/i386/i386/apic_vector.s
+++ b/sys/i386/i386/apic_vector.s
@@ -117,6 +117,8 @@ MCOUNT_LABEL(bintr2)
ISR_VEC(3, apic_isr3)
ISR_VEC(4, apic_isr4)
ISR_VEC(5, apic_isr5)
+ ISR_VEC(6, apic_isr6)
+ ISR_VEC(7, apic_isr7)
MCOUNT_LABEL(eintr2)
#ifdef SMP
diff --git a/sys/i386/i386/local_apic.c b/sys/i386/i386/local_apic.c
index 3fb7f76..6f942bf 100644
--- a/sys/i386/i386/local_apic.c
+++ b/sys/i386/i386/local_apic.c
@@ -59,6 +59,10 @@ __FBSDID("$FreeBSD$");
*/
#define MAX_APICID 16
+/* Sanity checks on IDT vectors. */
+CTASSERT(APIC_IO_INTS + APIC_NUM_IOINTS <= APIC_LOCAL_INTS);
+CTASSERT(IPI_STOP < APIC_SPURIOUS_INT);
+
/*
* Support for local APICs. Local APICs manage interrupts on each
* individual processor as opposed to I/O APICs which receive interrupts
@@ -104,8 +108,8 @@ static inthand_t *ioint_handlers[] = {
IDTVEC(apic_isr3), /* 96 - 127 */
IDTVEC(apic_isr4), /* 128 - 159 */
IDTVEC(apic_isr5), /* 160 - 191 */
- NULL, /* 192 - 223 */
- NULL /* 224 - 255 */
+ IDTVEC(apic_isr6), /* 192 - 223 */
+ IDTVEC(apic_isr7), /* 224 - 255 */
};
volatile lapic_t *lapic;
@@ -491,7 +495,7 @@ apic_irq_to_idt(u_int irq)
u_int vector;
KASSERT(irq < NUM_IO_INTS, ("Invalid IRQ %u", irq));
- vector = irq + IDT_IO_INTS;
+ vector = irq + APIC_IO_INTS;
if (vector >= IDT_SYSCALL)
vector++;
return (vector);
@@ -501,12 +505,12 @@ u_int
apic_idt_to_irq(u_int vector)
{
- KASSERT(vector >= IDT_IO_INTS && vector != IDT_SYSCALL &&
- vector <= IDT_IO_INTS + NUM_IO_INTS,
+ KASSERT(vector >= APIC_IO_INTS && vector != IDT_SYSCALL &&
+ vector <= APIC_IO_INTS + NUM_IO_INTS,
("Vector %u does not map to an IRQ line", vector));
if (vector > IDT_SYSCALL)
vector--;
- return (vector - IDT_IO_INTS);
+ return (vector - APIC_IO_INTS);
}
/*
diff --git a/sys/i386/include/apicvar.h b/sys/i386/include/apicvar.h
index 1b03c6b..b202911 100644
--- a/sys/i386/include/apicvar.h
+++ b/sys/i386/include/apicvar.h
@@ -40,13 +40,13 @@
* Layout of local APIC interrupt vectors:
*
* 0xff (255) +-------------+
- * | | 15 (Spurious Vector)
+ * | | 15 (Spurious / IPIs / Local Interrupts )
* 0xf0 (240) +-------------+
- * | | 14 (Interprocessor Interrupts)
+ * | | 14 (I/O Interrupts)
* 0xe0 (224) +-------------+
- * | | 13 (Local Interrupt (LINT[01]))
+ * | | 13 (I/O Interrupts)
* 0xd0 (208) +-------------+
- * | | 12 (Local Timer and Error Interrupts)
+ * | | 12 (I/O Interrupts)
* 0xc0 (192) +-------------+
* | | 11 (I/O Interrupts)
* 0xb0 (176) +-------------+
@@ -66,7 +66,7 @@
* 0x40 (64) +-------------+
* | | 3 (I/O Interrupts)
* 0x30 (48) +-------------+
- * | | 2 (I/O Interrupts)
+ * | | 2 (ATPIC Interrupts)
* 0x20 (32) +-------------+
* | | 1 (Exceptions, traps, faults, etc.)
* 0x10 (16) +-------------+
@@ -78,23 +78,24 @@
*/
#define APIC_ID_ALL 0xff
-#define APIC_NUM_IOINTS 160
+#define APIC_IO_INTS (IDT_IO_INTS + 16)
+#define APIC_NUM_IOINTS 192
-#define APIC_LOCAL_INTS (IDT_IO_INTS + APIC_NUM_IOINTS)
+#define APIC_LOCAL_INTS 240
#define APIC_TIMER_INT APIC_LOCAL_INTS
#define APIC_ERROR_INT (APIC_LOCAL_INTS + 1)
#define APIC_THERMAL_INT (APIC_LOCAL_INTS + 2)
-#define APIC_IPI_INTS (APIC_LOCAL_INTS + 32)
+#define APIC_IPI_INTS (APIC_LOCAL_INTS + 3)
#define IPI_AST APIC_IPI_INTS /* Generate software trap. */
#define IPI_INVLTLB (APIC_IPI_INTS + 1) /* TLB Shootdown IPIs */
#define IPI_INVLPG (APIC_IPI_INTS + 2)
#define IPI_INVLRNG (APIC_IPI_INTS + 3)
+#define IPI_LAZYPMAP (APIC_IPI_INTS + 4) /* Lazy pmap release. */
#define IPI_HARDCLOCK (APIC_IPI_INTS + 8) /* Inter-CPU clock handling. */
#define IPI_STATCLOCK (APIC_IPI_INTS + 9)
#define IPI_RENDEZVOUS (APIC_IPI_INTS + 10) /* Inter-CPU rendezvous. */
-#define IPI_LAZYPMAP (APIC_IPI_INTS + 11) /* Lazy pmap release. */
-#define IPI_STOP (APIC_IPI_INTS + 12) /* Stop CPU until restarted. */
+#define IPI_STOP (APIC_IPI_INTS + 11) /* Stop CPU until restarted. */
#define APIC_SPURIOUS_INT 255
@@ -127,7 +128,8 @@ struct apic_enumerator {
inthand_t
IDTVEC(apic_isr1), IDTVEC(apic_isr2), IDTVEC(apic_isr3),
- IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(spuriousint);
+ IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(apic_isr6),
+ IDTVEC(apic_isr7), IDTVEC(spuriousint);
u_int apic_irq_to_idt(u_int irq);
u_int apic_idt_to_irq(u_int vector);
diff --git a/sys/i386/include/intr_machdep.h b/sys/i386/include/intr_machdep.h
index ed89186..0aacd91 100644
--- a/sys/i386/include/intr_machdep.h
+++ b/sys/i386/include/intr_machdep.h
@@ -31,8 +31,8 @@
#ifdef _KERNEL
-/* With I/O APIC's we can have up to 159 interrupts. */
-#define NUM_IO_INTS 159
+/* With I/O APIC's we can have up to 191 interrupts. */
+#define NUM_IO_INTS 191
#define INTRCNT_COUNT (1 + NUM_IO_INTS * 2)
#ifndef LOCORE
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