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-rw-r--r--sys/arm/mv/common.c160
-rw-r--r--sys/arm/mv/mv_machdep.c24
-rw-r--r--sys/arm/mv/mvwin.h22
-rw-r--r--sys/boot/fdt/dts/db78460.dts5
-rw-r--r--sys/dev/cesa/cesa.c70
-rw-r--r--sys/dev/cesa/cesa.h5
6 files changed, 124 insertions, 162 deletions
diff --git a/sys/arm/mv/common.c b/sys/arm/mv/common.c
index fcfb65f..32ed829 100644
--- a/sys/arm/mv/common.c
+++ b/sys/arm/mv/common.c
@@ -83,7 +83,7 @@ static int decode_win_usb_valid(void);
static int decode_win_eth_valid(void);
static int decode_win_pcie_valid(void);
static int decode_win_sata_valid(void);
-static int decode_win_cesa_valid(void);
+
static int decode_win_idma_valid(void);
static int decode_win_xor_valid(void);
@@ -93,11 +93,10 @@ static void decode_win_cpu_setup(void);
static void decode_win_usb_setup(u_long);
static void decode_win_eth_setup(u_long);
static void decode_win_sata_setup(u_long);
-static void decode_win_cesa_setup(u_long);
+
static void decode_win_idma_setup(u_long);
static void decode_win_xor_setup(u_long);
-static void decode_win_cesa_dump(u_long);
static void decode_win_usb_dump(u_long);
static void decode_win_eth_dump(u_long base);
static void decode_win_idma_dump(u_long base);
@@ -127,7 +126,6 @@ struct soc_node_spec {
};
static struct soc_node_spec soc_nodes[] = {
- { "mrvl,cesa", &decode_win_cesa_setup, &decode_win_cesa_dump },
{ "mrvl,ge", &decode_win_eth_setup, &decode_win_eth_dump },
{ "mrvl,usb-ehci", &decode_win_usb_setup, &decode_win_usb_dump },
{ "mrvl,sata", &decode_win_sata_setup, NULL },
@@ -143,7 +141,6 @@ struct fdt_pm_mask_entry fdt_pm_mask_table[] = {
{ "mrvl,usb-ehci", CPU_PM_CTRL_USB(0) },
{ "mrvl,usb-ehci", CPU_PM_CTRL_USB(1) },
{ "mrvl,usb-ehci", CPU_PM_CTRL_USB(2) },
- { "mrvl,cesa", CPU_PM_CTRL_CRYPTO },
{ "mrvl,xor", CPU_PM_CTRL_XOR },
{ "mrvl,sata", CPU_PM_CTRL_SATA },
@@ -529,7 +526,7 @@ soc_decode_win(void)
if (!decode_win_cpu_valid() || !decode_win_usb_valid() ||
!decode_win_eth_valid() || !decode_win_idma_valid() ||
!decode_win_pcie_valid() || !decode_win_sata_valid() ||
- !decode_win_cesa_valid() || !decode_win_xor_valid())
+ !decode_win_xor_valid())
return (EINVAL);
decode_win_cpu_setup();
@@ -537,7 +534,7 @@ soc_decode_win(void)
if (!decode_win_usb_valid() ||
!decode_win_eth_valid() || !decode_win_idma_valid() ||
!decode_win_pcie_valid() || !decode_win_sata_valid() ||
- !decode_win_cesa_valid() || !decode_win_xor_valid())
+ !decode_win_xor_valid())
return (EINVAL);
#endif
if (MV_DUMP_WIN)
@@ -570,11 +567,6 @@ WIN_REG_BASE_IDX_RD(win_usb, br, MV_WIN_USB_BASE)
WIN_REG_BASE_IDX_WR(win_usb, cr, MV_WIN_USB_CTRL)
WIN_REG_BASE_IDX_WR(win_usb, br, MV_WIN_USB_BASE)
-WIN_REG_BASE_IDX_RD(win_cesa, cr, MV_WIN_CESA_CTRL)
-WIN_REG_BASE_IDX_RD(win_cesa, br, MV_WIN_CESA_BASE)
-WIN_REG_BASE_IDX_WR(win_cesa, cr, MV_WIN_CESA_CTRL)
-WIN_REG_BASE_IDX_WR(win_cesa, br, MV_WIN_CESA_BASE)
-
WIN_REG_BASE_IDX_RD(win_eth, br, MV_WIN_ETH_BASE)
WIN_REG_BASE_IDX_RD(win_eth, sz, MV_WIN_ETH_SIZE)
WIN_REG_BASE_IDX_RD(win_eth, har, MV_WIN_ETH_REMAP)
@@ -1791,98 +1783,6 @@ decode_win_xor_dump(u_long base)
#endif
/**************************************************************************
- * CESA TDMA windows routines
- **************************************************************************/
-#if defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
-/*
- * Dump CESA TDMA decode windows.
- */
-static void
-decode_win_cesa_dump(u_long base)
-{
- int i;
-
- if (pm_is_disabled(CPU_PM_CTRL_CRYPTO))
- return;
-
- for (i = 0; i < MV_WIN_CESA_MAX; i++)
- printf("CESA window#%d: c 0x%08x, b 0x%08x\n", i,
- win_cesa_cr_read(base, i), win_cesa_br_read(base, i));
-}
-
-
-/*
- * Set CESA TDMA decode windows.
- */
-static void
-decode_win_cesa_setup(u_long base)
-{
- uint32_t br, cr;
- int i, j;
-
- if (pm_is_disabled(CPU_PM_CTRL_CRYPTO))
- return;
-
- /* Disable and clear all CESA windows */
- for (i = 0; i < MV_WIN_CESA_MAX; i++) {
- win_cesa_cr_write(base, i, 0);
- win_cesa_br_write(base, i, 0);
- }
-
- /* Only access to active DRAM banks is required. */
- for (i = 0; i < MV_WIN_DDR_MAX; i++)
- if (ddr_is_active(i)) {
- br = ddr_base(i);
- cr = (((ddr_size(i) - 1) & 0xffff0000) |
- (ddr_attr(i) << 8) | (ddr_target(i) << 4) | 1);
-
- /* Set the first available CESA window */
- for (j = 0; j < MV_WIN_CESA_MAX; j++) {
- if (win_cesa_cr_read(base, j) & 0x1)
- continue;
-
- win_cesa_br_write(base, j, br);
- win_cesa_cr_write(base, j, cr);
- break;
- }
- }
-}
-
-/*
- * Check CESA TDMA decode windows.
- */
-static int
-decode_win_cesa_valid(void)
-{
-
- return (decode_win_can_cover_ddr(MV_WIN_CESA_MAX));
-}
-#else
-
-/*
- * Provide dummy functions to satisfy the build for SoCs not equipped with
- * CESA
- */
-
-static int
-decode_win_cesa_valid(void)
-{
-
- return (1);
-}
-
-static void
-decode_win_cesa_setup(u_long base)
-{
-}
-
-static void
-decode_win_cesa_dump(u_long base)
-{
-}
-#endif
-
-/**************************************************************************
* SATA windows routines
**************************************************************************/
static void
@@ -1979,33 +1879,34 @@ static int
win_cpu_from_dt(void)
{
pcell_t ranges[48];
- u_long sram_base, sram_size;
phandle_t node;
int i, entry_size, err, t, tuple_size, tuples;
+ u_long sram_base, sram_size;
+ t = 0;
/* Retrieve 'ranges' property of '/localbus' node. */
if ((err = fdt_get_ranges("/localbus", ranges, sizeof(ranges),
- &tuples, &tuple_size)) != 0)
- return (0);
-
- /*
- * Fill CPU decode windows table.
- */
- bzero((void *)&cpu_win_tbl, sizeof(cpu_win_tbl));
-
- entry_size = tuple_size / sizeof(pcell_t);
- cpu_wins_no = tuples;
-
- for (i = 0, t = 0; t < tuples; i += entry_size, t++) {
- cpu_win_tbl[t].target = 1;
- cpu_win_tbl[t].attr = fdt32_to_cpu(ranges[i + 1]);
- cpu_win_tbl[t].base = fdt32_to_cpu(ranges[i + 2]);
- cpu_win_tbl[t].size = fdt32_to_cpu(ranges[i + 3]);
- cpu_win_tbl[t].remap = ~0;
- debugf("target = 0x%0x attr = 0x%0x base = 0x%0x "
- "size = 0x%0x remap = 0x%0x\n", cpu_win_tbl[t].target,
- cpu_win_tbl[t].attr, cpu_win_tbl[t].base,
- cpu_win_tbl[t].size, cpu_win_tbl[t].remap);
+ &tuples, &tuple_size)) == 0) {
+ /*
+ * Fill CPU decode windows table.
+ */
+ bzero((void *)&cpu_win_tbl, sizeof(cpu_win_tbl));
+
+ entry_size = tuple_size / sizeof(pcell_t);
+ cpu_wins_no = tuples;
+
+ for (i = 0, t = 0; t < tuples; i += entry_size, t++) {
+ cpu_win_tbl[t].target = 1;
+ cpu_win_tbl[t].attr = fdt32_to_cpu(ranges[i + 1]);
+ cpu_win_tbl[t].base = fdt32_to_cpu(ranges[i + 2]);
+ cpu_win_tbl[t].size = fdt32_to_cpu(ranges[i + 3]);
+ cpu_win_tbl[t].remap = ~0;
+ debugf("target = 0x%0x attr = 0x%0x base = 0x%0x "
+ "size = 0x%0x remap = 0x%0x\n",
+ cpu_win_tbl[t].target,
+ cpu_win_tbl[t].attr, cpu_win_tbl[t].base,
+ cpu_win_tbl[t].size, cpu_win_tbl[t].remap);
+ }
}
/*
@@ -2015,7 +1916,7 @@ win_cpu_from_dt(void)
if (fdt_is_compatible(node, "mrvl,cesa-sram"))
goto moveon;
- if ((node = OF_finddevice("/")) == -1)
+ if ((node = OF_finddevice("/")) == 0)
return (ENXIO);
if ((node = fdt_find_compatible(node, "mrvl,cesa-sram", 0)) == 0)
@@ -2026,11 +1927,12 @@ moveon:
if (fdt_regsize(node, &sram_base, &sram_size) != 0)
return (EINVAL);
- cpu_win_tbl[++t].target = MV_WIN_CESA_TARGET;
- cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR;
+ cpu_win_tbl[t].target = MV_WIN_CESA_TARGET;
+ cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR(1);
cpu_win_tbl[t].base = sram_base;
cpu_win_tbl[t].size = sram_size;
cpu_win_tbl[t].remap = ~0;
+ cpu_wins_no++;
debugf("sram: base = 0x%0lx size = 0x%0lx\n", sram_base, sram_size);
return (0);
diff --git a/sys/arm/mv/mv_machdep.c b/sys/arm/mv/mv_machdep.c
index fba222d..df2ca74 100644
--- a/sys/arm/mv/mv_machdep.c
+++ b/sys/arm/mv/mv_machdep.c
@@ -310,7 +310,6 @@ platform_devmap_init(void)
{
phandle_t root, child;
pcell_t bank_count;
- u_long base, size;
int i, num_mapped;
i = 0;
@@ -381,29 +380,6 @@ platform_devmap_init(void)
}
}
- /*
- * CESA SRAM range.
- */
- if ((child = OF_finddevice("sram")) != -1)
- if (fdt_is_compatible(child, "mrvl,cesa-sram"))
- goto moveon;
-
- if ((child = fdt_find_compatible(root, "mrvl,cesa-sram", 0)) == 0)
- /* No CESA SRAM node. */
- return (0);
-moveon:
- if (i >= FDT_DEVMAP_MAX)
- return (ENOMEM);
-
- if (fdt_regsize(child, &base, &size) != 0)
- return (EINVAL);
-
- fdt_devmap[i].pd_va = MV_CESA_SRAM_BASE; /* XXX */
- fdt_devmap[i].pd_pa = base;
- fdt_devmap[i].pd_size = size;
- fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
- fdt_devmap[i].pd_cache = PTE_NOCACHE;
-
return (0);
}
diff --git a/sys/arm/mv/mvwin.h b/sys/arm/mv/mvwin.h
index a92d511..3e22952 100644
--- a/sys/arm/mv/mvwin.h
+++ b/sys/arm/mv/mvwin.h
@@ -208,16 +208,28 @@
#define MV_WIN_DDR_MAX 4
#endif /* SOC_MV_DOVE */
-#define MV_WIN_CESA_CTRL(n) (0x8 * (n) + 0xa04)
-#define MV_WIN_CESA_BASE(n) (0x8 * (n) + 0xa00)
-#define MV_WIN_CESA_MAX 4
+/*
+ * These values are valid only for peripherals decoding windows
+ * Bit in ATTR is zeroed according to CS bank number
+ */
+#define MV_WIN_DDR_ATTR(cs) (0x0F & ~(0x01 << (cs)))
+#define MV_WIN_DDR_TARGET 0x0
#if defined(SOC_MV_DISCOVERY)
#define MV_WIN_CESA_TARGET 9
-#define MV_WIN_CESA_ATTR 1
+#define MV_WIN_CESA_ATTR(eng_sel) 1
+#elif defined(SOC_MV_ARMADAXP)
+#define MV_WIN_CESA_TARGET 9
+/*
+ * Bits [2:3] of cesa attribute select engine:
+ * eng_sel:
+ * 1: engine1
+ * 2: engine0
+ */
+#define MV_WIN_CESA_ATTR(eng_sel) (1 | ((eng_sel) << 2))
#else
#define MV_WIN_CESA_TARGET 3
-#define MV_WIN_CESA_ATTR 0
+#define MV_WIN_CESA_ATTR(eng_sel) 0
#endif
#define MV_WIN_USB_CTRL(n) (0x10 * (n) + 0x320)
diff --git a/sys/boot/fdt/dts/db78460.dts b/sys/boot/fdt/dts/db78460.dts
index 45a13c3..30e795e 100644
--- a/sys/boot/fdt/dts/db78460.dts
+++ b/sys/boot/fdt/dts/db78460.dts
@@ -303,6 +303,11 @@
>;
};
+ sram@ffff0000 {
+ compatible = "mrvl,cesa-sram";
+ reg = <0xffff0000 0x00010000>;
+ };
+
chosen {
stdin = "serial0";
stdout = "serial0";
diff --git a/sys/dev/cesa/cesa.c b/sys/dev/cesa/cesa.c
index 835bb06..d5739e9 100644
--- a/sys/dev/cesa/cesa.c
+++ b/sys/dev/cesa/cesa.c
@@ -80,6 +80,7 @@ static void cesa_intr(void *);
static int cesa_newsession(device_t, u_int32_t *, struct cryptoini *);
static int cesa_freesession(device_t, u_int64_t);
static int cesa_process(device_t, struct cryptop *, int);
+static int decode_win_cesa_setup(struct cesa_softc *sc);
static struct resource_spec cesa_res_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
@@ -995,10 +996,10 @@ cesa_attach(device_t dev)
sc->sc_error = 0;
sc->sc_dev = dev;
- error = cesa_setup_sram(sc);
- if (error) {
- device_printf(dev, "could not setup SRAM\n");
- return (error);
+ /* Check if CESA peripheral device has power turned on */
+ if (soc_power_ctrl_get(CPU_PM_CTRL_CRYPTO) != CPU_PM_CTRL_CRYPTO) {
+ device_printf(dev, "not powered on\n");
+ return (ENXIO);
}
soc_id(&d, &r);
@@ -1038,6 +1039,20 @@ cesa_attach(device_t dev)
sc->sc_bsh = rman_get_bushandle(*(sc->sc_res));
sc->sc_bst = rman_get_bustag(*(sc->sc_res));
+ /* Setup CESA decoding windows */
+ error = decode_win_cesa_setup(sc);
+ if (error) {
+ device_printf(dev, "could not setup decoding windows\n");
+ goto err1;
+ }
+
+ /* Acquire SRAM base address */
+ error = cesa_setup_sram(sc);
+ if (error) {
+ device_printf(dev, "could not setup SRAM\n");
+ goto err1;
+ }
+
/* Setup interrupt handler */
error = bus_setup_intr(dev, sc->sc_res[1], INTR_TYPE_NET | INTR_MPSAFE,
NULL, cesa_intr, sc, &(sc->sc_icookie));
@@ -1609,3 +1624,50 @@ cesa_process(device_t dev, struct cryptop *crp, int hint)
return (0);
}
+
+/*
+ * Set CESA TDMA decode windows.
+ */
+static int
+decode_win_cesa_setup(struct cesa_softc *sc)
+{
+ struct mem_region availmem_regions[FDT_MEM_REGIONS];
+ int availmem_regions_sz;
+ uint32_t memsize, br, cr, i;
+
+ /* Grab physical memory regions information from DTS */
+ if (fdt_get_mem_regions(availmem_regions, &availmem_regions_sz,
+ &memsize) != 0)
+ return (ENXIO);
+
+ if (availmem_regions_sz > MV_WIN_CESA_MAX) {
+ device_printf(sc->sc_dev, "Too much memory regions, cannot "
+ " set CESA windows to cover whole DRAM \n");
+ return (ENXIO);
+ }
+
+ /* Disable and clear all CESA windows */
+ for (i = 0; i < MV_WIN_CESA_MAX; i++) {
+ CESA_WRITE(sc, MV_WIN_CESA_BASE(i), 0);
+ CESA_WRITE(sc, MV_WIN_CESA_CTRL(i), 0);
+ }
+
+ /* Fill CESA TDMA decoding windows with information acquired from DTS */
+ for (i = 0; i < availmem_regions_sz; i++) {
+ br = availmem_regions[i].mr_start;
+ cr = availmem_regions[i].mr_size;
+
+ /* Don't add entries with size lower than 64KB */
+ if (cr & 0xffff0000) {
+ cr = (((cr - 1) & 0xffff0000) |
+ (MV_WIN_DDR_ATTR(i) << MV_WIN_CPU_ATTR_SHIFT) |
+ (MV_WIN_DDR_TARGET << MV_WIN_CPU_TARGET_SHIFT) |
+ MV_WIN_CPU_ENABLE_BIT);
+ CESA_WRITE(sc, MV_WIN_CESA_BASE(i), br);
+ CESA_WRITE(sc, MV_WIN_CESA_CTRL(i), cr);
+ }
+ }
+
+ return (0);
+}
+
diff --git a/sys/dev/cesa/cesa.h b/sys/dev/cesa/cesa.h
index 2c953f0..7bf2ff5 100644
--- a/sys/dev/cesa/cesa.h
+++ b/sys/dev/cesa/cesa.h
@@ -333,6 +333,11 @@ struct cesa_chain_info {
#define CESA_TDMA_EMR_BOTH_HIT CESA_TDMA_ECR_BOTH_HIT
#define CESA_TDMA_EMR_DATA_ERROR CESA_TDMA_ECR_DATA_ERROR
+/* CESA TDMA address decoding registers */
+#define MV_WIN_CESA_CTRL(n) (0x8 * (n) + 0xA04)
+#define MV_WIN_CESA_BASE(n) (0x8 * (n) + 0xA00)
+#define MV_WIN_CESA_MAX 4
+
/* CESA SA registers definitions */
#define CESA_SA_CMD 0xDE00
#define CESA_SA_CMD_ACTVATE (1 << 0)
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