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-rw-r--r--sys/amd64/amd64/exception.S1
-rw-r--r--sys/amd64/amd64/exception.s1
-rw-r--r--sys/amd64/include/atomic.h12
-rw-r--r--sys/i386/i386/exception.s1
-rw-r--r--sys/i386/include/atomic.h12
5 files changed, 4 insertions, 23 deletions
diff --git a/sys/amd64/amd64/exception.S b/sys/amd64/amd64/exception.S
index 28579ac..0b395e2 100644
--- a/sys/amd64/amd64/exception.S
+++ b/sys/amd64/amd64/exception.S
@@ -37,7 +37,6 @@
#include <machine/asmacros.h>
#include <sys/mutex.h>
-#include <machine/atomic.h>
#include <machine/psl.h>
#include <machine/trap.h>
#ifdef SMP
diff --git a/sys/amd64/amd64/exception.s b/sys/amd64/amd64/exception.s
index 28579ac..0b395e2 100644
--- a/sys/amd64/amd64/exception.s
+++ b/sys/amd64/amd64/exception.s
@@ -37,7 +37,6 @@
#include <machine/asmacros.h>
#include <sys/mutex.h>
-#include <machine/atomic.h>
#include <machine/psl.h>
#include <machine/trap.h>
#ifdef SMP
diff --git a/sys/amd64/include/atomic.h b/sys/amd64/include/atomic.h
index 88e7348..157f857 100644
--- a/sys/amd64/include/atomic.h
+++ b/sys/amd64/include/atomic.h
@@ -80,16 +80,11 @@ void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
* the binaries will run on both types of systems.
*/
#if defined(SMP) || !defined(_KERNEL)
-#if defined(LOCORE)
-#define MPLOCKED lock ;
-#else /* !LOCORE */
#define MPLOCKED "lock ; "
-#endif /* LOCORE */
-#else /* SMP || !_KERNEL */
+#else
#define MPLOCKED
-#endif /* SMP || !_KERNEL */
+#endif
-#if !defined(LOCORE)
/*
* The assembly is volatilized to demark potential before-and-after side
* effects if an interrupt or SMP collision were to occur.
@@ -205,10 +200,8 @@ atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
: : "memory"); \
}
#endif /* defined(I386_CPU) */
-#endif /* !defined(LOCORE) */
#endif /* KLD_MODULE */
-#if !defined(LOCORE)
ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v)
ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v)
ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v)
@@ -407,5 +400,4 @@ atomic_readandclear_long(volatile u_long *addr)
return (result);
}
#endif /* !defined(WANT_FUNCTIONS) */
-#endif /* !defined(LOCORE) */
#endif /* ! _MACHINE_ATOMIC_H_ */
diff --git a/sys/i386/i386/exception.s b/sys/i386/i386/exception.s
index 28579ac..0b395e2 100644
--- a/sys/i386/i386/exception.s
+++ b/sys/i386/i386/exception.s
@@ -37,7 +37,6 @@
#include <machine/asmacros.h>
#include <sys/mutex.h>
-#include <machine/atomic.h>
#include <machine/psl.h>
#include <machine/trap.h>
#ifdef SMP
diff --git a/sys/i386/include/atomic.h b/sys/i386/include/atomic.h
index 88e7348..157f857 100644
--- a/sys/i386/include/atomic.h
+++ b/sys/i386/include/atomic.h
@@ -80,16 +80,11 @@ void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
* the binaries will run on both types of systems.
*/
#if defined(SMP) || !defined(_KERNEL)
-#if defined(LOCORE)
-#define MPLOCKED lock ;
-#else /* !LOCORE */
#define MPLOCKED "lock ; "
-#endif /* LOCORE */
-#else /* SMP || !_KERNEL */
+#else
#define MPLOCKED
-#endif /* SMP || !_KERNEL */
+#endif
-#if !defined(LOCORE)
/*
* The assembly is volatilized to demark potential before-and-after side
* effects if an interrupt or SMP collision were to occur.
@@ -205,10 +200,8 @@ atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
: : "memory"); \
}
#endif /* defined(I386_CPU) */
-#endif /* !defined(LOCORE) */
#endif /* KLD_MODULE */
-#if !defined(LOCORE)
ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v)
ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v)
ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v)
@@ -407,5 +400,4 @@ atomic_readandclear_long(volatile u_long *addr)
return (result);
}
#endif /* !defined(WANT_FUNCTIONS) */
-#endif /* !defined(LOCORE) */
#endif /* ! _MACHINE_ATOMIC_H_ */
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