diff options
| -rw-r--r-- | sys/conf/files.ia64 | 1 | ||||
| -rw-r--r-- | sys/ia64/ia64/bus_machdep.c | 356 | ||||
| -rw-r--r-- | sys/ia64/ia64/machdep.c | 10 | ||||
| -rw-r--r-- | sys/ia64/ia64/mp_machdep.c | 2 | ||||
| -rw-r--r-- | sys/ia64/ia64/nexus.c | 37 | ||||
| -rw-r--r-- | sys/ia64/ia64/sys_machdep.c | 1 | ||||
| -rw-r--r-- | sys/ia64/include/bus.h | 787 | ||||
| -rw-r--r-- | sys/ia64/include/cpufunc.h | 120 |
8 files changed, 783 insertions, 531 deletions
diff --git a/sys/conf/files.ia64 b/sys/conf/files.ia64 index b2d049e..e56faae 100644 --- a/sys/conf/files.ia64 +++ b/sys/conf/files.ia64 @@ -72,6 +72,7 @@ ia64/ia32/ia32_reg.c optional compat_ia32 ia64/ia32/ia32_signal.c optional compat_ia32 ia64/ia32/ia32_trap.c optional compat_ia32 ia64/ia64/autoconf.c standard +ia64/ia64/bus_machdep.c standard ia64/ia64/busdma_machdep.c standard ia64/ia64/clock.c standard ia64/ia64/context.S standard diff --git a/sys/ia64/ia64/bus_machdep.c b/sys/ia64/ia64/bus_machdep.c new file mode 100644 index 0000000..f9e019b --- /dev/null +++ b/sys/ia64/ia64/bus_machdep.c @@ -0,0 +1,356 @@ +/*- + * Copyright (c) 2009 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/types.h> +#include <machine/bus.h> + +extern u_long ia64_port_base; + +#define __PIO_ADDR(port) \ + (void *)(ia64_port_base | (((port) & 0xfffc) << 10) | ((port) & 0xFFF)) + +uint8_t +bus_space_read_io_1(u_long port) +{ + uint8_t v; + + ia64_mf(); + v = ia64_ld1(__PIO_ADDR(port)); + ia64_mf_a(); + ia64_mf(); + return (v); +} + +uint16_t +bus_space_read_io_2(u_long port) +{ + uint16_t v; + + ia64_mf(); + v = ia64_ld2(__PIO_ADDR(port)); + ia64_mf_a(); + ia64_mf(); + return (v); +} + +uint32_t +bus_space_read_io_4(u_long port) +{ + uint32_t v; + + ia64_mf(); + v = ia64_ld4(__PIO_ADDR(port)); + ia64_mf_a(); + ia64_mf(); + return (v); +} + +#if 0 +uint64_t +bus_space_read_io_8(u_long port) +{ +} +#endif + +void +bus_space_write_io_1(u_long port, uint8_t val) +{ + + ia64_mf(); + ia64_st1(__PIO_ADDR(port), val); + ia64_mf_a(); + ia64_mf(); +} + +void +bus_space_write_io_2(u_long port, uint16_t val) +{ + + ia64_mf(); + ia64_st2(__PIO_ADDR(port), val); + ia64_mf_a(); + ia64_mf(); +} + +void +bus_space_write_io_4(u_long port, uint32_t val) +{ + + ia64_mf(); + ia64_st4(__PIO_ADDR(port), val); + ia64_mf_a(); + ia64_mf(); +} + +#if 0 +void +bus_space_write_io_8(u_long port, uint64_t val) +{ +} +#endif + +void +bus_space_read_multi_io_1(u_long port, uint8_t *ptr, size_t count) +{ + + while (count-- > 0) + *ptr++ = bus_space_read_io_1(port); +} + +void +bus_space_read_multi_io_2(u_long port, uint16_t *ptr, size_t count) +{ + + while (count-- > 0) + *ptr++ = bus_space_read_io_2(port); +} + +void +bus_space_read_multi_io_4(u_long port, uint32_t *ptr, size_t count) +{ + + while (count-- > 0) + *ptr++ = bus_space_read_io_4(port); +} + +#if 0 +void +bus_space_read_multi_io_8(u_long port, uint64_t *ptr, size_t count) +{ +} +#endif + +void +bus_space_write_multi_io_1(u_long port, const uint8_t *ptr, size_t count) +{ + + while (count-- > 0) + bus_space_write_io_1(port, *ptr++); +} + +void +bus_space_write_multi_io_2(u_long port, const uint16_t *ptr, size_t count) +{ + + while (count-- > 0) + bus_space_write_io_2(port, *ptr++); +} + +void +bus_space_write_multi_io_4(u_long port, const uint32_t *ptr, size_t count) +{ + + while (count-- > 0) + bus_space_write_io_4(port, *ptr++); +} + +#if 0 +void +bus_space_write_multi_io_8(u_long port, const uint64_t *ptr, size_t count) +{ +} +#endif + +void +bus_space_read_region_io_1(u_long port, uint8_t *ptr, size_t count) +{ + + while (count-- > 0) { + *ptr++ = bus_space_read_io_1(port); + port += 1; + } +} + +void +bus_space_read_region_io_2(u_long port, uint16_t *ptr, size_t count) +{ + + while (count-- > 0) { + *ptr++ = bus_space_read_io_2(port); + port += 2; + } +} + +void +bus_space_read_region_io_4(u_long port, uint32_t *ptr, size_t count) +{ + + while (count-- > 0) { + *ptr++ = bus_space_read_io_4(port); + port += 4; + } +} + +#if 0 +void bus_space_read_region_io_8(u_long, uint64_t *, size_t); +#endif + +void +bus_space_write_region_io_1(u_long port, const uint8_t *ptr, size_t count) +{ + + while (count-- > 0) { + bus_space_write_io_1(port, *ptr++); + port += 1; + } +} + +void +bus_space_write_region_io_2(u_long port, const uint16_t *ptr, size_t count) +{ + + while (count-- > 0) { + bus_space_write_io_2(port, *ptr++); + port += 2; + } +} + +void +bus_space_write_region_io_4(u_long port, const uint32_t *ptr, size_t count) +{ + + while (count-- > 0) { + bus_space_write_io_4(port, *ptr++); + port += 4; + } +} + +#if 0 +void +bus_space_write_region_io_8(u_long port, const uint64_t *ptr, size_t count) +{ +} +#endif + +void +bus_space_set_region_io_1(u_long port, uint8_t val, size_t count) +{ + + while (count-- > 0) { + bus_space_write_io_1(port, val); + port += 1; + } +} + +void +bus_space_set_region_io_2(u_long port, uint16_t val, size_t count) +{ + + while (count-- > 0) { + bus_space_write_io_2(port, val); + port += 2; + } +} + +void +bus_space_set_region_io_4(u_long port, uint32_t val, size_t count) +{ + + while (count-- > 0) { + bus_space_write_io_4(port, val); + port += 4; + } +} + +#if 0 +void +bus_space_set_region_io_8(u_long port, uint64_t val, size_t count) +{ +} +#endif + +void +bus_space_copy_region_io_1(u_long src, u_long dst, size_t count) +{ + long delta; + uint8_t val; + + if (src < dst) { + src += count - 1; + dst += count - 1; + delta = -1; + } else + delta = 1; + + while (count-- > 0) { + val = bus_space_read_io_1(src); + bus_space_write_io_1(dst, val); + src += delta; + dst += delta; + } +} + +void +bus_space_copy_region_io_2(u_long src, u_long dst, size_t count) +{ + long delta; + uint16_t val; + + if (src < dst) { + src += 2 * (count - 1); + dst += 2 * (count - 1); + delta = -2; + } else + delta = 2; + + while (count-- > 0) { + val = bus_space_read_io_2(src); + bus_space_write_io_2(dst, val); + src += delta; + dst += delta; + } +} + +void +bus_space_copy_region_io_4(u_long src, u_long dst, size_t count) +{ + long delta; + uint32_t val; + + if (src < dst) { + src += 4 * (count - 1); + dst += 4 * (count - 1); + delta = -4; + } else + delta = 4; + + while (count-- > 0) { + val = bus_space_read_io_4(src); + bus_space_write_io_4(dst, val); + src += delta; + dst += delta; + } +} + +#if 0 +void +bus_space_copy_region_io_8(u_long src, u_long dst, size_t count) +{ +} +#endif diff --git a/sys/ia64/ia64/machdep.c b/sys/ia64/ia64/machdep.c index 684bf26..95b604f 100644 --- a/sys/ia64/ia64/machdep.c +++ b/sys/ia64/ia64/machdep.c @@ -930,16 +930,6 @@ ia64_init(void) return (ret); } -void * -ia64_ioport_address(u_int port) -{ - uint64_t addr; - - addr = (port > 0xffff) ? IA64_PHYS_TO_RR6((uint64_t)port) : - ia64_port_base | ((port & 0xfffc) << 10) | (port & 0xFFF); - return ((void *)addr); -} - uint64_t ia64_get_hcdp(void) { diff --git a/sys/ia64/ia64/mp_machdep.c b/sys/ia64/ia64/mp_machdep.c index 020c71b..9cbf770 100644 --- a/sys/ia64/ia64/mp_machdep.c +++ b/sys/ia64/ia64/mp_machdep.c @@ -366,7 +366,7 @@ ipi_send(struct pcpu *cpu, int ipi) volatile uint64_t *pipi; uint64_t vector; - pipi = __MEMIO_ADDR(ia64_lapic_address | + pipi = (void *)IA64_PHYS_TO_RR6(ia64_lapic_address | ((cpu->pc_md.lid & LID_SAPIC_MASK) >> 12)); vector = (uint64_t)(ipi_vector[ipi] & 0xff); KASSERT(vector != 0, ("IPI %d is not assigned a vector", ipi)); diff --git a/sys/ia64/ia64/nexus.c b/sys/ia64/ia64/nexus.c index 502dc72..5ce4731 100644 --- a/sys/ia64/ia64/nexus.c +++ b/sys/ia64/ia64/nexus.c @@ -389,26 +389,23 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid, static int nexus_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) + struct resource *r) { - vm_paddr_t paddr, psize; + vm_paddr_t paddr; void *vaddr; - /* - * If this is a memory resource, map it into the kernel. - */ + paddr = rman_get_start(r); + switch (type) { case SYS_RES_IOPORT: rman_set_bustag(r, IA64_BUS_SPACE_IO); - rman_set_bushandle(r, rman_get_start(r)); + rman_set_bushandle(r, paddr); break; case SYS_RES_MEMORY: - paddr = rman_get_start(r); - psize = rman_get_size(r); - vaddr = pmap_mapdev(paddr, psize); - rman_set_virtual(r, vaddr); + vaddr = pmap_mapdev(paddr, rman_get_size(r)); rman_set_bustag(r, IA64_BUS_SPACE_MEM); - rman_set_bushandle(r, (bus_space_handle_t) paddr); + rman_set_bushandle(r, (bus_space_handle_t) vaddr); + rman_set_virtual(r, vaddr); break; } return (rman_activate_resource(r)); @@ -488,11 +485,27 @@ nexus_get_reslist(device_t dev, device_t child) } static int -nexus_set_resource(device_t dev, device_t child, int type, int rid, u_long start, u_long count) +nexus_set_resource(device_t dev, device_t child, int type, int rid, + u_long start, u_long count) { struct nexus_device *ndev = DEVTONX(child); struct resource_list *rl = &ndev->nx_resources; + if (type == SYS_RES_IOPORT && start > (0x10000 - count)) { + /* + * Work around a firmware bug in the HP rx2660, where in ACPI + * an I/O port is really a memory mapped I/O address. The bug + * is in the GAS that describes the address and in particular + * the SpaceId field. The field should not say the address is + * an I/O port when it is in fact an I/O memory address. + */ + if (bootverbose) + printf("%s: invalid port range (%#lx-%#lx); " + "assuming I/O memory range.\n", __func__, start, + start + count - 1); + type = SYS_RES_MEMORY; + } + /* XXX this should return a success/failure indicator */ resource_list_add(rl, type, rid, start, start + count - 1, count); return(0); diff --git a/sys/ia64/ia64/sys_machdep.c b/sys/ia64/ia64/sys_machdep.c index d4dcc1f..e39cbab 100644 --- a/sys/ia64/ia64/sys_machdep.c +++ b/sys/ia64/ia64/sys_machdep.c @@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$"); #include <sys/sysproto.h> #include <sys/sysent.h> +#include <machine/bus.h> #include <machine/cpu.h> #include <machine/sysarch.h> diff --git a/sys/ia64/include/bus.h b/sys/ia64/include/bus.h index 80b90ca..981445f 100644 --- a/sys/ia64/include/bus.h +++ b/sys/ia64/include/bus.h @@ -1,3 +1,29 @@ +/*- + * Copyright (c) 2009 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + /* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */ /*- @@ -76,11 +102,25 @@ #include <machine/cpufunc.h> /* + * I/O port reads with ia32 semantics. + */ +#define inb bus_space_read_io_1 +#define inw bus_space_read_io_2 +#define inl bus_space_read_io_4 + +#define outb bus_space_write_io_1 +#define outw bus_space_write_io_2 +#define outl bus_space_write_io_4 + +/* * Values for the ia64 bus space tag, not to be used directly by MI code. */ #define IA64_BUS_SPACE_IO 0 /* space is i/o space */ #define IA64_BUS_SPACE_MEM 1 /* space is mem space */ +#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ +#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ + #define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF #define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFF @@ -90,24 +130,21 @@ #define BUS_SPACE_UNRESTRICTED (~0) + /* * Map a region of device bus space into CPU virtual address space. */ - -static __inline int bus_space_map(bus_space_tag_t t, bus_addr_t addr, - bus_size_t size, int flags, - bus_space_handle_t *bshp); - static __inline int -bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr, - bus_size_t size __unused, int flags __unused, - bus_space_handle_t *bshp) +bus_space_map(bus_space_tag_t bst, bus_addr_t addr, bus_size_t size __unused, + int flags __unused, bus_space_handle_t *bshp) { - *bshp = addr; + *bshp = (__predict_false(bst == IA64_BUS_SPACE_IO)) + ? addr : IA64_PHYS_TO_RR6(addr); return (0); } + /* * Unmap a region of device bus space. */ @@ -123,7 +160,7 @@ bus_space_unmap(bus_space_tag_t bst __unused, bus_space_handle_t bsh __unused, */ static __inline int bus_space_subregion(bus_space_tag_t bst, bus_space_handle_t bsh, - bus_size_t ofs, bus_size_t size, bus_space_handle_t *nbshp) + bus_size_t ofs, bus_size_t size __unused, bus_space_handle_t *nbshp) { *nbshp = bsh + ofs; return (0); @@ -149,12 +186,9 @@ bus_space_free(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t size); /* * Bus read/write barrier method. */ -#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ -#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ - static __inline void -bus_space_barrier(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, - bus_size_t size, int flags) +bus_space_barrier(bus_space_tag_t bst __unused, bus_space_handle_t bsh __unused, + bus_size_t ofs __unused, bus_size_t size __unused, int flags __unused) { ia64_mf_a(); ia64_mf(); @@ -166,40 +200,53 @@ bus_space_barrier(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, * tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The * data is returned. */ +uint8_t bus_space_read_io_1(u_long); +uint16_t bus_space_read_io_2(u_long); +uint32_t bus_space_read_io_4(u_long); +uint64_t bus_space_read_io_8(u_long); + static __inline uint8_t bus_space_read_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs) { - uint8_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - return (ia64_ld1(bsp)); + uint8_t val; + + val = (__predict_false(bst == IA64_BUS_SPACE_IO)) + ? bus_space_read_io_1(bsh + ofs) + : ia64_ld1((void *)(bsh + ofs)); + return (val); } static __inline uint16_t bus_space_read_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs) { - uint16_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - return (ia64_ld2(bsp)); + uint16_t val; + + val = (__predict_false(bst == IA64_BUS_SPACE_IO)) + ? bus_space_read_io_2(bsh + ofs) + : ia64_ld2((void *)(bsh + ofs)); + return (val); } static __inline uint32_t bus_space_read_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs) { - uint32_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - return (ia64_ld4(bsp)); + uint32_t val; + + val = (__predict_false(bst == IA64_BUS_SPACE_IO)) + ? bus_space_read_io_4(bsh + ofs) + : ia64_ld4((void *)(bsh + ofs)); + return (val); } static __inline uint64_t bus_space_read_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs) { - uint64_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - return (ia64_ld8(bsp)); + uint64_t val; + + val = (__predict_false(bst == IA64_BUS_SPACE_IO)) + ? bus_space_read_io_8(bsh + ofs) + : ia64_ld8((void *)(bsh + ofs)); + return (val); } @@ -208,44 +255,53 @@ bus_space_read_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs) * tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The * data is passed by value. */ +void bus_space_write_io_1(u_long, uint8_t); +void bus_space_write_io_2(u_long, uint16_t); +void bus_space_write_io_4(u_long, uint32_t); +void bus_space_write_io_8(u_long, uint64_t); + static __inline void bus_space_write_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint8_t val) { - uint8_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st1(bsp, val); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_io_1(bsh + ofs, val); + else + ia64_st1((void *)(bsh + ofs), val); } static __inline void bus_space_write_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint16_t val) { - uint16_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st2(bsp, val); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_io_2(bsh + ofs, val); + else + ia64_st2((void *)(bsh + ofs), val); } static __inline void bus_space_write_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint32_t val) { - uint32_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st4(bsp, val); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_io_4(bsh + ofs, val); + else + ia64_st4((void *)(bsh + ofs), val); } static __inline void bus_space_write_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint64_t val) { - uint64_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st8(bsp, val); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_io_8(bsh + ofs, val); + else + ia64_st8((void *)(bsh + ofs), val); } @@ -254,48 +310,61 @@ bus_space_write_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The * data is returned in the buffer passed by reference. */ +void bus_space_read_multi_io_1(u_long, uint8_t *, size_t); +void bus_space_read_multi_io_2(u_long, uint16_t *, size_t); +void bus_space_read_multi_io_4(u_long, uint32_t *, size_t); +void bus_space_read_multi_io_8(u_long, uint64_t *, size_t); + static __inline void bus_space_read_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint8_t *bufp, size_t count) { - uint8_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - while (count-- > 0) - *bufp++ = ia64_ld1(bsp); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_read_multi_io_1(bsh + ofs, bufp, count); + else { + while (count-- > 0) + *bufp++ = ia64_ld1((void *)(bsh + ofs)); + } } static __inline void bus_space_read_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint16_t *bufp, size_t count) { - uint16_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - while (count-- > 0) - *bufp++ = ia64_ld2(bsp); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_read_multi_io_2(bsh + ofs, bufp, count); + else { + while (count-- > 0) + *bufp++ = ia64_ld2((void *)(bsh + ofs)); + } } static __inline void bus_space_read_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint32_t *bufp, size_t count) { - uint32_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - while (count-- > 0) - *bufp++ = ia64_ld4(bsp); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_read_multi_io_4(bsh + ofs, bufp, count); + else { + while (count-- > 0) + *bufp++ = ia64_ld4((void *)(bsh + ofs)); + } } static __inline void bus_space_read_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint64_t *bufp, size_t count) { - uint64_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - while (count-- > 0) - *bufp++ = ia64_ld8(bsp); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_read_multi_io_8(bsh + ofs, bufp, count); + else { + while (count-- > 0) + *bufp++ = ia64_ld8((void *)(bsh + ofs)); + } } @@ -304,48 +373,61 @@ bus_space_read_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh, * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The * data is read from the buffer passed by reference. */ +void bus_space_write_multi_io_1(u_long, const uint8_t *, size_t); +void bus_space_write_multi_io_2(u_long, const uint16_t *, size_t); +void bus_space_write_multi_io_4(u_long, const uint32_t *, size_t); +void bus_space_write_multi_io_8(u_long, const uint64_t *, size_t); + static __inline void bus_space_write_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *bufp, size_t count) { - uint8_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - while (count-- > 0) - ia64_st1(bsp, *bufp++); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_multi_io_1(bsh + ofs, bufp, count); + else { + while (count-- > 0) + ia64_st1((void *)(bsh + ofs), *bufp++); + } } static __inline void bus_space_write_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *bufp, size_t count) { - uint16_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - while (count-- > 0) - ia64_st2(bsp, *bufp++); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_multi_io_2(bsh + ofs, bufp, count); + else { + while (count-- > 0) + ia64_st2((void *)(bsh + ofs), *bufp++); + } } static __inline void bus_space_write_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *bufp, size_t count) { - uint32_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - while (count-- > 0) - ia64_st4(bsp, *bufp++); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_multi_io_4(bsh + ofs, bufp, count); + else { + while (count-- > 0) + ia64_st4((void *)(bsh + ofs), *bufp++); + } } static __inline void bus_space_write_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *bufp, size_t count) { - uint64_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - while (count-- > 0) - ia64_st8(bsp, *bufp++); + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_multi_io_8(bsh + ofs, bufp, count); + else { + while (count-- > 0) + ia64_st8((void *)(bsh + ofs), *bufp++); + } } @@ -355,16 +437,22 @@ bus_space_write_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh, * data is written to the buffer passed by reference and read from successive * bus space addresses. Access is unordered. */ +void bus_space_read_region_io_1(u_long, uint8_t *, size_t); +void bus_space_read_region_io_2(u_long, uint16_t *, size_t); +void bus_space_read_region_io_4(u_long, uint32_t *, size_t); +void bus_space_read_region_io_8(u_long, uint64_t *, size_t); + static __inline void bus_space_read_region_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint8_t *bufp, size_t count) { - uint8_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - *bufp++ = ia64_ld1(bsp); - ofs += 1; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_read_region_io_1(bsh + ofs, bufp, count); + else { + uint8_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + *bufp++ = ia64_ld1(bsp++); } } @@ -372,12 +460,13 @@ static __inline void bus_space_read_region_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint16_t *bufp, size_t count) { - uint16_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - *bufp++ = ia64_ld2(bsp); - ofs += 2; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_read_region_io_2(bsh + ofs, bufp, count); + else { + uint16_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + *bufp++ = ia64_ld2(bsp++); } } @@ -385,12 +474,13 @@ static __inline void bus_space_read_region_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint32_t *bufp, size_t count) { - uint32_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - *bufp++ = ia64_ld4(bsp); - ofs += 4; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_read_region_io_4(bsh + ofs, bufp, count); + else { + uint32_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + *bufp++ = ia64_ld4(bsp++); } } @@ -398,12 +488,13 @@ static __inline void bus_space_read_region_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint64_t *bufp, size_t count) { - uint64_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - *bufp++ = ia64_ld8(bsp); - ofs += 8; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_read_region_io_8(bsh + ofs, bufp, count); + else { + uint64_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + *bufp++ = ia64_ld8(bsp++); } } @@ -414,16 +505,22 @@ bus_space_read_region_8(bus_space_tag_t bst, bus_space_handle_t bsh, * data is read from the buffer passed by reference and written to successive * bus space addresses. Access is unordered. */ +void bus_space_write_region_io_1(u_long, const uint8_t *, size_t); +void bus_space_write_region_io_2(u_long, const uint16_t *, size_t); +void bus_space_write_region_io_4(u_long, const uint32_t *, size_t); +void bus_space_write_region_io_8(u_long, const uint64_t *, size_t); + static __inline void bus_space_write_region_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *bufp, size_t count) { - uint8_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st1(bsp, *bufp++); - ofs += 1; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_region_io_1(bsh + ofs, bufp, count); + else { + uint8_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + ia64_st1(bsp++, *bufp++); } } @@ -431,12 +528,13 @@ static __inline void bus_space_write_region_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *bufp, size_t count) { - uint16_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st2(bsp, *bufp++); - ofs += 2; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_region_io_2(bsh + ofs, bufp, count); + else { + uint16_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + ia64_st2(bsp++, *bufp++); } } @@ -444,12 +542,13 @@ static __inline void bus_space_write_region_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *bufp, size_t count) { - uint32_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st4(bsp, *bufp++); - ofs += 4; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_region_io_4(bsh + ofs, bufp, count); + else { + uint32_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + ia64_st4(bsp++, *bufp++); } } @@ -457,12 +556,13 @@ static __inline void bus_space_write_region_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *bufp, size_t count) { - uint64_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st8(bsp, *bufp++); - ofs += 8; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_write_region_io_8(bsh + ofs, bufp, count); + else { + uint64_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + ia64_st8(bsp++, *bufp++); } } @@ -476,44 +576,36 @@ static __inline void bus_space_set_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t count) { - uint8_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); + while (count-- > 0) - ia64_st1(bsp, val); + bus_space_write_1(bst, bsh, ofs, val); } static __inline void bus_space_set_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t count) { - uint16_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); + while (count-- > 0) - ia64_st2(bsp, val); + bus_space_write_2(bst, bsh, ofs, val); } static __inline void bus_space_set_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t count) { - uint32_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); + while (count-- > 0) - ia64_st4(bsp, val); + bus_space_write_4(bst, bsh, ofs, val); } static __inline void bus_space_set_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t count) { - uint64_t *bsp; - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); + while (count-- > 0) - ia64_st8(bsp, val); + bus_space_write_8(bst, bsh, ofs, val); } @@ -523,16 +615,22 @@ bus_space_set_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh, * data is passed by value and written to successive bus space addresses. * Writes are unordered. */ +void bus_space_set_region_io_1(u_long, uint8_t, size_t); +void bus_space_set_region_io_2(u_long, uint16_t, size_t); +void bus_space_set_region_io_4(u_long, uint32_t, size_t); +void bus_space_set_region_io_8(u_long, uint64_t, size_t); + static __inline void bus_space_set_region_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t count) { - uint8_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st1(bsp, val); - ofs += 1; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_set_region_io_1(bsh + ofs, val, count); + else { + uint8_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + ia64_st1(bsp++, val); } } @@ -540,12 +638,13 @@ static __inline void bus_space_set_region_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t count) { - uint16_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st2(bsp, val); - ofs += 2; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_set_region_io_2(bsh + ofs, val, count); + else { + uint16_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + ia64_st2(bsp++, val); } } @@ -553,12 +652,13 @@ static __inline void bus_space_set_region_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t count) { - uint32_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st4(bsp, val); - ofs += 4; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_set_region_io_4(bsh + ofs, val, count); + else { + uint32_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + ia64_st4(bsp++, val); } } @@ -566,12 +666,13 @@ static __inline void bus_space_set_region_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t count) { - uint64_t *bsp; - while (count-- > 0) { - bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) : - __MEMIO_ADDR(bsh + ofs); - ia64_st8(bsp, val); - ofs += 8; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) + bus_space_set_region_io_4(bsh + ofs, val, count); + else { + uint64_t *bsp = (void *)(bsh + ofs); + while (count-- > 0) + ia64_st8(bsp++, val); } } @@ -583,159 +684,104 @@ bus_space_set_region_8(bus_space_tag_t bst, bus_space_handle_t bsh, * The data is read from successive bus space addresses and also written to * successive bus space addresses. Both reads and writes are unordered. */ +void bus_space_copy_region_io_1(u_long, u_long, size_t); +void bus_space_copy_region_io_2(u_long, u_long, size_t); +void bus_space_copy_region_io_4(u_long, u_long, size_t); +void bus_space_copy_region_io_8(u_long, u_long, size_t); + static __inline void -bus_space_copy_region_1(bus_space_tag_t bst, bus_space_handle_t bsh1, - bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count) +bus_space_copy_region_1(bus_space_tag_t bst, bus_space_handle_t sbsh, + bus_size_t sofs, bus_space_handle_t dbsh, bus_size_t dofs, size_t count) { - bus_addr_t dst, src; - uint8_t *dstp, *srcp; - src = bsh1 + ofs1; - dst = bsh2 + ofs2; - if (dst > src) { + uint8_t *dst, *src; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) { + bus_space_copy_region_io_1(sbsh + sofs, dbsh + dofs, count); + return; + } + + src = (void *)(sbsh + sofs); + dst = (void *)(dbsh + dofs); + if (src < dst) { src += count - 1; dst += count - 1; - while (count-- > 0) { - if (bst == IA64_BUS_SPACE_IO) { - srcp = __PIO_ADDR(src); - dstp = __PIO_ADDR(dst); - } else { - srcp = __MEMIO_ADDR(src); - dstp = __MEMIO_ADDR(dst); - } - ia64_st1(dstp, ia64_ld1(srcp)); - src -= 1; - dst -= 1; - } + while (count-- > 0) + ia64_st1(dst--, ia64_ld1(src--)); } else { - while (count-- > 0) { - if (bst == IA64_BUS_SPACE_IO) { - srcp = __PIO_ADDR(src); - dstp = __PIO_ADDR(dst); - } else { - srcp = __MEMIO_ADDR(src); - dstp = __MEMIO_ADDR(dst); - } - ia64_st1(dstp, ia64_ld1(srcp)); - src += 1; - dst += 1; - } + while (count-- > 0) + ia64_st1(dst++, ia64_ld1(src++)); } } static __inline void -bus_space_copy_region_2(bus_space_tag_t bst, bus_space_handle_t bsh1, - bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count) -{ - bus_addr_t dst, src; - uint16_t *dstp, *srcp; - src = bsh1 + ofs1; - dst = bsh2 + ofs2; - if (dst > src) { - src += (count - 1) << 1; - dst += (count - 1) << 1; - while (count-- > 0) { - if (bst == IA64_BUS_SPACE_IO) { - srcp = __PIO_ADDR(src); - dstp = __PIO_ADDR(dst); - } else { - srcp = __MEMIO_ADDR(src); - dstp = __MEMIO_ADDR(dst); - } - ia64_st2(dstp, ia64_ld2(srcp)); - src -= 2; - dst -= 2; - } +bus_space_copy_region_2(bus_space_tag_t bst, bus_space_handle_t sbsh, + bus_size_t sofs, bus_space_handle_t dbsh, bus_size_t dofs, size_t count) +{ + uint16_t *dst, *src; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) { + bus_space_copy_region_io_2(sbsh + sofs, dbsh + dofs, count); + return; + } + + src = (void *)(sbsh + sofs); + dst = (void *)(dbsh + dofs); + if (src < dst) { + src += count - 1; + dst += count - 1; + while (count-- > 0) + ia64_st2(dst--, ia64_ld2(src--)); } else { - while (count-- > 0) { - if (bst == IA64_BUS_SPACE_IO) { - srcp = __PIO_ADDR(src); - dstp = __PIO_ADDR(dst); - } else { - srcp = __MEMIO_ADDR(src); - dstp = __MEMIO_ADDR(dst); - } - ia64_st2(dstp, ia64_ld2(srcp)); - src += 2; - dst += 2; - } + while (count-- > 0) + ia64_st2(dst++, ia64_ld2(src++)); } } static __inline void -bus_space_copy_region_4(bus_space_tag_t bst, bus_space_handle_t bsh1, - bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count) -{ - bus_addr_t dst, src; - uint32_t *dstp, *srcp; - src = bsh1 + ofs1; - dst = bsh2 + ofs2; - if (dst > src) { - src += (count - 1) << 2; - dst += (count - 1) << 2; - while (count-- > 0) { - if (bst == IA64_BUS_SPACE_IO) { - srcp = __PIO_ADDR(src); - dstp = __PIO_ADDR(dst); - } else { - srcp = __MEMIO_ADDR(src); - dstp = __MEMIO_ADDR(dst); - } - ia64_st4(dstp, ia64_ld4(srcp)); - src -= 4; - dst -= 4; - } +bus_space_copy_region_4(bus_space_tag_t bst, bus_space_handle_t sbsh, + bus_size_t sofs, bus_space_handle_t dbsh, bus_size_t dofs, size_t count) +{ + uint32_t *dst, *src; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) { + bus_space_copy_region_io_4(sbsh + sofs, dbsh + dofs, count); + return; + } + + src = (void *)(sbsh + sofs); + dst = (void *)(dbsh + dofs); + if (src < dst) { + src += count - 1; + dst += count - 1; + while (count-- > 0) + ia64_st4(dst--, ia64_ld4(src--)); } else { - while (count-- > 0) { - if (bst == IA64_BUS_SPACE_IO) { - srcp = __PIO_ADDR(src); - dstp = __PIO_ADDR(dst); - } else { - srcp = __MEMIO_ADDR(src); - dstp = __MEMIO_ADDR(dst); - } - ia64_st4(dstp, ia64_ld4(srcp)); - src += 4; - dst += 4; - } + while (count-- > 0) + ia64_st4(dst++, ia64_ld4(src++)); } } static __inline void -bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t bsh1, - bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count) -{ - bus_addr_t dst, src; - uint64_t *dstp, *srcp; - src = bsh1 + ofs1; - dst = bsh2 + ofs2; - if (dst > src) { - src += (count - 1) << 3; - dst += (count - 1) << 3; - while (count-- > 0) { - if (bst == IA64_BUS_SPACE_IO) { - srcp = __PIO_ADDR(src); - dstp = __PIO_ADDR(dst); - } else { - srcp = __MEMIO_ADDR(src); - dstp = __MEMIO_ADDR(dst); - } - ia64_st8(dstp, ia64_ld8(srcp)); - src -= 8; - dst -= 8; - } +bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t sbsh, + bus_size_t sofs, bus_space_handle_t dbsh, bus_size_t dofs, size_t count) +{ + uint64_t *dst, *src; + + if (__predict_false(bst == IA64_BUS_SPACE_IO)) { + bus_space_copy_region_io_8(sbsh + sofs, dbsh + dofs, count); + return; + } + + src = (void *)(sbsh + sofs); + dst = (void *)(dbsh + dofs); + if (src < dst) { + src += count - 1; + dst += count - 1; + while (count-- > 0) + ia64_st8(dst--, ia64_ld8(src--)); } else { - while (count-- > 0) { - if (bst == IA64_BUS_SPACE_IO) { - srcp = __PIO_ADDR(src); - dstp = __PIO_ADDR(dst); - } else { - srcp = __MEMIO_ADDR(src); - dstp = __MEMIO_ADDR(dst); - } - ia64_st8(dstp, ia64_ld8(srcp)); - src += 8; - dst += 8; - } + while (count-- > 0) + ia64_st8(dst++, ia64_ld8(src++)); } } @@ -744,86 +790,51 @@ bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t bsh1, * Stream accesses are the same as normal accesses on ia64; there are no * supported bus systems with an endianess different from the host one. */ -#define bus_space_read_stream_1(t, h, o) \ - bus_space_read_1(t, h, o) -#define bus_space_read_stream_2(t, h, o) \ - bus_space_read_2(t, h, o) -#define bus_space_read_stream_4(t, h, o) \ - bus_space_read_4(t, h, o) -#define bus_space_read_stream_8(t, h, o) \ - bus_space_read_8(t, h, o) - -#define bus_space_read_multi_stream_1(t, h, o, a, c) \ - bus_space_read_multi_1(t, h, o, a, c) -#define bus_space_read_multi_stream_2(t, h, o, a, c) \ - bus_space_read_multi_2(t, h, o, a, c) -#define bus_space_read_multi_stream_4(t, h, o, a, c) \ - bus_space_read_multi_4(t, h, o, a, c) -#define bus_space_read_multi_stream_8(t, h, o, a, c) \ - bus_space_read_multi_8(t, h, o, a, c) - -#define bus_space_write_stream_1(t, h, o, v) \ - bus_space_write_1(t, h, o, v) -#define bus_space_write_stream_2(t, h, o, v) \ - bus_space_write_2(t, h, o, v) -#define bus_space_write_stream_4(t, h, o, v) \ - bus_space_write_4(t, h, o, v) -#define bus_space_write_stream_8(t, h, o, v) \ - bus_space_write_8(t, h, o, v) - -#define bus_space_write_multi_stream_1(t, h, o, a, c) \ - bus_space_write_multi_1(t, h, o, a, c) -#define bus_space_write_multi_stream_2(t, h, o, a, c) \ - bus_space_write_multi_2(t, h, o, a, c) -#define bus_space_write_multi_stream_4(t, h, o, a, c) \ - bus_space_write_multi_4(t, h, o, a, c) -#define bus_space_write_multi_stream_8(t, h, o, a, c) \ - bus_space_write_multi_8(t, h, o, a, c) - -#define bus_space_set_multi_stream_1(t, h, o, v, c) \ - bus_space_set_multi_1(t, h, o, v, c) -#define bus_space_set_multi_stream_2(t, h, o, v, c) \ - bus_space_set_multi_2(t, h, o, v, c) -#define bus_space_set_multi_stream_4(t, h, o, v, c) \ - bus_space_set_multi_4(t, h, o, v, c) -#define bus_space_set_multi_stream_8(t, h, o, v, c) \ - bus_space_set_multi_8(t, h, o, v, c) - -#define bus_space_read_region_stream_1(t, h, o, a, c) \ - bus_space_read_region_1(t, h, o, a, c) -#define bus_space_read_region_stream_2(t, h, o, a, c) \ - bus_space_read_region_2(t, h, o, a, c) -#define bus_space_read_region_stream_4(t, h, o, a, c) \ - bus_space_read_region_4(t, h, o, a, c) -#define bus_space_read_region_stream_8(t, h, o, a, c) \ - bus_space_read_region_8(t, h, o, a, c) - -#define bus_space_write_region_stream_1(t, h, o, a, c) \ - bus_space_write_region_1(t, h, o, a, c) -#define bus_space_write_region_stream_2(t, h, o, a, c) \ - bus_space_write_region_2(t, h, o, a, c) -#define bus_space_write_region_stream_4(t, h, o, a, c) \ - bus_space_write_region_4(t, h, o, a, c) -#define bus_space_write_region_stream_8(t, h, o, a, c) \ - bus_space_write_region_8(t, h, o, a, c) - -#define bus_space_set_region_stream_1(t, h, o, v, c) \ - bus_space_set_region_1(t, h, o, v, c) -#define bus_space_set_region_stream_2(t, h, o, v, c) \ - bus_space_set_region_2(t, h, o, v, c) -#define bus_space_set_region_stream_4(t, h, o, v, c) \ - bus_space_set_region_4(t, h, o, v, c) -#define bus_space_set_region_stream_8(t, h, o, v, c) \ - bus_space_set_region_8(t, h, o, v, c) - -#define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \ - bus_space_copy_region_1(t, h1, o1, h2, o2, c) -#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \ - bus_space_copy_region_2(t, h1, o1, h2, o2, c) -#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \ - bus_space_copy_region_4(t, h1, o1, h2, o2, c) -#define bus_space_copy_region_stream_8(t, h1, o1, h2, o2, c) \ - bus_space_copy_region_8(t, h1, o1, h2, o2, c) + +#define bus_space_read_stream_1 bus_space_read_1 +#define bus_space_read_stream_2 bus_space_read_2 +#define bus_space_read_stream_4 bus_space_read_4 +#define bus_space_read_stream_8 bus_space_read_8 + +#define bus_space_write_stream_1 bus_space_write_1 +#define bus_space_write_stream_2 bus_space_write_2 +#define bus_space_write_stream_4 bus_space_write_4 +#define bus_space_write_stream_8 bus_space_write_8 + +#define bus_space_read_multi_stream_1 bus_space_read_multi_1 +#define bus_space_read_multi_stream_2 bus_space_read_multi_2 +#define bus_space_read_multi_stream_4 bus_space_read_multi_4 +#define bus_space_read_multi_stream_8 bus_space_read_multi_8 + +#define bus_space_write_multi_stream_1 bus_space_write_multi_1 +#define bus_space_write_multi_stream_2 bus_space_write_multi_2 +#define bus_space_write_multi_stream_4 bus_space_write_multi_4 +#define bus_space_write_multi_stream_8 bus_space_write_multi_8 + +#define bus_space_read_region_stream_1 bus_space_read_region_1 +#define bus_space_read_region_stream_2 bus_space_read_region_2 +#define bus_space_read_region_stream_4 bus_space_read_region_4 +#define bus_space_read_region_stream_8 bus_space_read_region_8 + +#define bus_space_write_region_stream_1 bus_space_write_region_1 +#define bus_space_write_region_stream_2 bus_space_write_region_2 +#define bus_space_write_region_stream_4 bus_space_write_region_4 +#define bus_space_write_region_stream_8 bus_space_write_region_8 + +#define bus_space_set_multi_stream_1 bus_space_set_multi_1 +#define bus_space_set_multi_stream_2 bus_space_set_multi_2 +#define bus_space_set_multi_stream_4 bus_space_set_multi_4 +#define bus_space_set_multi_stream_8 bus_space_set_multi_8 + +#define bus_space_set_region_stream_1 bus_space_set_region_1 +#define bus_space_set_region_stream_2 bus_space_set_region_2 +#define bus_space_set_region_stream_4 bus_space_set_region_4 +#define bus_space_set_region_stream_8 bus_space_set_region_8 + +#define bus_space_copy_region_stream_1 bus_space_copy_region_1 +#define bus_space_copy_region_stream_2 bus_space_copy_region_2 +#define bus_space_copy_region_stream_4 bus_space_copy_region_4 +#define bus_space_copy_region_stream_8 bus_space_copy_region_8 #include <machine/bus_dma.h> diff --git a/sys/ia64/include/cpufunc.h b/sys/ia64/include/cpufunc.h index fe46911..9ae06a2 100644 --- a/sys/ia64/include/cpufunc.h +++ b/sys/ia64/include/cpufunc.h @@ -54,126 +54,6 @@ breakpoint(void) #define HAVE_INLINE_FFS #define ffs(x) __builtin_ffs(x) -#define __MEMIO_ADDR(x) (void*)(IA64_PHYS_TO_RR6(x)) -extern void *ia64_ioport_address(u_int); -#define __PIO_ADDR(x) ia64_ioport_address(x) - -/* - * I/O port reads with ia32 semantics. - */ -static __inline uint8_t -inb(unsigned int port) -{ - uint8_t v; - - ia64_mf(); - v = ia64_ld1(__PIO_ADDR(port)); - ia64_mf_a(); - ia64_mf(); - return (v); -} - -static __inline uint16_t -inw(unsigned int port) -{ - uint16_t v; - - ia64_mf(); - v = ia64_ld2(__PIO_ADDR(port)); - ia64_mf_a(); - ia64_mf(); - return (v); -} - -static __inline uint32_t -inl(unsigned int port) -{ - uint32_t v; - - ia64_mf(); - v = ia64_ld4(__PIO_ADDR(port)); - ia64_mf_a(); - ia64_mf(); - return (v); -} - -static __inline void -insb(unsigned int port, void *addr, size_t count) -{ - uint8_t *buf = addr; - while (count--) - *buf++ = inb(port); -} - -static __inline void -insw(unsigned int port, void *addr, size_t count) -{ - uint16_t *buf = addr; - while (count--) - *buf++ = inw(port); -} - -static __inline void -insl(unsigned int port, void *addr, size_t count) -{ - uint32_t *buf = addr; - while (count--) - *buf++ = inl(port); -} - -static __inline void -outb(unsigned int port, uint8_t data) -{ - - ia64_mf(); - ia64_st1(__PIO_ADDR(port), data); - ia64_mf_a(); - ia64_mf(); -} - -static __inline void -outw(unsigned int port, uint16_t data) -{ - - ia64_mf(); - ia64_st2(__PIO_ADDR(port), data); - ia64_mf_a(); - ia64_mf(); -} - -static __inline void -outl(unsigned int port, uint32_t data) -{ - - ia64_mf(); - ia64_st4(__PIO_ADDR(port), data); - ia64_mf_a(); - ia64_mf(); -} - -static __inline void -outsb(unsigned int port, const void *addr, size_t count) -{ - const uint8_t *buf = addr; - while (count--) - outb(port, *buf++); -} - -static __inline void -outsw(unsigned int port, const void *addr, size_t count) -{ - const uint16_t *buf = addr; - while (count--) - outw(port, *buf++); -} - -static __inline void -outsl(unsigned int port, const void *addr, size_t count) -{ - const uint32_t *buf = addr; - while (count--) - outl(port, *buf++); -} static __inline void disable_intr(void) |
