diff options
| -rw-r--r-- | sys/mips/atheros/ar71xx_setup.c | 20 | ||||
| -rw-r--r-- | sys/mips/atheros/ar71xxreg.h | 10 | ||||
| -rw-r--r-- | sys/mips/atheros/ar91xx_chip.c | 171 | ||||
| -rw-r--r-- | sys/mips/atheros/ar91xx_chip.h | 34 | ||||
| -rw-r--r-- | sys/mips/atheros/files.ar71xx | 1 |
5 files changed, 236 insertions, 0 deletions
diff --git a/sys/mips/atheros/ar71xx_setup.c b/sys/mips/atheros/ar71xx_setup.c index bce383e..000a426 100644 --- a/sys/mips/atheros/ar71xx_setup.c +++ b/sys/mips/atheros/ar71xx_setup.c @@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$"); #include <mips/atheros/ar71xx_cpudef.h> #include <mips/atheros/ar71xx_chip.h> +#include <mips/atheros/ar91xx_chip.h> #define AR71XX_SYS_TYPE_LEN 128 @@ -104,6 +105,25 @@ ar71xx_detect_sys_type(void) } break; + case REV_ID_MAJOR_AR913X: + minor = id & AR91XX_REV_ID_MINOR_MASK; + rev = id >> AR91XX_REV_ID_REVISION_SHIFT; + rev &= AR91XX_REV_ID_REVISION_MASK; + ar71xx_cpu_ops = &ar91xx_chip_def; + switch (minor) { + case AR91XX_REV_ID_MINOR_AR9130: + ar71xx_soc = AR71XX_SOC_AR9130; + chip = "9130"; + break; + + case AR91XX_REV_ID_MINOR_AR9132: + ar71xx_soc = AR71XX_SOC_AR9132; + chip = "9132"; + break; + } + break; + + default: panic("ar71xx: unknown chip id:0x%08x\n", id); } diff --git a/sys/mips/atheros/ar71xxreg.h b/sys/mips/atheros/ar71xxreg.h index 0f6fddc..f4772a8 100644 --- a/sys/mips/atheros/ar71xxreg.h +++ b/sys/mips/atheros/ar71xxreg.h @@ -195,6 +195,9 @@ #define AR71XX_PLL_ETH_EXT_CLK 0x18050018 #define AR71XX_PLL_PCI_CLK 0x1805001C +/* Reset block */ +#define AR71XX_RST_BLOCK_BASE 0x18060000 + #define AR71XX_RST_WDOG_CONTROL 0x18060008 #define RST_WDOG_LAST (1 << 31) #define RST_WDOG_ACTION_MASK 3 @@ -253,6 +256,13 @@ #define AR71XX_REV_ID_REVISION_MASK 0x3 #define AR71XX_REV_ID_REVISION_SHIFT 2 +/* AR91XX chipset revision details */ +#define AR91XX_REV_ID_MINOR_MASK 0x3 +#define AR91XX_REV_ID_MINOR_AR9130 0x0 +#define AR91XX_REV_ID_MINOR_AR9132 0x1 +#define AR91XX_REV_ID_REVISION_MASK 0x3 +#define AR91XX_REV_ID_REVISION_SHIFT 2 + /* * GigE adapters region */ diff --git a/sys/mips/atheros/ar91xx_chip.c b/sys/mips/atheros/ar91xx_chip.c new file mode 100644 index 0000000..5ba56be --- /dev/null +++ b/sys/mips/atheros/ar91xx_chip.c @@ -0,0 +1,171 @@ +/*- + * Copyright (c) 2010 Adrian Chadd + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <machine/cpuregs.h> + +#include <mips/sentry5/s5reg.h> + +#include "opt_ddb.h" + +#include <sys/param.h> +#include <sys/conf.h> +#include <sys/kernel.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/cons.h> +#include <sys/kdb.h> +#include <sys/reboot.h> + +#include <vm/vm.h> +#include <vm/vm_page.h> + +#include <net/ethernet.h> + +#include <machine/clock.h> +#include <machine/cpu.h> +#include <machine/hwfunc.h> +#include <machine/md_var.h> +#include <machine/trap.h> +#include <machine/vmparam.h> + +#include <mips/atheros/ar71xxreg.h> +#include <mips/atheros/ar91xxreg.h> + +#include <mips/atheros/ar71xx_cpudef.h> +#include <mips/atheros/ar91xx_chip.h> + +static void +ar91xx_chip_detect_mem_size(void) +{ +} + +static void +ar91xx_chip_detect_sys_frequency(void) +{ + uint32_t pll; + uint32_t freq; + uint32_t div; + + pll = ATH_READ_REG(AR91XX_PLL_REG_CPU_CONFIG); + + div = ((pll >> AR91XX_PLL_DIV_SHIFT) & AR91XX_PLL_DIV_MASK); + freq = div * AR91XX_BASE_FREQ; + + u_ar71xx_cpu_freq = freq; + + div = ((pll >> AR91XX_DDR_DIV_SHIFT) & AR91XX_DDR_DIV_MASK) + 1; + u_ar71xx_ddr_freq = freq / div; + + div = (((pll >> AR91XX_AHB_DIV_SHIFT) & AR91XX_AHB_DIV_MASK) + 1) * 2; + u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div; +} + +static void +ar91xx_chip_device_stop(uint32_t mask) +{ + uint32_t reg; + + reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); + ATH_WRITE_REG(AR91XX_RESET_REG_RESET_MODULE, reg | mask); +} + +static void +ar91xx_chip_device_start(uint32_t mask) +{ + uint32_t reg; + + reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); + ATH_WRITE_REG(AR91XX_RESET_REG_RESET_MODULE, reg & ~mask); +} + +static int +ar91xx_chip_device_stopped(uint32_t mask) +{ + uint32_t reg; + + reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); + return ((reg & mask) == mask); +} + +static void +ar91xx_chip_set_pll_ge0(int speed) +{ +} + +static void +ar91xx_chip_set_pll_ge1(int speed) +{ +} + +static void +ar91xx_chip_ddr_flush_ge0(void) +{ + ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0); +} + +static void +ar91xx_chip_ddr_flush_ge1(void) +{ + ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1); +} + +static uint32_t +ar91xx_chip_get_eth_pll(unsigned int mac, int speed) +{ + return 0; +} + +static void +ar91xx_chip_init_usb_peripheral(void) +{ + ar71xx_device_stop(AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE); + DELAY(100); + + ar71xx_device_start(RST_RESET_USB_HOST); + DELAY(100); + + ar71xx_device_start(RST_RESET_USB_PHY); + DELAY(100); +} + +struct ar71xx_cpu_def ar91xx_chip_def = { + &ar91xx_chip_detect_mem_size, + &ar91xx_chip_detect_sys_frequency, + &ar91xx_chip_device_stop, + &ar91xx_chip_device_start, + &ar91xx_chip_device_stopped, + &ar91xx_chip_set_pll_ge0, + &ar91xx_chip_set_pll_ge1, + &ar91xx_chip_ddr_flush_ge0, + &ar91xx_chip_ddr_flush_ge1, + &ar91xx_chip_get_eth_pll, + NULL, + &ar91xx_chip_init_usb_peripheral, +}; diff --git a/sys/mips/atheros/ar91xx_chip.h b/sys/mips/atheros/ar91xx_chip.h new file mode 100644 index 0000000..a98c264 --- /dev/null +++ b/sys/mips/atheros/ar91xx_chip.h @@ -0,0 +1,34 @@ +/*- + * Copyright (c) 2010 Adrian Chadd + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* $FreeBSD$ */ + +#ifndef __AR91XX_CHIP_H__ +#define __AR91XX_CHIP_H__ + +extern struct ar71xx_cpu_def ar91xx_chip_def; + +#endif diff --git a/sys/mips/atheros/files.ar71xx b/sys/mips/atheros/files.ar71xx index e7daa1c..c8d00e5 100644 --- a/sys/mips/atheros/files.ar71xx +++ b/sys/mips/atheros/files.ar71xx @@ -17,3 +17,4 @@ mips/mips/intr_machdep.c standard mips/mips/tick.c standard mips/atheros/ar71xx_setup.c standard mips/atheros/ar71xx_chip.c standard +mips/atheros/ar91xx_chip.c standard |
