Move cxgbtool from usr.sbin to tools/tools.

Approved by:	re (kib)
MFC after:	1 month

7 files changed, 0 insertions, 11278 deletions

diff --git a/usr.sbin/cxgbtool/Makefile b/usr.sbin/cxgbtool/Makefile
deleted file mode 100644
index f8e5175..0000000
--- a/usr.sbin/cxgbtool/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-# $FreeBSD$
-
-PROG=	cxgbtool
-SRCS=	cxgbtool.c
-NO_MAN=
-CFLAGS+= -I${.CURDIR}/../../sys/dev/cxgb -I.
-CFLAGS+= -DCONFIG_T3_REGS -DCHELSIO_INTERNAL
-
-install:
-
-.include <bsd.prog.mk>
diff --git a/usr.sbin/cxgbtool/cxgbtool.c b/usr.sbin/cxgbtool/cxgbtool.c
deleted file mode 100644
index f73f1a4..0000000
--- a/usr.sbin/cxgbtool/cxgbtool.c
+++ /dev/null
@@ -1,1771 +0,0 @@
-/**************************************************************************
-
-Copyright (c) 2007-2010, Chelsio Inc.
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
-    this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
-    notice, this list of conditions and the following disclaimer in the
-    documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Chelsio Corporation nor the names of its
-    contributors may be used to endorse or promote products derived from
-    this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-
-***************************************************************************/
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <err.h>
-#include <errno.h>
-#include <inttypes.h>
-#include <sys/param.h>
-#include <sys/time.h>
-#include <sys/ioctl.h>
-#include <sys/socket.h>
-
-#include <netinet/in.h>
-#include <arpa/inet.h>
-
-#include <net/if.h>
-#include <net/if_var.h>
-#include <net/if_types.h>
-#include <sys/endian.h>
-
-#define NMTUS 16
-#define TCB_SIZE 128
-#define TCB_WORDS (TCB_SIZE / 4)
-#define PROTO_SRAM_LINES 128
-#define PROTO_SRAM_LINE_BITS 132
-#define PROTO_SRAM_LINE_NIBBLES (132 / 4)
-#define PROTO_SRAM_SIZE (PROTO_SRAM_LINE_NIBBLES * PROTO_SRAM_LINES / 2)
-#define PROTO_SRAM_EEPROM_ADDR 4096
-
-#include <cxgb_ioctl.h>
-#include <common/cxgb_regs.h>
-#include "version.h"
-
-struct reg_info { 
-        const char *name; 
-        uint16_t addr; 
-        uint16_t len; 
-}; 
- 
-
-#include "reg_defs.c"
-#if defined(CONFIG_T3_REGS)
-# include "reg_defs_t3.c"
-# include "reg_defs_t3b.c"
-# include "reg_defs_t3c.c"
-#endif
-
-static const char *progname;
-
-static void
-usage(FILE *fp)
-{
-	fprintf(fp, "Usage: %s <interface> [operation]\n", progname);
-	fprintf(fp,
-	    	"\tclearstats                          clear MAC statistics\n"
-		"\tcontext <type> <id>                 show an SGE context\n"
-		"\tdesc <qset> <queue> <idx> [<cnt>]   dump SGE descriptors\n"
-		"\tfilter <idx> [<param> <val>] ...    set a filter\n"
-		"\tfilter <idx> delete|clear           delete a filter\n"
-		"\tfilter list                         list all filters\n"
-		"\tioqs                                dump uP IOQs\n"
-		"\tla                                  dump uP logic analyzer info\n"
-		"\tloadboot <boot image>               download boot image\n"
-		"\tloadfw <FW image>                   download firmware\n"
-		"\tmdio <phy_addr> <mmd_addr>\n"
-	        "\t     <reg_addr> [<val>]             read/write MDIO register\n"
-		"\tmemdump cm|tx|rx <addr> <len>       dump a mem range\n"
-		"\tmeminfo                             show memory info\n"
-		"\tmtus [<mtu0>...<mtuN>]              read/write MTU table\n"
-		"\tpktsched port <idx> <min> <max>     set TX port scheduler params\n"
-		"\tpktsched tunnelq <idx> <max>\n"
-		"\t         <binding>                  set TX tunnelq scheduler params\n"
-		"\tpktsched tx <idx>\n"
-	        "\t         [<param> <val>] ...        set Tx HW scheduler\n"
-		"\tpm [<TX page spec> <RX page spec>]  read/write PM config\n"
-		"\tproto                               read proto SRAM\n"
-		"\tqset                                read qset parameters\n"
-		"\tqsets                               read # of qsets\n"
-		"\treg <address>[=<val>]               read/write register\n"
-		"\tregdump [<module>]                  dump registers\n"
-		"\ttcamdump <address> <count>          show TCAM contents\n"
-		"\ttcb <index>                         read TCB\n"
-		"\ttrace tx|rx|all on|off [not]\n"
-	        "\t      [<param> <val>[:<mask>]] ...  write trace parameters\n"
-		);
-	exit(fp == stderr ? 1 : 0);
-}
-
-static int
-doit(const char *iff_name, unsigned long cmd, void *data)
-{
-	static int fd = 0;
-	
-	if (fd == 0) {
-		char buf[64];
-		snprintf(buf, 64, "/dev/%s", iff_name);
-
-		if ((fd = open(buf, O_RDWR)) < 0)
-			return -1;
-	}
-	
-	return ioctl(fd, cmd, data) < 0 ? -1 : 0;
-}
-
-static int
-get_int_arg(const char *s, uint32_t *valp)
-{
-	char *p;
-
-	*valp = strtoul(s, &p, 0);
-	if (*p) {
-		warnx("bad parameter \"%s\"", s);
-		return -1;
-	}
-	return 0;
-}
-
-static uint32_t
-read_reg(const char *iff_name, uint32_t addr)
-{
-	struct ch_reg reg;
-
-	reg.addr = addr;
-	
-	if (doit(iff_name, CHELSIO_GETREG, &reg) < 0)
-		err(1, "register read");
-	return reg.val;
-}
-
-static void
-write_reg(const char *iff_name, uint32_t addr, uint32_t val)
-{
-	struct ch_reg ch_reg;
-
-	ch_reg.addr = addr;
-	ch_reg.val = val;
-	
-	if (doit(iff_name, CHELSIO_SETREG, &ch_reg) < 0)
-		err(1, "register write");
-}
-
-static int
-register_io(int argc, char *argv[], int start_arg,
-		       const char *iff_name)
-{
-	char *p;
-	uint32_t addr, val = 0, w = 0;
-
-	if (argc != start_arg + 1) return -1;
-
-	addr = strtoul(argv[start_arg], &p, 0);
-	if (p == argv[start_arg]) return -1;
-	if (*p == '=' && p[1]) {
-		val = strtoul(p + 1, &p, 0);
-		w = 1;
-	}
-	if (*p) {
-		warnx("bad parameter \"%s\"", argv[start_arg]);
-		return -1;
-	}
-
-	if (w)
-		write_reg(iff_name, addr, val);
-	else {
-		val = read_reg(iff_name, addr);
-		printf("%#x [%u]\n", val, val);
-	}
-	return 0;
-}
-
-static int
-mdio_io(int argc, char *argv[], int start_arg, const char *iff_name) 
-{ 
-        struct ch_mii_data p;
-        unsigned int cmd, phy_addr, reg, mmd, val; 
- 
-        if (argc == start_arg + 3) 
-                cmd = CHELSIO_GET_MIIREG; 
-        else if (argc == start_arg + 4) 
-                cmd = CHELSIO_SET_MIIREG; 
-        else 
-                return -1; 
- 
-        if (get_int_arg(argv[start_arg], &phy_addr) || 
-            get_int_arg(argv[start_arg + 1], &mmd) || 
-            get_int_arg(argv[start_arg + 2], &reg) || 
-            (cmd == CHELSIO_SET_MIIREG && get_int_arg(argv[start_arg + 3], &val))) 
-                return -1; 
-
-        p.phy_id  = phy_addr | (mmd << 8); 
-        p.reg_num = reg; 
-        p.val_in  = val; 
- 
-        if (doit(iff_name, cmd, &p) < 0) 
-                err(1, "MDIO %s", cmd == CHELSIO_GET_MIIREG ? "read" : "write");
-        if (cmd == CHELSIO_GET_MIIREG) 
-                printf("%#x [%u]\n", p.val_out, p.val_out); 
-        return 0; 
-} 
-
-static inline
-uint32_t xtract(uint32_t val, int shift, int len)
-{
-	return (val >> shift) & ((1 << len) - 1);
-}
-
-static int
-dump_block_regs(const struct reg_info *reg_array, uint32_t *regs)
-{
-	uint32_t reg_val = 0; // silence compiler warning
-
-	for ( ; reg_array->name; ++reg_array)
-		if (!reg_array->len) {
-			reg_val = regs[reg_array->addr / 4];
-			printf("[%#5x] %-40s %#-10x [%u]\n", reg_array->addr,
-			       reg_array->name, reg_val, reg_val);
-		} else {
-			uint32_t v = xtract(reg_val, reg_array->addr,
-					    reg_array->len);
-
-			printf("        %-40s %#-10x [%u]\n", reg_array->name,
-			       v, v);
-		}
-	return 1;
-}
-
-static int
-dump_regs_t2(int argc, char *argv[], int start_arg, uint32_t *regs)
-{
-	int match = 0;
-	char *block_name = NULL;
-
-	if (argc == start_arg + 1)
-		block_name = argv[start_arg];
-	else if (argc != start_arg)
-		return -1;
-
-	if (!block_name || !strcmp(block_name, "sge"))
-		match += dump_block_regs(sge_regs, regs);
-	if (!block_name || !strcmp(block_name, "mc3"))
-		match += dump_block_regs(mc3_regs, regs);
-	if (!block_name || !strcmp(block_name, "mc4"))
-		match += dump_block_regs(mc4_regs, regs);
-	if (!block_name || !strcmp(block_name, "tpi"))
-		match += dump_block_regs(tpi_regs, regs);
-	if (!block_name || !strcmp(block_name, "tp"))
-		match += dump_block_regs(tp_regs, regs);
-	if (!block_name || !strcmp(block_name, "rat"))
-		match += dump_block_regs(rat_regs, regs);
-	if (!block_name || !strcmp(block_name, "cspi"))
-		match += dump_block_regs(cspi_regs, regs);
-	if (!block_name || !strcmp(block_name, "espi"))
-		match += dump_block_regs(espi_regs, regs);
-	if (!block_name || !strcmp(block_name, "ulp"))
-		match += dump_block_regs(ulp_regs, regs);
-	if (!block_name || !strcmp(block_name, "pl"))
-		match += dump_block_regs(pl_regs, regs);
-	if (!block_name || !strcmp(block_name, "mc5"))
-		match += dump_block_regs(mc5_regs, regs);
-	if (!match)
-		errx(1, "unknown block \"%s\"", block_name);
-	return 0;
-}
-
-#if defined(CONFIG_T3_REGS)
-static int
-dump_regs_t3(int argc, char *argv[], int start_arg, uint32_t *regs, int is_pcie)
-{
-	int match = 0;
-	char *block_name = NULL;
-
-	if (argc == start_arg + 1)
-		block_name = argv[start_arg];
-	else if (argc != start_arg)
-		return -1;
-
-	if (!block_name || !strcmp(block_name, "sge"))
-		match += dump_block_regs(sge3_regs, regs);
-	if (!block_name || !strcmp(block_name, "pci"))
-		match += dump_block_regs(is_pcie ? pcie0_regs : pcix1_regs,
-					 regs);
-	if (!block_name || !strcmp(block_name, "t3dbg"))
-		match += dump_block_regs(t3dbg_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmrx"))
-		match += dump_block_regs(mc7_pmrx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmtx"))
-		match += dump_block_regs(mc7_pmtx_regs, regs);
-	if (!block_name || !strcmp(block_name, "cm"))
-		match += dump_block_regs(mc7_cm_regs, regs);
-	if (!block_name || !strcmp(block_name, "cim"))
-		match += dump_block_regs(cim_regs, regs);
-	if (!block_name || !strcmp(block_name, "tp"))
-		match += dump_block_regs(tp1_regs, regs);
-	if (!block_name || !strcmp(block_name, "ulp_rx"))
-		match += dump_block_regs(ulp2_rx_regs, regs);
-	if (!block_name || !strcmp(block_name, "ulp_tx"))
-		match += dump_block_regs(ulp2_tx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmrx"))
-		match += dump_block_regs(pm1_rx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmtx"))
-		match += dump_block_regs(pm1_tx_regs, regs);
-	if (!block_name || !strcmp(block_name, "mps"))
-		match += dump_block_regs(mps0_regs, regs);
-	if (!block_name || !strcmp(block_name, "cplsw"))
-		match += dump_block_regs(cpl_switch_regs, regs);
-	if (!block_name || !strcmp(block_name, "smb"))
-		match += dump_block_regs(smb0_regs, regs);
-	if (!block_name || !strcmp(block_name, "i2c"))
-		match += dump_block_regs(i2cm0_regs, regs);
-	if (!block_name || !strcmp(block_name, "mi1"))
-		match += dump_block_regs(mi1_regs, regs);
-	if (!block_name || !strcmp(block_name, "sf"))
-		match += dump_block_regs(sf1_regs, regs);
-	if (!block_name || !strcmp(block_name, "pl"))
-		match += dump_block_regs(pl3_regs, regs);
-	if (!block_name || !strcmp(block_name, "mc5"))
-		match += dump_block_regs(mc5a_regs, regs);
-	if (!block_name || !strcmp(block_name, "xgmac0"))
-		match += dump_block_regs(xgmac0_0_regs, regs);
-	if (!block_name || !strcmp(block_name, "xgmac1"))
-		match += dump_block_regs(xgmac0_1_regs, regs);
-	if (!match)
-		errx(1, "unknown block \"%s\"", block_name);
-	return 0;
-}
-
-static int
-dump_regs_t3b(int argc, char *argv[], int start_arg, uint32_t *regs,
-    int is_pcie)
-{
-	int match = 0;
-	char *block_name = NULL;
-
-	if (argc == start_arg + 1)
-		block_name = argv[start_arg];
-	else if (argc != start_arg)
-		return -1;
-
-	if (!block_name || !strcmp(block_name, "sge"))
-		match += dump_block_regs(t3b_sge3_regs, regs);
-	if (!block_name || !strcmp(block_name, "pci"))
-		match += dump_block_regs(is_pcie ? t3b_pcie0_regs :
-						   t3b_pcix1_regs, regs);
-	if (!block_name || !strcmp(block_name, "t3dbg"))
-		match += dump_block_regs(t3b_t3dbg_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmrx"))
-		match += dump_block_regs(t3b_mc7_pmrx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmtx"))
-		match += dump_block_regs(t3b_mc7_pmtx_regs, regs);
-	if (!block_name || !strcmp(block_name, "cm"))
-		match += dump_block_regs(t3b_mc7_cm_regs, regs);
-	if (!block_name || !strcmp(block_name, "cim"))
-		match += dump_block_regs(t3b_cim_regs, regs);
-	if (!block_name || !strcmp(block_name, "tp"))
-		match += dump_block_regs(t3b_tp1_regs, regs);
-	if (!block_name || !strcmp(block_name, "ulp_rx"))
-		match += dump_block_regs(t3b_ulp2_rx_regs, regs);
-	if (!block_name || !strcmp(block_name, "ulp_tx"))
-		match += dump_block_regs(t3b_ulp2_tx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmrx"))
-		match += dump_block_regs(t3b_pm1_rx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmtx"))
-		match += dump_block_regs(t3b_pm1_tx_regs, regs);
-	if (!block_name || !strcmp(block_name, "mps"))
-		match += dump_block_regs(t3b_mps0_regs, regs);
-	if (!block_name || !strcmp(block_name, "cplsw"))
-		match += dump_block_regs(t3b_cpl_switch_regs, regs);
-	if (!block_name || !strcmp(block_name, "smb"))
-		match += dump_block_regs(t3b_smb0_regs, regs);
-	if (!block_name || !strcmp(block_name, "i2c"))
-		match += dump_block_regs(t3b_i2cm0_regs, regs);
-	if (!block_name || !strcmp(block_name, "mi1"))
-		match += dump_block_regs(t3b_mi1_regs, regs);
-	if (!block_name || !strcmp(block_name, "sf"))
-		match += dump_block_regs(t3b_sf1_regs, regs);
-	if (!block_name || !strcmp(block_name, "pl"))
-		match += dump_block_regs(t3b_pl3_regs, regs);
-	if (!block_name || !strcmp(block_name, "mc5"))
-		match += dump_block_regs(t3b_mc5a_regs, regs);
-	if (!block_name || !strcmp(block_name, "xgmac0"))
-		match += dump_block_regs(t3b_xgmac0_0_regs, regs);
-	if (!block_name || !strcmp(block_name, "xgmac1"))
-		match += dump_block_regs(t3b_xgmac0_1_regs, regs);
-	if (!match)
-		errx(1, "unknown block \"%s\"", block_name);
-	return 0;
-}
-
-static int
-dump_regs_t3c(int argc, char *argv[], int start_arg, uint32_t *regs,
-    int is_pcie)
-{
-	int match = 0;
-	char *block_name = NULL;
-
-	if (argc == start_arg + 1)
-		block_name = argv[start_arg];
-	else if (argc != start_arg)
-		return -1;
-
-	if (!block_name || !strcmp(block_name, "sge"))
-		match += dump_block_regs(t3c_sge3_regs, regs);
-	if (!block_name || !strcmp(block_name, "pci"))
-		match += dump_block_regs(is_pcie ? t3c_pcie0_regs :
-						   t3c_pcix1_regs, regs);
-	if (!block_name || !strcmp(block_name, "t3dbg"))
-		match += dump_block_regs(t3c_t3dbg_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmrx"))
-		match += dump_block_regs(t3c_mc7_pmrx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmtx"))
-		match += dump_block_regs(t3c_mc7_pmtx_regs, regs);
-	if (!block_name || !strcmp(block_name, "cm"))
-		match += dump_block_regs(t3c_mc7_cm_regs, regs);
-	if (!block_name || !strcmp(block_name, "cim"))
-		match += dump_block_regs(t3c_cim_regs, regs);
-	if (!block_name || !strcmp(block_name, "tp"))
-		match += dump_block_regs(t3c_tp1_regs, regs);
-	if (!block_name || !strcmp(block_name, "ulp_rx"))
-		match += dump_block_regs(t3c_ulp2_rx_regs, regs);
-	if (!block_name || !strcmp(block_name, "ulp_tx"))
-		match += dump_block_regs(t3c_ulp2_tx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmrx"))
-		match += dump_block_regs(t3c_pm1_rx_regs, regs);
-	if (!block_name || !strcmp(block_name, "pmtx"))
-		match += dump_block_regs(t3c_pm1_tx_regs, regs);
-	if (!block_name || !strcmp(block_name, "mps"))
-		match += dump_block_regs(t3c_mps0_regs, regs);
-	if (!block_name || !strcmp(block_name, "cplsw"))
-		match += dump_block_regs(t3c_cpl_switch_regs, regs);
-	if (!block_name || !strcmp(block_name, "smb"))
-		match += dump_block_regs(t3c_smb0_regs, regs);
-	if (!block_name || !strcmp(block_name, "i2c"))
-		match += dump_block_regs(t3c_i2cm0_regs, regs);
-	if (!block_name || !strcmp(block_name, "mi1"))
-		match += dump_block_regs(t3c_mi1_regs, regs);
-	if (!block_name || !strcmp(block_name, "sf"))
-		match += dump_block_regs(t3c_sf1_regs, regs);
-	if (!block_name || !strcmp(block_name, "pl"))
-		match += dump_block_regs(t3c_pl3_regs, regs);
-	if (!block_name || !strcmp(block_name, "mc5"))
-		match += dump_block_regs(t3c_mc5a_regs, regs);
-	if (!block_name || !strcmp(block_name, "xgmac0"))
-		match += dump_block_regs(t3c_xgmac0_0_regs, regs);
-	if (!block_name || !strcmp(block_name, "xgmac1"))
-		match += dump_block_regs(t3c_xgmac0_1_regs, regs);
-	if (!match)
-		errx(1, "unknown block \"%s\"", block_name);
-	return 0;
-}
-#endif
-
-static int
-dump_regs(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	int vers, revision, is_pcie;
-	struct ch_ifconf_regs regs;
-
-	regs.len = REGDUMP_SIZE;
-
-	/* XXX: This is never freed.  Looks like we don't care. */
-	if ((regs.data = malloc(regs.len)) == NULL)
-		err(1, "can't malloc");
-
-	if (doit(iff_name, CHELSIO_IFCONF_GETREGS, &regs))
-		err(1, "can't read registers");
-
-	vers = regs.version & 0x3ff;
-	revision = (regs.version >> 10) & 0x3f;
-	is_pcie = (regs.version & 0x80000000) != 0;
-
-	if (vers <= 2)
-		return dump_regs_t2(argc, argv, start_arg, (uint32_t *)regs.data);
-#if defined(CONFIG_T3_REGS)
-	if (vers == 3) {
-		if (revision == 0)
-			return dump_regs_t3(argc, argv, start_arg,
-					    (uint32_t *)regs.data, is_pcie);
-		if (revision == 2 || revision == 3)
-			return dump_regs_t3b(argc, argv, start_arg,
-					     (uint32_t *)regs.data, is_pcie);
-		if (revision == 4)
-			return dump_regs_t3c(argc, argv, start_arg,
-			    		     (uint32_t *)regs.data, is_pcie);
-	}
-#endif
-	errx(1, "unknown card type %d.%d", vers, revision);
-	return 0;
-}
-
-static int
-t3_meminfo(const uint32_t *regs)
-{
-	enum {
-		SG_EGR_CNTX_BADDR       = 0x58,
-		SG_CQ_CONTEXT_BADDR     = 0x6c,
-		CIM_SDRAM_BASE_ADDR     = 0x28c,
-		CIM_SDRAM_ADDR_SIZE     = 0x290,
-		TP_CMM_MM_BASE          = 0x314,
-		TP_CMM_TIMER_BASE       = 0x318,
-		TP_CMM_MM_RX_FLST_BASE  = 0x460,
-		TP_CMM_MM_TX_FLST_BASE  = 0x464,
-		TP_CMM_MM_PS_FLST_BASE  = 0x468,
-		ULPRX_ISCSI_LLIMIT      = 0x50c,
-		ULPRX_ISCSI_ULIMIT      = 0x510,
-		ULPRX_TDDP_LLIMIT       = 0x51c,
-		ULPRX_TDDP_ULIMIT       = 0x520,
-		ULPRX_STAG_LLIMIT       = 0x52c,
-		ULPRX_STAG_ULIMIT       = 0x530,
-		ULPRX_RQ_LLIMIT         = 0x534,
-		ULPRX_RQ_ULIMIT         = 0x538,
-		ULPRX_PBL_LLIMIT        = 0x53c,
-		ULPRX_PBL_ULIMIT        = 0x540,
-	};
-
-	unsigned int egr_cntxt = regs[SG_EGR_CNTX_BADDR / 4],
-		     cq_cntxt = regs[SG_CQ_CONTEXT_BADDR / 4],
-		     timers = regs[TP_CMM_TIMER_BASE / 4] & 0xfffffff,
-		     pstructs = regs[TP_CMM_MM_BASE / 4],
-		     pstruct_fl = regs[TP_CMM_MM_PS_FLST_BASE / 4],
-		     rx_fl = regs[TP_CMM_MM_RX_FLST_BASE / 4],
-		     tx_fl = regs[TP_CMM_MM_TX_FLST_BASE / 4],
-		     cim_base = regs[CIM_SDRAM_BASE_ADDR / 4],
-		     cim_size = regs[CIM_SDRAM_ADDR_SIZE / 4];
-	unsigned int iscsi_ll = regs[ULPRX_ISCSI_LLIMIT / 4],
-		     iscsi_ul = regs[ULPRX_ISCSI_ULIMIT / 4],
-		     tddp_ll = regs[ULPRX_TDDP_LLIMIT / 4],
-		     tddp_ul = regs[ULPRX_TDDP_ULIMIT / 4],
-		     stag_ll = regs[ULPRX_STAG_LLIMIT / 4],
-		     stag_ul = regs[ULPRX_STAG_ULIMIT / 4],
-		     rq_ll = regs[ULPRX_RQ_LLIMIT / 4],
-		     rq_ul = regs[ULPRX_RQ_ULIMIT / 4],
-		     pbl_ll = regs[ULPRX_PBL_LLIMIT / 4],
-		     pbl_ul = regs[ULPRX_PBL_ULIMIT / 4];
-
-	printf("CM memory map:\n");
-	printf("  TCB region:      0x%08x - 0x%08x [%u]\n", 0, egr_cntxt - 1,
-	       egr_cntxt);
-	printf("  Egress contexts: 0x%08x - 0x%08x [%u]\n", egr_cntxt,
-	       cq_cntxt - 1, cq_cntxt - egr_cntxt);
-	printf("  CQ contexts:     0x%08x - 0x%08x [%u]\n", cq_cntxt,
-	       timers - 1, timers - cq_cntxt);
-	printf("  Timers:          0x%08x - 0x%08x [%u]\n", timers,
-	       pstructs - 1, pstructs - timers);
-	printf("  Pstructs:        0x%08x - 0x%08x [%u]\n", pstructs,
-	       pstruct_fl - 1, pstruct_fl - pstructs);
-	printf("  Pstruct FL:      0x%08x - 0x%08x [%u]\n", pstruct_fl,
-	       rx_fl - 1, rx_fl - pstruct_fl);
-	printf("  Rx FL:           0x%08x - 0x%08x [%u]\n", rx_fl, tx_fl - 1,
-	       tx_fl - rx_fl);
-	printf("  Tx FL:           0x%08x - 0x%08x [%u]\n", tx_fl, cim_base - 1,
-	       cim_base - tx_fl);
-	printf("  uP RAM:          0x%08x - 0x%08x [%u]\n", cim_base,
-	       cim_base + cim_size - 1, cim_size);
-
-	printf("\nPMRX memory map:\n");
-	printf("  iSCSI region:    0x%08x - 0x%08x [%u]\n", iscsi_ll, iscsi_ul,
-	       iscsi_ul - iscsi_ll + 1);
-	printf("  TCP DDP region:  0x%08x - 0x%08x [%u]\n", tddp_ll, tddp_ul,
-	       tddp_ul - tddp_ll + 1);
-	printf("  TPT region:      0x%08x - 0x%08x [%u]\n", stag_ll, stag_ul,
-	       stag_ul - stag_ll + 1);
-	printf("  RQ region:       0x%08x - 0x%08x [%u]\n", rq_ll, rq_ul,
-	       rq_ul - rq_ll + 1);
-	printf("  PBL region:      0x%08x - 0x%08x [%u]\n", pbl_ll, pbl_ul,
-	       pbl_ul - pbl_ll + 1);
-	return 0;
-}
-
-static int
-meminfo(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	int vers;
-	struct ch_ifconf_regs regs;
-
-	(void) argc;
-	(void) argv;
-	(void) start_arg;
-
-	regs.len = REGDUMP_SIZE;
-	if ((regs.data = malloc(regs.len)) == NULL)
-		err(1, "can't malloc");
-	
-	if (doit(iff_name, CHELSIO_IFCONF_GETREGS, &regs))
-		err(1, "can't read registers");
-
-	vers = regs.version & 0x3ff;
-	if (vers == 3)
-		return t3_meminfo((uint32_t *)regs.data);
-
-	errx(1, "unknown card type %d", vers);
-	return 0;
-}
-
-static int
-mtu_tab_op(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_mtus m;
-	unsigned int i;
-
-	if (argc == start_arg) {
-		if (doit(iff_name, CHELSIO_GETMTUTAB, &m) < 0)
-			err(1, "get MTU table");
-		for (i = 0; i < m.nmtus; ++i)
-			printf("%u ", m.mtus[i]);
-		printf("\n");
-	} else if (argc <= start_arg + NMTUS) {
-		m.nmtus = argc - start_arg;
-
-		for (i = 0; i < m.nmtus; ++i) {
-			char *p;
-			unsigned long mt = strtoul(argv[start_arg + i], &p, 0);
-
-			if (*p || mt > 9600) {
-				warnx("bad parameter \"%s\"",
-				      argv[start_arg + i]);
-				return -1;
-			}
-			if (i && mt < m.mtus[i - 1])
-				errx(1, "MTUs must be in ascending order");
-			m.mtus[i] = mt;
-		}
-		if (doit(iff_name, CHELSIO_SETMTUTAB, &m) < 0)
-			err(1, "set MTU table");
-	} else
-		return -1;
-
-	return 0;
-}
-
-#ifdef CHELSIO_INTERNAL
-static void
-show_egress_cntxt(uint32_t data[])
-{
-	printf("credits:      %u\n", data[0] & 0x7fff);
-	printf("GTS:          %u\n", (data[0] >> 15) & 1);
-	printf("index:        %u\n", data[0] >> 16);
-	printf("queue size:   %u\n", data[1] & 0xffff);
-	printf("base address: 0x%" PRIx64 "\n",
-	       ((data[1] >> 16) | ((uint64_t)data[2] << 16) |
-	       (((uint64_t)data[3] & 0xf) << 48)) << 12);
-	printf("rsp queue #:  %u\n", (data[3] >> 4) & 7);
-	printf("cmd queue #:  %u\n", (data[3] >> 7) & 1);
-	printf("TUN:          %u\n", (data[3] >> 8) & 1);
-	printf("TOE:          %u\n", (data[3] >> 9) & 1);
-	printf("generation:   %u\n", (data[3] >> 10) & 1);
-	printf("uP token:     %u\n", (data[3] >> 11) & 0xfffff);
-	printf("valid:        %u\n", (data[3] >> 31) & 1);
-}
-
-static void
-show_fl_cntxt(uint32_t data[])
-{
-	printf("base address: 0x%" PRIx64 "\n",
-	       ((uint64_t)data[0] | ((uint64_t)data[1] & 0xfffff) << 32) << 12);
-	printf("index:        %u\n", (data[1] >> 20) | ((data[2] & 0xf) << 12));
-	printf("queue size:   %u\n", (data[2] >> 4) & 0xffff);
-	printf("generation:   %u\n", (data[2] >> 20) & 1);
-	printf("entry size:   %u\n",
-	       (data[2] >> 21) | (data[3] & 0x1fffff) << 11);
-	printf("congest thr:  %u\n", (data[3] >> 21) & 0x3ff);
-	printf("GTS:          %u\n", (data[3] >> 31) & 1);
-}
-
-static void
-show_response_cntxt(uint32_t data[])
-{
-	printf("index:        %u\n", data[0] & 0xffff);
-	printf("size:         %u\n", data[0] >> 16);
-	printf("base address: 0x%" PRIx64 "\n",
-	       ((uint64_t)data[1] | ((uint64_t)data[2] & 0xfffff) << 32) << 12);
-	printf("MSI-X/RspQ:   %u\n", (data[2] >> 20) & 0x3f);
-	printf("intr enable:  %u\n", (data[2] >> 26) & 1);
-	printf("intr armed:   %u\n", (data[2] >> 27) & 1);
-	printf("generation:   %u\n", (data[2] >> 28) & 1);
-	printf("CQ mode:      %u\n", (data[2] >> 31) & 1);
-	printf("FL threshold: %u\n", data[3]);
-}
-
-static void
-show_cq_cntxt(uint32_t data[])
-{
-	printf("index:            %u\n", data[0] & 0xffff);
-	printf("size:             %u\n", data[0] >> 16);
-	printf("base address:     0x%" PRIx64 "\n",
-	       ((uint64_t)data[1] | ((uint64_t)data[2] & 0xfffff) << 32) << 12);
-	printf("rsp queue #:      %u\n", (data[2] >> 20) & 0x3f);
-	printf("AN:               %u\n", (data[2] >> 26) & 1);
-	printf("armed:            %u\n", (data[2] >> 27) & 1);
-	printf("ANS:              %u\n", (data[2] >> 28) & 1);
-	printf("generation:       %u\n", (data[2] >> 29) & 1);
-	printf("overflow mode:    %u\n", (data[2] >> 31) & 1);
-	printf("credits:          %u\n", data[3] & 0xffff);
-	printf("credit threshold: %u\n", data[3] >> 16);
-}
-
-static int
-get_sge_context(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_cntxt ctx;
-
-	if (argc != start_arg + 2) return -1;
-
-	if (!strcmp(argv[start_arg], "egress"))
-		ctx.cntxt_type = CNTXT_TYPE_EGRESS;
-	else if (!strcmp(argv[start_arg], "fl"))
-		ctx.cntxt_type = CNTXT_TYPE_FL;
-	else if (!strcmp(argv[start_arg], "response"))
-		ctx.cntxt_type = CNTXT_TYPE_RSP;
-	else if (!strcmp(argv[start_arg], "cq"))
-		ctx.cntxt_type = CNTXT_TYPE_CQ;
-	else {
-		warnx("unknown context type \"%s\"; known types are egress, "
-		      "fl, cq, and response", argv[start_arg]);
-		return -1;
-	}
-
-	if (get_int_arg(argv[start_arg + 1], &ctx.cntxt_id))
-		return -1;
-
-	if (doit(iff_name, CHELSIO_GET_SGE_CONTEXT, &ctx) < 0)
-		err(1, "get SGE context");
-
-	if (!strcmp(argv[start_arg], "egress"))
-		show_egress_cntxt(ctx.data);
-	else if (!strcmp(argv[start_arg], "fl"))
-		show_fl_cntxt(ctx.data);
-	else if (!strcmp(argv[start_arg], "response"))
-		show_response_cntxt(ctx.data);
-	else if (!strcmp(argv[start_arg], "cq"))
-		show_cq_cntxt(ctx.data);
-	return 0;
-}
-
-#define ntohll(x) be64toh((x))
-
-static int
-get_sge_desc(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	uint64_t *p, wr_hdr;
-	unsigned int n = 1, qset, qnum;
-	struct ch_desc desc;
-
-	if (argc != start_arg + 3 && argc != start_arg + 4)
-		return -1;
-
-	if (get_int_arg(argv[start_arg], &qset) ||
-	    get_int_arg(argv[start_arg + 1], &qnum) ||
-	    get_int_arg(argv[start_arg + 2], &desc.idx))
-		return -1;
-
-	if (argc == start_arg + 4 && get_int_arg(argv[start_arg + 3], &n))
-		return -1;
-
-	if (qnum > 5)
-		errx(1, "invalid queue number %d, range is 0..5", qnum);
-
-	desc.queue_num = qset * 6 + qnum;
-
-	for (; n--; desc.idx++) {
-		if (doit(iff_name, CHELSIO_GET_SGE_DESC, &desc) < 0)
-			err(1, "get SGE descriptor");
-
-		p = (uint64_t *)desc.data;
-		wr_hdr = ntohll(*p);
-		printf("Descriptor %u: cmd %u, TID %u, %s%s%s%s%u flits\n",
-		       desc.idx, (unsigned int)(wr_hdr >> 56),
-		       ((unsigned int)wr_hdr >> 8) & 0xfffff,
-		       ((wr_hdr >> 55) & 1) ? "SOP, " : "",
-		       ((wr_hdr >> 54) & 1) ? "EOP, " : "",
-		       ((wr_hdr >> 53) & 1) ? "COMPL, " : "",
-		       ((wr_hdr >> 52) & 1) ? "SGL, " : "",
-		       (unsigned int)wr_hdr & 0xff);
-
-		for (; desc.size; p++, desc.size -= sizeof(uint64_t))
-			printf("%016" PRIx64 "%c", ntohll(*p),
-			    desc.size % 32 == 8 ? '\n' : ' ');
-	}
-	return 0;
-}
-#endif
-
-static int
-get_tcb2(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	uint64_t *d;
-	unsigned int i;
-	unsigned int tcb_idx;
-	struct ch_mem_range mr;
-
-	if (argc != start_arg + 1)
-		return -1;
-
-	if (get_int_arg(argv[start_arg], &tcb_idx))
-		return -1;
-
-	mr.buf = calloc(1, TCB_SIZE);
-	if (!mr.buf)
-		err(1, "get TCB");
-
-	mr.mem_id = MEM_CM;
-	mr.addr   = tcb_idx * TCB_SIZE;
-	mr.len    = TCB_SIZE;
-
-	if (doit(iff_name, CHELSIO_GET_MEM, &mr) < 0)
-		err(1, "get TCB");
-
-	for (d = (uint64_t *)mr.buf, i = 0; i < TCB_SIZE / 32; i++) {
-		printf("%2u:", i);
-		printf(" %08x %08x %08x %08x", (uint32_t)d[1],
-		       (uint32_t)(d[1] >> 32), (uint32_t)d[0],
-		       (uint32_t)(d[0] >> 32));
-		d += 2;
-		printf(" %08x %08x %08x %08x\n", (uint32_t)d[1],
-		       (uint32_t)(d[1] >> 32), (uint32_t)d[0],
-		       (uint32_t)(d[0] >> 32));
-		d += 2;
-	}
-	free(mr.buf);
-	return 0;
-}
-
-static int
-get_pm_page_spec(const char *s, unsigned int *page_size,
-    unsigned int *num_pages)
-{
-	char *p;
-	unsigned long val;
-
-	val = strtoul(s, &p, 0);
-	if (p == s) return -1;
-	if (*p == 'x' && p[1]) {
-		*num_pages = val;
-		*page_size = strtoul(p + 1, &p, 0);
-	} else {
-		*num_pages = -1;
-		*page_size = val;
-	}
-	*page_size <<= 10;     // KB -> bytes
-	return *p;
-}
-
-static int
-conf_pm(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_pm pm;
-
-	if (argc == start_arg) {
-		if (doit(iff_name, CHELSIO_GET_PM, &pm) < 0)
-			err(1, "read pm config");
-		printf("%ux%uKB TX pages, %ux%uKB RX pages, %uKB total memory\n",
-		       pm.tx_num_pg, pm.tx_pg_sz >> 10, pm.rx_num_pg,
-		       pm.rx_pg_sz >> 10, pm.pm_total >> 10);
-		return 0;
-	}
-
-	if (argc != start_arg + 2) return -1;
-
-	if (get_pm_page_spec(argv[start_arg], &pm.tx_pg_sz, &pm.tx_num_pg)) {
-		warnx("bad parameter \"%s\"", argv[start_arg]);
-		return -1;
-	}
-	if (get_pm_page_spec(argv[start_arg + 1], &pm.rx_pg_sz,
-			     &pm.rx_num_pg)) {
-		warnx("bad parameter \"%s\"", argv[start_arg + 1]);
-		return -1;
-	}
-	if (doit(iff_name, CHELSIO_SET_PM, &pm) < 0)
-		err(1, "pm config");
-	return 0;
-}
-
-#ifdef	CHELSIO_INTERNAL
-static int
-dump_tcam(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	unsigned int nwords;
-	struct ch_tcam_word op;
-
-	if (argc != start_arg + 2) return -1;
-
-	if (get_int_arg(argv[start_arg], &op.addr) ||
-	    get_int_arg(argv[start_arg + 1], &nwords))
-		return -1;
-
-	while (nwords--) {
-		if (doit(iff_name, CHELSIO_READ_TCAM_WORD, &op) < 0)
-			err(1, "tcam dump");
-
-		printf("0x%08x: 0x%02x 0x%08x 0x%08x\n", op.addr,
-		       op.buf[0] & 0xff, op.buf[1], op.buf[2]);
-		op.addr++;
-	}
-	return 0;
-}
-
-static void
-hexdump_8b(unsigned int start, uint64_t *data, unsigned int len)
-{
-	int i;
-
-	while (len) {
-		printf("0x%08x:", start);
-		for (i = 0; i < 4 && len; ++i, --len)
-			printf(" %016llx", (unsigned long long)*data++);
-		printf("\n");
-		start += 32;
-	}
-}
-
-static int
-dump_mc7(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_mem_range mem;
-	unsigned int mem_id, addr, len;
-
-	if (argc != start_arg + 3) return -1;
-
-	if (!strcmp(argv[start_arg], "cm"))
-		mem_id = MEM_CM;
-	else if (!strcmp(argv[start_arg], "rx"))
-		mem_id = MEM_PMRX;
-	else if (!strcmp(argv[start_arg], "tx"))
-		mem_id = MEM_PMTX;
-	else
-		errx(1, "unknown memory \"%s\"; must be one of \"cm\", \"tx\","
-			" or \"rx\"", argv[start_arg]);
-
-	if (get_int_arg(argv[start_arg + 1], &addr) ||
-	    get_int_arg(argv[start_arg + 2], &len))
-		return -1;
-
-	mem.buf = malloc(len);
-	if (!mem.buf)
-		err(1, "memory dump");
-
-	mem.mem_id = mem_id;
-	mem.addr   = addr;
-	mem.len    = len;
-
-	if (doit(iff_name, CHELSIO_GET_MEM, &mem) < 0)
-		err(1, "memory dump");
-
-	hexdump_8b(mem.addr, (uint64_t *)mem.buf, mem.len >> 3);
-	free(mem.buf);
-	return 0;
-}
-#endif
-
-/* Max FW size is 64K including version, +4 bytes for the checksum. */
-#define MAX_FW_IMAGE_SIZE (64 * 1024)
-
-static int
-load_fw(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	int fd, len;
-	struct ch_mem_range op;
-	const char *fname = argv[start_arg];
-
-	if (argc != start_arg + 1) return -1;
-
-	fd = open(fname, O_RDONLY);
-	if (fd < 0)
-		err(1, "load firmware");
-
-	bzero(&op, sizeof(op));
-	op.buf = malloc(MAX_FW_IMAGE_SIZE + 1);
-	if (!op.buf)
-		err(1, "load firmware");
-
-	len = read(fd, op.buf, MAX_FW_IMAGE_SIZE + 1);
-	if (len < 0)
-		err(1, "load firmware");
- 	if (len > MAX_FW_IMAGE_SIZE)
-		errx(1, "FW image too large");
-
-	op.len = len;
-	if (doit(iff_name, CHELSIO_LOAD_FW, &op) < 0)
-		err(1, "load firmware");
-
-	close(fd);
-	return 0;
-}
-
-/* Max BOOT size is 255*512 bytes including the BIOS boot ROM basic header */
-#define MAX_BOOT_IMAGE_SIZE (0xff * 512)
-
-static int
-load_boot(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	int fd, len;
-	struct ch_mem_range op;
-	const char *fname = argv[start_arg];
-
-	if (argc != start_arg + 1) return -1;
-
-	fd = open(fname, O_RDONLY);
-	if (fd < 0)
-		err(1, "load boot image");
-
-	op.buf = malloc(MAX_BOOT_IMAGE_SIZE + 1);
-	if (!op.buf)
-		err(1, "load boot image");
-
-	len = read(fd, op.buf, MAX_BOOT_IMAGE_SIZE + 1);
-	if (len < 0)
-		err(1, "load boot image");
- 	if (len > MAX_BOOT_IMAGE_SIZE)
-		errx(1, "boot image too large");
-
-	op.len = len;
-
-	if (doit(iff_name, CHELSIO_LOAD_BOOT, &op) < 0)
-		err(1, "load boot image");
-
-	close(fd);
-	return 0;
-}
-
-static int
-dump_proto_sram(const char *iff_name)
-{
-	int i, j;
-	uint8_t buf[PROTO_SRAM_SIZE];
-	struct ch_eeprom ee;
-	uint8_t *p = buf;
-
-	bzero(buf, sizeof(buf));
-	ee.offset = PROTO_SRAM_EEPROM_ADDR;
-	ee.data = p;
-	ee.len = sizeof(buf);
-	if (doit(iff_name, CHELSIO_GET_EEPROM, &ee))
-		err(1, "show protocol sram");
-
-	for (i = 0; i < PROTO_SRAM_LINES; i++) {
-		for (j = PROTO_SRAM_LINE_NIBBLES - 1; j >= 0; j--) {
-			int nibble_idx = i * PROTO_SRAM_LINE_NIBBLES + j;
-			uint8_t nibble = p[nibble_idx / 2];
-
-			if (nibble_idx & 1)
-				nibble >>= 4;
-			else
-				nibble &= 0xf;
-			printf("%x", nibble);
-		}
-		putchar('\n');
-	}
-	return 0;
-}
-
-static int
-proto_sram_op(int argc, char *argv[], int start_arg,
-			 const char *iff_name)
-{
-	(void) argv;
-	(void) start_arg;
-
-	if (argc == start_arg)
-		return dump_proto_sram(iff_name);
-	return -1;
-}
-
-static int
-dump_qset_params(const char *iff_name)
-{
-	struct ch_qset_params qp;
-
-	qp.qset_idx = 0;
-
-	while (doit(iff_name, CHELSIO_GET_QSET_PARAMS, &qp) == 0) {
-		if (!qp.qset_idx)
-			printf("Qset   TxQ0   TxQ1   TxQ2   RspQ   RxQ0   RxQ1"
-			       "  Cong  Lat   IRQ\n");
-		printf("%4u %6u %6u %6u %6u %6u %6u %5u %4u %5d\n",
-		       qp.qnum,
-		       qp.txq_size[0], qp.txq_size[1], qp.txq_size[2],
-		       qp.rspq_size, qp.fl_size[0], qp.fl_size[1],
-		       qp.cong_thres, qp.intr_lat, qp.vector);
-		qp.qset_idx++;
-	}
-	if (!qp.qset_idx || (errno && errno != EINVAL))
-		err(1, "get qset parameters");
-	return 0;
-}
-
-static int
-qset_config(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	(void) argv;
-
-	if (argc == start_arg)
-		return dump_qset_params(iff_name);
-
-	return -1;
-}
-
-static int
-qset_num_config(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_reg reg;
-
-	(void) argv;
-
-	if (argc == start_arg) {
-		if (doit(iff_name, CHELSIO_GET_QSET_NUM, &reg) < 0)
-			err(1, "get qsets");
-		printf("%u\n", reg.val);
-		return 0;
-	}
-
-	return -1;
-}
-
-/*
- * Parse a string containing an IP address with an optional network prefix.
- */
-static int
-parse_ipaddr(const char *s, uint32_t *addr, uint32_t *mask)
-{
-	char *p, *slash;
-	struct in_addr ia;
-
-	*mask = 0xffffffffU;
-	slash = strchr(s, '/');
-	if (slash)
-		*slash = 0;
-	if (!inet_aton(s, &ia)) {
-		if (slash)
-			*slash = '/';
-		*addr = 0;
-		return -1;
-	}
-	*addr = ntohl(ia.s_addr);
-	if (slash) {
-		unsigned int prefix = strtoul(slash + 1, &p, 10);
-
-		*slash = '/';
-		if (p == slash + 1 || *p || prefix > 32)
-			return -1;
-		*mask <<= (32 - prefix);
-	}
-	return 0;
-}
-
-/*
- * Parse a string containing a value and an optional colon separated mask.
- */
-static int
-parse_val_mask_param(const char *s, uint32_t *val, uint32_t *mask,
-    uint32_t default_mask)
-{
-	char *p;
-
-	*mask = default_mask;
-	*val = strtoul(s, &p, 0);
-	if (p == s || *val > default_mask)
-		return -1;
-	if (*p == ':' && p[1])
-		*mask = strtoul(p + 1, &p, 0);
-	return *p || *mask > default_mask ? -1 : 0;
-}
-
-static int
-parse_trace_param(const char *s, uint32_t *val, uint32_t *mask)
-{
-	return strchr(s, '.') ? parse_ipaddr(s, val, mask) :
-				parse_val_mask_param(s, val, mask, 0xffffffffU);
-}
-
-static int
-trace_config(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	uint32_t val, mask;
-	struct ch_trace trace;
-
-	if (argc == start_arg)
-		return -1;
-
-	memset(&trace, 0, sizeof(trace));
-	if (!strcmp(argv[start_arg], "tx"))
-		trace.config_tx = 1;
-	else if (!strcmp(argv[start_arg], "rx"))
-		trace.config_rx = 1;
-	else if (!strcmp(argv[start_arg], "all"))
-		trace.config_tx = trace.config_rx = 1;
-	else
-		errx(1, "bad trace filter \"%s\"; must be one of \"rx\", "
-		     "\"tx\" or \"all\"", argv[start_arg]);
-
-	if (argc == ++start_arg)
-		return -1;
-	if (!strcmp(argv[start_arg], "on")) {
-		trace.trace_tx = trace.config_tx;
-		trace.trace_rx = trace.config_rx;
-	} else if (strcmp(argv[start_arg], "off"))
-		errx(1, "bad argument \"%s\"; must be \"on\" or \"off\"",
-		     argv[start_arg]);
-
-	start_arg++;
-	if (start_arg < argc && !strcmp(argv[start_arg], "not")) {
-		trace.invert_match = 1;
-		start_arg++;
-	}
-
-	while (start_arg + 2 <= argc) {
-		int ret = parse_trace_param(argv[start_arg + 1], &val, &mask);
-
-		if (!strcmp(argv[start_arg], "interface")) {
-			trace.intf = val;
-			trace.intf_mask = mask;
-		} else if (!strcmp(argv[start_arg], "sip")) {
-			trace.sip = val;
-			trace.sip_mask = mask;
-		} else if (!strcmp(argv[start_arg], "dip")) {
-			trace.dip = val;
-			trace.dip_mask = mask;
-		} else if (!strcmp(argv[start_arg], "sport")) {
-			trace.sport = val;
-			trace.sport_mask = mask;
-		} else if (!strcmp(argv[start_arg], "dport")) {
-			trace.dport = val;
-			trace.dport_mask = mask;
-		} else if (!strcmp(argv[start_arg], "vlan")) {
-			trace.vlan = val;
-			trace.vlan_mask = mask;
-		} else if (!strcmp(argv[start_arg], "proto")) {
-			trace.proto = val;
-			trace.proto_mask = mask;
-		} else
-			errx(1, "unknown trace parameter \"%s\"\n"
-			     "known parameters are \"interface\", \"sip\", "
-			     "\"dip\", \"sport\", \"dport\", \"vlan\", "
-			     "\"proto\"", argv[start_arg]);
-		if (ret < 0)
-			errx(1, "bad parameter \"%s\"", argv[start_arg + 1]);
-		start_arg += 2;
-	}
-	if (start_arg != argc)
-		errx(1, "unknown parameter \"%s\"", argv[start_arg]);
-
-	if (doit(iff_name, CHELSIO_SET_TRACE_FILTER, &trace) < 0)
-		err(1, "trace");
-	return 0;
-}
-
-static void
-show_filters(const char *iff_name)
-{
-	static const char *pkt_type[] = { "*", "tcp", "udp", "frag" };
-	struct ch_filter op;
-	union {
-		uint32_t nip;
-		uint8_t octet[4];
-	} nsip, ndip;
-	char sip[20], dip[20];
-	int header = 0;
-
-	bzero(&op, sizeof(op));
-	op.filter_id = 0xffffffff;
-
-	do {
-		if (doit(iff_name, CHELSIO_GET_FILTER, &op) < 0)
-			err(1, "list filters");
-
-		if (op.filter_id == 0xffffffff)
-			break;
-
-		if (!header) {
-			printf("index         SIP                DIP     sport "
-			    "dport VLAN PRI P/MAC type Q\n");
-			header = 1;
-		}
-
-		nsip.nip = htonl(op.val.sip);
-		ndip.nip = htonl(op.val.dip);
-
-		sprintf(sip, "%u.%u.%u.%u/%-2u", nsip.octet[0], nsip.octet[1],
-		    nsip.octet[2], nsip.octet[3],
-		    op.mask.sip ? 33 - ffs(op.mask.sip) : 0);
-		sprintf(dip, "%u.%u.%u.%u", ndip.octet[0], ndip.octet[1],
-		    ndip.octet[2], ndip.octet[3]);
-		printf("%5zu %18s %15s ", (size_t)op.filter_id, sip, dip);
-		printf(op.val.sport ? "%5u " : "    * ", op.val.sport);
-		printf(op.val.dport ? "%5u " : "    * ", op.val.dport);
-		printf(op.val.vlan != 0xfff ? "%4u " : "   * ", op.val.vlan);
-		printf(op.val.vlan_prio == 7 ?  "  * " :
-		    "%1u/%1u ", op.val.vlan_prio, op.val.vlan_prio | 1);
-		if (op.mac_addr_idx == 0xffff)
-			printf("*/*   ");
-		else if (op.mac_hit)
-			printf("%1u/%3u ", (op.mac_addr_idx >> 3) & 0x1,
-			    (op.mac_addr_idx) & 0x7);
-		else
-			printf("%1u/  * ", (op.mac_addr_idx >> 3) & 0x1);
-		printf("%4s ", pkt_type[op.proto]);
-		if (!op.pass)
-			printf("-\n");
-		else if (op.rss)
-			printf("*\n");
-		else
-			printf("%1u\n", op.qset);
-	} while (1);
-}
-
-static int
-filter_config(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	int ret = 0;
-	uint32_t val, mask;
-	struct ch_filter op;
-
-	if (argc < start_arg + 1)
-		return -1;
-
-	memset(&op, 0, sizeof(op));
-	op.mac_addr_idx = 0xffff;
-	op.rss = 1;
-
-	if (argc == start_arg + 1 && !strcmp(argv[start_arg], "list")) {
-		show_filters(iff_name);
-		return 0;
-	}
-
-	if (get_int_arg(argv[start_arg++], &op.filter_id))
-		return -1;
-	if (argc == start_arg + 1 && (!strcmp(argv[start_arg], "delete") ||
-				      !strcmp(argv[start_arg], "clear"))) {
-		if (doit(iff_name, CHELSIO_DEL_FILTER, &op) < 0) {
-			if (errno == EBUSY)
-				err(1, "no filter support when offload in use");
-			err(1, "delete filter");
-		}
-		return 0;
-	}
-
-	while (start_arg + 2 <= argc) {
-		if (!strcmp(argv[start_arg], "sip")) {
-			ret = parse_ipaddr(argv[start_arg + 1], &op.val.sip,
-					   &op.mask.sip);
-		} else if (!strcmp(argv[start_arg], "dip")) {
-			ret = parse_ipaddr(argv[start_arg + 1], &op.val.dip,
-					   &op.mask.dip);
-		} else if (!strcmp(argv[start_arg], "sport")) {
-			ret = parse_val_mask_param(argv[start_arg + 1],
-						   &val, &mask, 0xffff);
-			op.val.sport = val;
-			op.mask.sport = mask;
-		} else if (!strcmp(argv[start_arg], "dport")) {
-			ret = parse_val_mask_param(argv[start_arg + 1],
-						   &val, &mask, 0xffff);
-			op.val.dport = val;
-			op.mask.dport = mask;
-		} else if (!strcmp(argv[start_arg], "vlan")) {
-			ret = parse_val_mask_param(argv[start_arg + 1],
-						   &val, &mask, 0xfff);
-			op.val.vlan = val;
-			op.mask.vlan = mask;
-		} else if (!strcmp(argv[start_arg], "prio")) {
-			ret = parse_val_mask_param(argv[start_arg + 1],
-						   &val, &mask, 7);
-			op.val.vlan_prio = val;
-			op.mask.vlan_prio = mask;
-		} else if (!strcmp(argv[start_arg], "mac")) {
-			if (!strcmp(argv[start_arg + 1], "none"))
-				val = -1;
-			else
-				ret = get_int_arg(argv[start_arg + 1], &val);
-			op.mac_hit = val != (uint32_t)-1;
-			op.mac_addr_idx = op.mac_hit ? val : 0;
-		} else if (!strcmp(argv[start_arg], "type")) {
-			if (!strcmp(argv[start_arg + 1], "tcp"))
-				op.proto = 1;
-			else if (!strcmp(argv[start_arg + 1], "udp"))
-				op.proto = 2;
-			else if (!strcmp(argv[start_arg + 1], "frag"))
-				op.proto = 3;
-			else
-				errx(1, "unknown type \"%s\"; must be one of "
-				     "\"tcp\", \"udp\", or \"frag\"",
-				     argv[start_arg + 1]);
-		} else if (!strcmp(argv[start_arg], "queue")) {
-			ret = get_int_arg(argv[start_arg + 1], &val);
-			op.qset = val;
-			op.rss = 0;
-		} else if (!strcmp(argv[start_arg], "action")) {
-			if (!strcmp(argv[start_arg + 1], "pass"))
-				op.pass = 1;
-			else if (strcmp(argv[start_arg + 1], "drop"))
-				errx(1, "unknown action \"%s\"; must be one of "
-				     "\"pass\" or \"drop\"",
-				     argv[start_arg + 1]);
-		} else
- 			errx(1, "unknown filter parameter \"%s\"\n"
-			     "known parameters are \"mac\", \"sip\", "
-			     "\"dip\", \"sport\", \"dport\", \"vlan\", "
-			     "\"prio\", \"type\", \"queue\", and \"action\"",
-			     argv[start_arg]);
-		if (ret < 0)
-			errx(1, "bad value \"%s\" for parameter \"%s\"",
-			     argv[start_arg + 1], argv[start_arg]);
-		start_arg += 2;
-	}
-	if (start_arg != argc)
-		errx(1, "no value for \"%s\"", argv[start_arg]);
-
-	if (doit(iff_name, CHELSIO_SET_FILTER, &op) < 0) {
-		if (errno == EBUSY)
-			err(1, "no filter support when offload in use");
-		err(1, "set filter");
-	}
-	
-	return 0;
-}
-static int
-get_sched_param(int argc, char *argv[], int pos, unsigned int *valp)
-{
-	if (pos + 1 >= argc)
-		errx(1, "missing value for %s", argv[pos]);
-	if (get_int_arg(argv[pos + 1], valp))
-		exit(1);
-	return 0;
-}
-
-static int
-tx_sched(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_hw_sched op;
-	unsigned int idx, val;
-
-	if (argc < 5 || get_int_arg(argv[start_arg++], &idx))
-		return -1;
-
-	op.sched = idx;
-	op.mode = op.channel = -1;
-	op.kbps = op.class_ipg = op.flow_ipg = -1;
-
-	while (argc > start_arg) {
-		if (!strcmp(argv[start_arg], "mode")) {
-			if (start_arg + 1 >= argc)
-				errx(1, "missing value for mode");
-			if (!strcmp(argv[start_arg + 1], "class"))
-				op.mode = 0;
-			else if (!strcmp(argv[start_arg + 1], "flow"))
-				op.mode = 1;
-			else
-				errx(1, "bad mode \"%s\"", argv[start_arg + 1]);
-		} else if (!strcmp(argv[start_arg], "channel") &&
-			 !get_sched_param(argc, argv, start_arg, &val))
-			op.channel = val;
-		else if (!strcmp(argv[start_arg], "rate") &&
-			 !get_sched_param(argc, argv, start_arg, &val))
-			op.kbps = val;
-		else if (!strcmp(argv[start_arg], "ipg") &&
-			 !get_sched_param(argc, argv, start_arg, &val))
-			op.class_ipg = val;
-		else if (!strcmp(argv[start_arg], "flowipg") &&
-			 !get_sched_param(argc, argv, start_arg, &val))
-			op.flow_ipg = val;
-		else
-			errx(1, "unknown scheduler parameter \"%s\"",
-			     argv[start_arg]);
-		start_arg += 2;
-	}
-
-	if (doit(iff_name, CHELSIO_SET_HW_SCHED, &op) < 0)
-		 err(1, "pktsched");
-
-	return 0;
-}
-
-static int
-pktsched(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_pktsched_params op;
-	unsigned int idx, min = -1, max, binding = -1;
-
-	if (argc < 4)
-		errx(1, "no scheduler specified");
-
-	if (!strcmp(argv[start_arg], "port")) {
-		if (argc != start_arg + 4)
-			return -1;
-		if (get_int_arg(argv[start_arg + 1], &idx) ||
-		    get_int_arg(argv[start_arg + 2], &min) ||
-		    get_int_arg(argv[start_arg + 3], &max))
-			return -1;
-		op.sched = 0;
-	} else if (!strcmp(argv[start_arg], "tunnelq")) {
-		if (argc != start_arg + 4)
-			return -1;
-		if (get_int_arg(argv[start_arg + 1], &idx) ||
-		    get_int_arg(argv[start_arg + 2], &max) ||
-		    get_int_arg(argv[start_arg + 3], &binding))
-			return -1;
-		op.sched = 1;
-	} else if (!strcmp(argv[start_arg], "tx"))
-		return tx_sched(argc, argv, start_arg + 1, iff_name);
-	else
-		errx(1, "unknown scheduler \"%s\"; must be one of \"port\", " 
-			"\"tunnelq\" or \"tx\"", argv[start_arg]);
- 
-	op.idx = idx;
-	op.min = min;
-	op.max = max;
-	op.binding = binding;
-	if (doit(iff_name, CHELSIO_SET_PKTSCHED, &op) < 0)
-		 err(1, "pktsched");
-
-	return 0;
-}
-
-static int
-clear_stats(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	(void) argc;
-	(void) argv;
-	(void) start_arg;
-
-	if (doit(iff_name, CHELSIO_CLEAR_STATS, NULL) < 0)
-		 err(1, "clearstats");
-
-	return 0;
-}
-
-static int
-get_up_la(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_up_la la;
-	int i, idx, max_idx, entries;
-
-	(void) argc;
-	(void) argv;
-	(void) start_arg;
-
-	la.stopped = 0;
-	la.idx = -1;
-	la.bufsize = LA_BUFSIZE;
-	la.data = malloc(la.bufsize);
-	if (!la.data)
-		err(1, "uP_LA malloc");
-
-	if (doit(iff_name, CHELSIO_GET_UP_LA, &la) < 0)
-		 err(1, "uP_LA");
-
-	if (la.stopped)
-		printf("LA is not running\n");
-
-	entries = la.bufsize / 4;
-	idx = (int)la.idx;
-	max_idx = (entries / 4) - 1;
-	for (i = 0; i < max_idx; i++) {
-		printf("%04x %08x %08x\n",
-		       la.data[idx], la.data[idx+2], la.data[idx+1]);
-		idx = (idx + 4) & (entries - 1);
-	}
-
-	return 0;
-}
-
-static int
-get_up_ioqs(int argc, char *argv[], int start_arg, const char *iff_name)
-{
-	struct ch_up_ioqs ioqs;
-	int i, entries;
-
-	(void) argc;
-	(void) argv;
-	(void) start_arg;
-
-	bzero(&ioqs, sizeof(ioqs));
-	ioqs.bufsize = IOQS_BUFSIZE;
-	ioqs.data = malloc(IOQS_BUFSIZE);
-	if (!ioqs.data)
-		err(1, "uP_IOQs malloc");
-
-	if (doit(iff_name, CHELSIO_GET_UP_IOQS, &ioqs) < 0)
-		 err(1, "uP_IOQs");
-
-	printf("ioq_rx_enable   : 0x%08x\n", ioqs.ioq_rx_enable);
-	printf("ioq_tx_enable   : 0x%08x\n", ioqs.ioq_tx_enable);
-	printf("ioq_rx_status   : 0x%08x\n", ioqs.ioq_rx_status);
-	printf("ioq_tx_status   : 0x%08x\n", ioqs.ioq_tx_status);
-	
-	entries = ioqs.bufsize / sizeof(struct t3_ioq_entry);
-	for (i = 0; i < entries; i++) {
-		printf("\nioq[%d].cp       : 0x%08x\n", i,
-		       ioqs.data[i].ioq_cp);
-		printf("ioq[%d].pp       : 0x%08x\n", i,
-		       ioqs.data[i].ioq_pp);
-		printf("ioq[%d].alen     : 0x%08x\n", i,
-		       ioqs.data[i].ioq_alen);
-		printf("ioq[%d].stats    : 0x%08x\n", i,
-		       ioqs.data[i].ioq_stats);
-		printf("  sop %u\n", ioqs.data[i].ioq_stats >> 16);
-		printf("  eop %u\n", ioqs.data[i].ioq_stats  & 0xFFFF);
-	}
-
-	return 0;
-}
-
-static int
-run_cmd(int argc, char *argv[], const char *iff_name)
-{
-	int r = -1;
-
-	if (!strcmp(argv[2], "reg"))
-		r = register_io(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "mdio"))
-		r = mdio_io(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "mtus"))
-		r = mtu_tab_op(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "pm"))
-		r = conf_pm(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "regdump"))
-		r = dump_regs(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "tcamdump"))
-		r = dump_tcam(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "memdump"))
-		r = dump_mc7(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "meminfo"))
-		r = meminfo(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "context"))
-		r = get_sge_context(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "desc"))
-		r = get_sge_desc(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "loadfw"))
-		r = load_fw(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "loadboot"))
-		r = load_boot(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "proto"))
-		r = proto_sram_op(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "qset"))
-		r = qset_config(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "qsets"))
-		r = qset_num_config(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "trace"))
-		r = trace_config(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "pktsched"))
-		r = pktsched(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "tcb"))
-		r = get_tcb2(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "filter"))
-		r = filter_config(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "clearstats"))
-		r = clear_stats(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "la"))
-		r = get_up_la(argc, argv, 3, iff_name);
-	else if (!strcmp(argv[2], "ioqs"))
-		r = get_up_ioqs(argc, argv, 3, iff_name);
-
-	if (r == -1)
-		usage(stderr);
-
-	return (0);
-}
-
-static int
-run_cmd_loop(int argc, char *argv[], const char *iff_name)
-{
-	int n;
-	unsigned int i;
-	char buf[64];
-	char *args[8], *s;
-
-	(void) argc;
-	args[0] = argv[0];
-	args[1] = argv[1];
-
-	/*
-	 * Fairly simplistic loop.  Displays a "> " prompt and processes any
-	 * input as a cxgbtool command.  You're supposed to enter only the part
-	 * after "cxgbtool cxgbX".  Use "quit" or "exit" to exit.  Any error in
-	 * the command will also terminate cxgbtool.
-	 */
-	for (;;) {
-		fprintf(stdout, "> ");
-		fflush(stdout);
-		n = read(STDIN_FILENO, buf, sizeof(buf) - 1);
-		if (n <= 0)
-			return (0);
-
-		if (buf[--n] != '\n')
-			continue;
-		else
-			buf[n] = 0;
-
-		s = &buf[0];
-		for (i = 2; i < sizeof(args)/sizeof(args[0]) - 1; i++) {
-			while (s && (*s == ' ' || *s == '\t'))
-				s++;
-			if ((args[i] = strsep(&s, " \t")) == NULL)
-				break;
-		}
-		args[sizeof(args)/sizeof(args[0]) - 1] = 0;
-
-		if (!strcmp(args[2], "quit") || !strcmp(args[2], "exit"))
-			return (0);
-
-		(void) run_cmd(i, args, iff_name);
-	}
-
-	/* Can't really get here */
-	return (0);
-}
-
-int
-main(int argc, char *argv[])
-{
-	int r = -1;
-	const char *iff_name;
-
-	progname = argv[0];
-
-	if (argc == 2) {
-		if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help"))
-			usage(stdout);
-		if (!strcmp(argv[1], "-v") || !strcmp(argv[1], "--version")) {
-			printf("%s version %s\n", PROGNAME, VERSION);
-			printf("%s\n", COPYRIGHT);
-			exit(0);
-		}
-	}
-
-	if (argc < 3) usage(stderr);
-
-	iff_name = argv[1];
-
-	if (argc == 3 && !strcmp(argv[2], "stdio"))
-		r = run_cmd_loop(argc, argv, iff_name);
-	else
-		r = run_cmd(argc, argv, iff_name);
-
-	return (r);
-}
diff --git a/usr.sbin/cxgbtool/reg_defs.c b/usr.sbin/cxgbtool/reg_defs.c
deleted file mode 100644
index 687bb75..0000000
--- a/usr.sbin/cxgbtool/reg_defs.c
+++ /dev/null
@@ -1,837 +0,0 @@
-/*
- * $FreeBSD$
- */
-
-/* This file is automatically generated --- do not edit */
-
-struct reg_info sge_regs[] = {
-	{ "SG_CONTROL", 0x0, 0 },
-		{ "CmdQ0_Enable", 0, 1 },
-		{ "CmdQ1_Enable", 1, 1 },
-		{ "FL0_Enable", 2, 1 },
-		{ "FL1_Enable", 3, 1 },
-		{ "CPL_Enable", 4, 1 },
-		{ "Response_Queue_Enable", 5, 1 },
-		{ "CmdQ_Priority", 6, 2 },
-		{ "Disable_CmdQ0_GTS", 8, 1 },
-		{ "Disable_CmdQ1_GTS", 9, 1 },
-		{ "Disable_FL0_GTS", 10, 1 },
-		{ "Disable_FL1_GTS", 11, 1 },
-		{ "Enable_Big_Endian", 12, 1 },
-		{ "FL_Selection_Criteria", 13, 1 },
-		{ "iSCSI_Coalesce", 14, 1 },
-		{ "RX_Pkt_Offset", 15, 3 },
-		{ "VLAN_Xtract", 18, 1 },
-	{ "SG_DOORBELL", 0x4, 0 },
-		{ "CmdQ0_Enable", 0, 1 },
-		{ "CmdQ1_Enable", 1, 1 },
-		{ "FL0_Enable", 2, 1 },
-		{ "FL1_Enable", 3, 1 },
-	{ "SG_CMD0BASELWR", 0x8, 0 },
-	{ "SG_CMD0BASEUPR", 0xc, 0 },
-	{ "SG_CMD1BASELWR", 0x10, 0 },
-	{ "SG_CMD1BASEUPR", 0x14, 0 },
-	{ "SG_FL0BASELWR", 0x18, 0 },
-	{ "SG_FL0BASEUPR", 0x1c, 0 },
-	{ "SG_FL1BASELWR", 0x20, 0 },
-	{ "SG_FL1BASEUPR", 0x24, 0 },
-	{ "SG_CMD0SIZE", 0x28, 0 },
-		{ "CmdQ0_Size", 0, 17 },
-	{ "SG_FL0SIZE", 0x2c, 0 },
-		{ "FL0_Size", 0, 17 },
-	{ "SG_RSPSIZE", 0x30, 0 },
-		{ "RespQ_Size", 0, 17 },
-	{ "SG_RSPBASELWR", 0x34, 0 },
-	{ "SG_RSPBASEUPR", 0x38, 0 },
-	{ "SG_FLTHRESHOLD", 0x3c, 0 },
-		{ "FL_Threshold", 0, 16 },
-	{ "SG_RSPQUEUECREDIT", 0x40, 0 },
-		{ "RespQ_Credit", 0, 17 },
-	{ "SG_DEBUGTXDATAL", 0x44, 0 },
-	{ "SG_SLEEPING", 0x48, 0 },
-		{ "Sleeping", 0, 16 },
-	{ "SG_INTRTIMER", 0x4c, 0 },
-		{ "Interrupt_Timer_Count", 0, 24 },
-	{ "SG_CMD0PTR", 0x50, 0 },
-		{ "CmdQ0_Pointer", 0, 16 },
-		{ "Current_Generation_Bit", 16, 1 },
-	{ "SG_CMD1PTR", 0x54, 0 },
-		{ "CmdQ1_Pointer", 0, 16 },
-		{ "Current_Generation_Bit", 16, 1 },
-	{ "SG_FL0PTR", 0x58, 0 },
-		{ "FL0_Pointer", 0, 16 },
-		{ "Current_Generation_Bit", 16, 1 },
-	{ "SG_FL1PTR", 0x5c, 0 },
-		{ "FL1_Pointer", 0, 16 },
-		{ "Current_Generation_Bit", 16, 1 },
-	{ "SG_DEBUGTXDATAH", 0x60, 0 },
-	{ "SG_DEBUGRXDATAL", 0x64, 0 },
-	{ "SG_DEBUGRXDATAH", 0x68, 0 },
-	{ "SG_VERSION", 0x6c, 0 },
-		{ "Day", 0, 5 },
-		{ "Month", 5, 4 },
-	{ "SG_DEBUGRXSOP", 0x70, 0 },
-	{ "SG_DEBUGTXSOP", 0x74, 0 },
-	{ "SG_LA_RDPTR0", 0x78, 0 },
-		{ "Logic_Analyzer0_Read_Pointer", 0, 9 },
-	{ "SG_LA_RDDATA0", 0x7c, 0 },
-	{ "SG_LA_WRPTR0", 0x80, 0 },
-	{ "SG_DEBUGRXEOP", 0x84, 0 },
-	{ "SG_DEBUGTXEOP", 0x88, 0 },
-	{ "SG_DEBUGRXSIZE", 0x8c, 0 },
-	{ "SG_DEBUGTXSIZE", 0x90, 0 },
-	{ "SG_NUMBER_LA", 0x94, 0 },
-	{ "SG_LA_RDPTR1", 0x98, 0 },
-		{ "Logic_Analyzer1_Read_Pointer", 0, 9 },
-	{ "SG_LA_RDDATA1", 0x9c, 0 },
-	{ "SG_LA_WRPTR1", 0xa0, 0 },
-	{ "SG_LA_RDPTR2", 0xa4, 0 },
-		{ "Logic_Analyzer2_Read_Pointer", 0, 9 },
-	{ "SG_LA_RDDATA2", 0xa8, 0 },
-	{ "SG_LA_WRPTR2", 0xac, 0 },
-	{ "SG_CMD1SIZE", 0xb0, 0 },
-		{ "CmdQ1_Size", 0, 17 },
-	{ "SG_FL1SIZE", 0xb4, 0 },
-		{ "FL1_Size", 0, 17 },
-	{ "SG_INT_ENABLE", 0xb8, 0 },
-		{ "RespQ_Exhausted", 0, 1 },
-		{ "RespQ_Overflow", 1, 1 },
-		{ "FL_Exhausted", 2, 1 },
-		{ "Packet_Too_Big", 3, 1 },
-		{ "Packet_Mismatch", 4, 1 },
-	{ "SG_INT_CAUSE", 0xbc, 0 },
-		{ "RespQ_Exhausted", 0, 1 },
-		{ "RespQ_Overflow", 1, 1 },
-		{ "FL_Exhausted", 2, 1 },
-		{ "Packet_Too_Big", 3, 1 },
-		{ "Packet_Mismatch", 4, 1 },
-	{ "SG_RESPACCUTIMER", 0xc0, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mc3_regs[] = {
-	{ "MC3_CFG", 0x100, 0 },
-		{ "Clk_Enable", 0, 1 },
-		{ "Ready", 1, 1 },
-		{ "Read_to_Write_Delay", 2, 3 },
-		{ "Write_to_Read_Delay", 5, 3 },
-		{ "MC3_Bank_Cycle", 8, 4 },
-		{ "Refresh_Cycle", 12, 4 },
-		{ "Precharge_Cycle", 16, 2 },
-		{ "Active_to_Read_Write_Delay", 18, 1 },
-		{ "Active_to_Precharge_Delay", 19, 3 },
-		{ "Write_Recovery_Delay", 22, 2 },
-		{ "Density", 24, 2 },
-		{ "Organization", 26, 1 },
-		{ "Banks", 27, 1 },
-		{ "Unregistered", 28, 1 },
-		{ "MC3_Width", 29, 2 },
-		{ "MC3_Slow", 31, 1 },
-	{ "MC3_MODE", 0x104, 0 },
-		{ "MC3_Mode", 0, 14 },
-		{ "Busy", 31, 1 },
-	{ "MC3_EXT_MODE", 0x108, 0 },
-		{ "MC3_Extended_Mode", 0, 14 },
-		{ "Busy", 31, 1 },
-	{ "MC3_PRECHARG", 0x10c, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC3_REFRESH", 0x110, 0 },
-		{ "Refresh_Enable", 0, 1 },
-		{ "Refresh_Divisor", 1, 14 },
-		{ "Busy", 31, 1 },
-	{ "MC3_STROBE", 0x114, 0 },
-		{ "Master_DLL_Reset", 0, 1 },
-		{ "Master_DLL_Tap_Count", 1, 8 },
-		{ "Master_DLL_Locked", 9, 1 },
-		{ "Master_DLL_Max_Tap_Count", 10, 1 },
-		{ "Master_DLL_Tap_Count_Offset", 11, 6 },
-		{ "Slave_DLL_Reset", 11, 1 },
-		{ "Slave_DLL_Delta", 12, 4 },
-		{ "Slave_Delay_Line_Manual_Tap_Count", 17, 6 },
-		{ "Slave_Delay_Line_Manual_Tap_Count_Enable", 23, 1 },
-		{ "Slave_Delay_Line_Tap_Count", 24, 6 },
-	{ "MC3_ECC_CNTL", 0x118, 0 },
-		{ "ECC_Generation_Enable", 0, 1 },
-		{ "ECC_Check_Enable", 1, 1 },
-		{ "Correctable_Error_Count", 2, 8 },
-		{ "Uncorrectable_Error_Count", 10, 8 },
-	{ "MC3_CE_ADDR", 0x11c, 0 },
-		{ "MC3_CE_Addr", 4, 28 },
-	{ "MC3_CE_DATA0", 0x120, 0 },
-	{ "MC3_CE_DATA1", 0x124, 0 },
-	{ "MC3_CE_DATA2", 0x128, 0 },
-	{ "MC3_CE_DATA3", 0x12c, 0 },
-	{ "MC3_CE_DATA4", 0x130, 0 },
-	{ "MC3_UE_ADDR", 0x134, 0 },
-		{ "MC3_UE_Addr", 4, 28 },
-	{ "MC3_UE_DATA0", 0x138, 0 },
-	{ "MC3_UE_DATA1", 0x13c, 0 },
-	{ "MC3_UE_DATA2", 0x140, 0 },
-	{ "MC3_UE_DATA3", 0x144, 0 },
-	{ "MC3_UE_DATA4", 0x148, 0 },
-	{ "MC3_BD_ADDR", 0x14c, 0 },
-	{ "MC3_BD_DATA0", 0x150, 0 },
-	{ "MC3_BD_DATA1", 0x154, 0 },
-	{ "MC3_BD_DATA2", 0x158, 0 },
-	{ "MC3_BD_DATA3", 0x15c, 0 },
-	{ "MC3_BD_DATA4", 0x160, 0 },
-	{ "MC3_BD_OP", 0x164, 0 },
-		{ "Back_Door_Operation", 0, 1 },
-		{ "Busy", 31, 1 },
-	{ "MC3_BIST_ADDR_BEG", 0x168, 0 },
-	{ "MC3_BIST_ADDR_END", 0x16c, 0 },
-	{ "MC3_BIST_DATA", 0x170, 0 },
-	{ "MC3_BIST_OP", 0x174, 0 },
-		{ "Op", 0, 1 },
-		{ "Data_Pattern", 1, 2 },
-		{ "Continuous", 3, 1 },
-		{ "Busy", 31, 1 },
-	{ "MC3_INT_ENABLE", 0x178, 0 },
-		{ "MC3_Corr_Err", 0, 1 },
-		{ "MC3_Uncorr_Err", 1, 1 },
-		{ "MC3_Parity_Err", 2, 8 },
-		{ "MC3_Addr_Err", 10, 1 },
-	{ "MC3_INT_CAUSE", 0x17c, 0 },
-		{ "MC3_Corr_Err", 0, 1 },
-		{ "MC3_Uncorr_Err", 1, 1 },
-		{ "MC3_Parity_Err", 2, 8 },
-		{ "MC3_Addr_Err", 10, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mc4_regs[] = {
-	{ "MC4_CFG", 0x180, 0 },
-		{ "Power_Up", 0, 1 },
-		{ "Ready", 1, 1 },
-		{ "Read_to_Write_Delay", 2, 3 },
-		{ "Write_to_Read_Delay", 5, 3 },
-		{ "MC4_Bank_Cycle", 8, 3 },
-		{ "MC4_Narrow", 24, 1 },
-		{ "MC4_Slow", 25, 1 },
-		{ "MC4A_Width", 24, 2 },
-		{ "MC4A_Slow", 26, 1 },
-	{ "MC4_MODE", 0x184, 0 },
-		{ "MC4_Mode", 0, 15 },
-		{ "Busy", 31, 1 },
-	{ "MC4_EXT_MODE", 0x188, 0 },
-		{ "MC4_Extended_Mode", 0, 15 },
-		{ "Busy", 31, 1 },
-	{ "MC4_REFRESH", 0x190, 0 },
-		{ "Refresh_Enable", 0, 1 },
-		{ "Refresh_Divisor", 1, 14 },
-		{ "Busy", 31, 1 },
-	{ "MC4_STROBE", 0x194, 0 },
-		{ "Master_DLL_Reset", 0, 1 },
-		{ "Master_DLL_Tap_Count", 1, 8 },
-		{ "Master_DLL_Locked", 9, 1 },
-		{ "Master_DLL_Max_Tap_Count", 10, 1 },
-		{ "Master_DLL_Tap_Count_Offset", 11, 6 },
-		{ "Slave_DLL_Reset", 11, 1 },
-		{ "Slave_DLL_Delta", 12, 4 },
-		{ "Slave_Delay_Line_Manual_Tap_Count", 17, 6 },
-		{ "Slave_Delay_Line_Manual_Tap_Count_Enable", 23, 1 },
-		{ "Slave_Delay_Line_Tap_Count", 24, 6 },
-	{ "MC4_ECC_CNTL", 0x198, 0 },
-		{ "ECC_Generation_Enable", 0, 1 },
-		{ "ECC_Check_Enable", 1, 1 },
-		{ "Correctable_Error_Count", 2, 8 },
-		{ "Uncorrectable_Error_Count", 10, 8 },
-	{ "MC4_CE_ADDR", 0x19c, 0 },
-		{ "MC4_CE_Addr", 4, 24 },
-	{ "MC4_CE_DATA0", 0x1a0, 0 },
-	{ "MC4_CE_DATA1", 0x1a4, 0 },
-	{ "MC4_CE_DATA2", 0x1a8, 0 },
-	{ "MC4_CE_DATA3", 0x1ac, 0 },
-	{ "MC4_CE_DATA4", 0x1b0, 0 },
-	{ "MC4_UE_ADDR", 0x1b4, 0 },
-		{ "MC4_UE_Addr", 4, 24 },
-	{ "MC4_UE_DATA0", 0x1b8, 0 },
-	{ "MC4_UE_DATA1", 0x1bc, 0 },
-	{ "MC4_UE_DATA2", 0x1c0, 0 },
-	{ "MC4_UE_DATA3", 0x1c4, 0 },
-	{ "MC4_UE_DATA4", 0x1c8, 0 },
-	{ "MC4_BD_ADDR", 0x1cc, 0 },
-		{ "MC4_Back_Door_Addr", 0, 28 },
-	{ "MC4_BD_DATA0", 0x1d0, 0 },
-	{ "MC4_BD_DATA1", 0x1d4, 0 },
-	{ "MC4_BD_DATA2", 0x1d8, 0 },
-	{ "MC4_BD_DATA3", 0x1dc, 0 },
-	{ "MC4_BD_DATA4", 0x1e0, 0 },
-	{ "MC4_BD_OP", 0x1e4, 0 },
-		{ "Operation", 0, 1 },
-		{ "Busy", 31, 1 },
-	{ "MC4_BIST_ADDR_BEG", 0x1e8, 0 },
-	{ "MC4_BIST_ADDR_END", 0x1ec, 0 },
-	{ "MC4_BIST_DATA", 0x1f0, 0 },
-	{ "MC4_BIST_OP", 0x1f4, 0 },
-		{ "Op", 0, 1 },
-		{ "Data_Pattern", 1, 2 },
-		{ "Continuous", 3, 1 },
-		{ "Busy", 31, 1 },
-	{ "MC4_INT_ENABLE", 0x1f8, 0 },
-		{ "MC4_Corr_Err", 0, 1 },
-		{ "MC4_Uncorr_Err", 1, 1 },
-		{ "MC4_Addr_Err", 2, 1 },
-	{ "MC4_INT_CAUSE", 0x1fc, 0 },
-		{ "MC4_Corr_Err", 0, 1 },
-		{ "MC4_Uncorr_Err", 1, 1 },
-		{ "MC4_Addr_Err", 2, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info tpi_regs[] = {
-	{ "TPI_ADDR", 0x280, 0 },
-		{ "TPI_ADDRESS", 0, 24 },
-	{ "TPI_WR_DATA", 0x284, 0 },
-	{ "TPI_RD_DATA", 0x288, 0 },
-	{ "TPI_CSR", 0x28c, 0 },
-		{ "TPIWR", 0, 1 },
-		{ "TPIRDY", 1, 1 },
-		{ "INT_DIR", 31, 1 },
-	{ "TPI_PAR", 0x29c, 0 },
-		{ "TPIPAR", 0, 7 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info tp_regs[] = {
-	{ "TP_IN_CONFIG", 0x300, 0 },
-		{ "TP_IN_CSPI_Tunnel", 0, 1 },
-		{ "TP_IN_CSPI_Ethernet", 1, 1 },
-		{ "TP_IN_CSPI_CPL", 3, 1 },
-		{ "TP_IN_CSPI_POS", 4, 1 },
-		{ "TP_IN_CSPI_Check_IP_Csum", 5, 1 },
-		{ "TP_IN_CSPI_Check_TCP_Csum", 6, 1 },
-		{ "TP_IN_ESPI_Tunnel", 7, 1 },
-		{ "TP_IN_ESPI_Ethernet", 8, 1 },
-		{ "TP_IN_ESPI_CPL", 10, 1 },
-		{ "TP_IN_ESPI_POS", 11, 1 },
-		{ "TP_IN_ESPI_Check_IP_Csum", 12, 1 },
-		{ "TP_IN_ESPI_Check_TCP_Csum", 13, 1 },
-		{ "Offload_Disable", 14, 1 },
-	{ "TP_OUT_CONFIG", 0x304, 0 },
-		{ "TP_OUT_C_ETH", 0, 1 },
-		{ "TP_OUT_CSPI_CPL", 2, 1 },
-		{ "TP_OUT_CSPI_POS", 3, 1 },
-		{ "TP_OUT_CSPI_Generate_IP_Csum", 4, 1 },
-		{ "TP_OUT_CSPI_Generate_TCP_Csum", 5, 1 },
-		{ "TP_OUT_ESPI_Ethernet", 6, 1 },
-		{ "TP_OUT_ESPI_TAG_Ethernet", 7, 1 },
-		{ "TP_OUT_ESPI_CPL", 8, 1 },
-		{ "TP_OUT_ESPI_POS", 9, 1 },
-		{ "TP_OUT_ESPI_Generate_IP_Csum", 10, 1 },
-		{ "TP_OUT_ESPI_Generate_TCP_Csum", 11, 1 },
-	{ "TP_GLOBAL_CONFIG", 0x308, 0 },
-		{ "IP_TTL", 0, 8 },
-		{ "TCAM_Server_Region_Usage", 8, 2 },
-		{ "QOS_Mapping", 10, 1 },
-		{ "TCP_Csum", 11, 1 },
-		{ "UDP_Csum", 12, 1 },
-		{ "IP_Csum", 13, 1 },
-		{ "IP_ID_Split", 14, 1 },
-		{ "Path_MTU", 15, 1 },
-		{ "5Tuple_Lookup", 17, 2 },
-		{ "IP_Fragment_Drop", 19, 1 },
-		{ "Ping_Drop", 20, 1 },
-		{ "Protect_Mode", 21, 1 },
-		{ "SYN_Cookie_Algorithm", 22, 1 },
-		{ "Attack_Filter", 23, 1 },
-		{ "Interface_Type", 24, 1 },
-		{ "Disable_RX_Flow_Control", 25, 1 },
-		{ "SYN_Cookie_Parameter", 26, 6 },
-	{ "TP_GLOBAL_RX_CREDITS", 0x30c, 0 },
-	{ "TP_CM_SIZE", 0x310, 0 },
-	{ "TP_CM_MM_BASE", 0x314, 0 },
-		{ "CM_MemMgr_Base", 0, 28 },
-	{ "TP_CM_TIMER_BASE", 0x318, 0 },
-		{ "CM_Timer_Base", 0, 28 },
-	{ "TP_PM_SIZE", 0x31c, 0 },
-	{ "TP_PM_TX_BASE", 0x320, 0 },
-	{ "TP_PM_DEFRAG_BASE", 0x324, 0 },
-	{ "TP_PM_RX_BASE", 0x328, 0 },
-	{ "TP_PM_RX_PG_SIZE", 0x32c, 0 },
-	{ "TP_PM_RX_MAX_PGS", 0x330, 0 },
-	{ "TP_PM_TX_PG_SIZE", 0x334, 0 },
-	{ "TP_PM_TX_MAX_PGS", 0x338, 0 },
-	{ "TP_TCP_OPTIONS", 0x340, 0 },
-		{ "Timestamp", 0, 2 },
-		{ "Window_Scale", 2, 2 },
-		{ "SACK", 4, 2 },
-		{ "ECN", 6, 2 },
-		{ "SACK_Algorithm", 8, 2 },
-		{ "MSS", 10, 1 },
-		{ "Default_Peer_MSS", 16, 16 },
-	{ "TP_DACK_CONFIG", 0x344, 0 },
-		{ "DACK_Mode", 0, 1 },
-		{ "DACK_Auto_Mgmt", 1, 1 },
-		{ "DACK_Auto_Careful", 2, 1 },
-		{ "DACK_MSS_Selector", 3, 2 },
-		{ "DACK_Byte_Threshold", 5, 20 },
-	{ "TP_PC_CONFIG", 0x348, 0 },
-		{ "TP_Access_Latency", 0, 4 },
-		{ "Held_FIN_Disable", 4, 1 },
-		{ "DDP_FC_Enable", 5, 1 },
-		{ "RDMA_Err_Enable", 6, 1 },
-		{ "Fast_PDU_Delivery", 7, 1 },
-		{ "Clear_FIN", 8, 1 },
-		{ "TP_PC_Rev", 30, 2 },
-	{ "TP_BACKOFF0", 0x350, 0 },
-		{ "Element0", 0, 8 },
-		{ "Element1", 8, 8 },
-		{ "Element2", 16, 8 },
-		{ "Element3", 24, 8 },
-	{ "TP_BACKOFF1", 0x354, 0 },
-		{ "Element0", 0, 8 },
-		{ "Element1", 8, 8 },
-		{ "Element2", 16, 8 },
-		{ "Element3", 24, 8 },
-	{ "TP_BACKOFF2", 0x358, 0 },
-		{ "Element0", 0, 8 },
-		{ "Element1", 8, 8 },
-		{ "Element2", 16, 8 },
-		{ "Element3", 24, 8 },
-	{ "TP_BACKOFF3", 0x35c, 0 },
-		{ "Element0", 0, 8 },
-		{ "Element1", 8, 8 },
-		{ "Element2", 16, 8 },
-		{ "Element3", 24, 8 },
-	{ "TP_PARA_REG0", 0x360, 0 },
-		{ "Var_Mult", 0, 4 },
-		{ "Var_Gain", 4, 4 },
-		{ "SRTT_Gain", 8, 4 },
-		{ "RTTVar_Init", 12, 4 },
-		{ "Dup_Thresh", 20, 4 },
-		{ "Init_Cong_Win", 24, 3 },
-	{ "TP_PARA_REG1", 0x364, 0 },
-		{ "Initial_Slow_Start_Threshold", 0, 16 },
-		{ "Receive_Buffer_Size", 16, 16 },
-	{ "TP_PARA_REG2", 0x368, 0 },
-		{ "RX_Coalesce_Size", 0, 16 },
-		{ "MAX_RX_Size", 16, 16 },
-	{ "TP_PARA_REG3", 0x36c, 0 },
-		{ "RX_Coalescing_PSH_Deliver", 0, 1 },
-		{ "RX_Coalescing_Enable", 1, 1 },
-		{ "Tahoe_Enable", 2, 1 },
-		{ "MAX_Reorder_Fragments", 12, 3 },
-	{ "TP_TIMER_RESOLUTION", 0x390, 0 },
-		{ "Delayed_ACK_Timer_Resolution", 0, 6 },
-		{ "Generic_Timer_Resolution", 16, 6 },
-	{ "TP_2MSL", 0x394, 0 },
-		{ "2MSL", 0, 30 },
-	{ "TP_RXT_MIN", 0x398, 0 },
-		{ "Retransmit_Timer_MIN", 0, 16 },
-	{ "TP_RXT_MAX", 0x39c, 0 },
-		{ "Retransmit_Timer_MAX", 0, 30 },
-	{ "TP_PERS_MIN", 0x3a0, 0 },
-		{ "Persist_Timer_MIN", 0, 16 },
-	{ "TP_PERS_MAX", 0x3a4, 0 },
-		{ "Persist_Timer_MAX", 0, 30 },
-	{ "TP_KEEP_IDLE", 0x3ac, 0 },
-		{ "Keep_Alive_Idle_Time", 0, 30 },
-	{ "TP_KEEP_INTVL", 0x3b0, 0 },
-		{ "Keep_Alive_Interval_Time", 0, 30 },
-	{ "TP_INIT_SRTT", 0x3b4, 0 },
-		{ "Initial_SRTT", 0, 16 },
-	{ "TP_DACK_TIME", 0x3b8, 0 },
-		{ "Delayed_ACK_Time", 0, 11 },
-	{ "TP_FINWAIT2_TIME", 0x3bc, 0 },
-		{ "FINWAIT2_TIME", 0, 30 },
-	{ "TP_FAST_FINWAIT2_TIME", 0x3c0, 0 },
-		{ "Fast_FINWAIT2_Time", 0, 30 },
-	{ "TP_SHIFT_CNT", 0x3c4, 0 },
-		{ "KeepAlive_MAX", 0, 8 },
-		{ "WindowProbe_MAX", 8, 8 },
-		{ "Retransmission_MAX", 16, 8 },
-		{ "SYN_MAX", 24, 8 },
-	{ "TP_QOS_REG0", 0x3e0, 0 },
-		{ "L3_Value", 0, 6 },
-	{ "TP_QOS_REG1", 0x3e4, 0 },
-		{ "L3_Value", 0, 6 },
-	{ "TP_QOS_REG2", 0x3e8, 0 },
-		{ "L3_Value", 0, 6 },
-	{ "TP_QOS_REG3", 0x3ec, 0 },
-		{ "L3_Value", 0, 6 },
-	{ "TP_QOS_REG4", 0x3f0, 0 },
-		{ "L3_Value", 0, 6 },
-	{ "TP_QOS_REG5", 0x3f4, 0 },
-		{ "L3_Value", 0, 6 },
-	{ "TP_QOS_REG6", 0x3f8, 0 },
-		{ "L3_Value", 0, 6 },
-	{ "TP_QOS_REG7", 0x3fc, 0 },
-		{ "L3_Value", 0, 6 },
-	{ "TP_MTU_REG0", 0x404, 0 },
-	{ "TP_MTU_REG1", 0x408, 0 },
-	{ "TP_MTU_REG2", 0x40c, 0 },
-	{ "TP_MTU_REG3", 0x410, 0 },
-	{ "TP_MTU_REG4", 0x414, 0 },
-	{ "TP_MTU_REG5", 0x418, 0 },
-	{ "TP_MTU_REG6", 0x41c, 0 },
-	{ "TP_MTU_REG7", 0x420, 0 },
-	{ "TP_RESET", 0x44c, 0 },
-		{ "TP_Reset", 0, 1 },
-		{ "CM_MemMgr_Init", 1, 1 },
-	{ "TP_MIB_INDEX", 0x450, 0 },
-	{ "TP_MIB_DATA", 0x454, 0 },
-	{ "TP_SYNC_TIME_HI", 0x458, 0 },
-	{ "TP_SYNC_TIME_LO", 0x45c, 0 },
-	{ "TP_CM_MM_RX_FLST_BASE", 0x460, 0 },
-		{ "CM_MemMgr_RX_Free_List_Base", 0, 28 },
-	{ "TP_CM_MM_TX_FLST_BASE", 0x464, 0 },
-		{ "CM_MemMgr_TX_Free_List_Base", 0, 28 },
-	{ "TP_CM_MM_P_FLST_BASE", 0x468, 0 },
-		{ "CM_MemMgr_PStruct_Free_List_Base", 0, 28 },
-	{ "TP_CM_MM_MAX_P", 0x46c, 0 },
-		{ "CM_MemMgr_MAX_PStruct", 0, 28 },
-	{ "TP_INT_ENABLE", 0x470, 0 },
-		{ "TX_Free_List_Empty", 0, 1 },
-		{ "RX_Free_List_Empty", 1, 1 },
-	{ "TP_INT_CAUSE", 0x474, 0 },
-		{ "TX_Free_List_Empty", 0, 1 },
-		{ "RX_Free_List_Empty", 1, 1 },
-	{ "TP_FLM_FREE_PSTRUCT_CNT", 0x480, 0 },
-	{ "TP_FLM_FREE_RX_PG_CNT", 0x484, 0 },
-	{ "TP_FLM_FREE_TX_PG_CNT", 0x488, 0 },
-	{ "TP_HEAP_PUSH_CNT", 0x48c, 0 },
-	{ "TP_HEAP_POP_CNT", 0x490, 0 },
-	{ "TP_DACK_PUSH_CNT", 0x494, 0 },
-	{ "TP_DACK_POP_CNT", 0x498, 0 },
-	{ "TP_MOD_PUSH_CNT", 0x49c, 0 },
-	{ "TP_MOD_POP_CNT", 0x4a0, 0 },
-	{ "TP_TIMER_SEPARATOR", 0x4a4, 0 },
-		{ "Disable_Past_Timer_Insertion", 0, 1 },
-		{ "Modulation_Timer_Separator", 1, 15 },
-		{ "Global_Timer_Separator", 16, 16 },
-	{ "TP_DEBUG_SEL", 0x4a8, 0 },
-	{ "TP_CM_FC_MODE", 0x4b0, 0 },
-	{ "TP_PC_CONGESTION_CNTL", 0x4b4, 0 },
-	{ "TP_TX_DROP_CONFIG", 0x4b8, 0 },
-		{ "ENABLE_TX_DROP", 31, 1 },
-		{ "ENABLE_TX_ERROR", 30, 1 },
-		{ "DROP_TICKS_CNT", 4, 26 },
-		{ "NUM_PKTS_DROPPED", 0, 4 },
-	{ "TP_TX_DROP_COUNT", 0x4bc, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info rat_regs[] = {
-	{ "RAT_ROUTE_CONTROL", 0x580, 0 },
-		{ "Use_Route_Table", 0, 1 },
-		{ "Enable_CSPI", 1, 1 },
-		{ "Enable_PCIX", 2, 1 },
-	{ "RAT_ROUTE_TABLE_INDEX", 0x584, 0 },
-		{ "Route_Table_Index", 0, 4 },
-	{ "RAT_ROUTE_TABLE_DATA", 0x588, 0 },
-	{ "RAT_NO_ROUTE", 0x58c, 0 },
-		{ "CPL_Opcode", 0, 8 },
-	{ "RAT_INTR_ENABLE", 0x590, 0 },
-		{ "ZeroRouteError", 0, 1 },
-		{ "CspiFramingError", 1, 1 },
-		{ "SgeFramingError", 2, 1 },
-		{ "TpFramingError", 3, 1 },
-	{ "RAT_INTR_CAUSE", 0x594, 0 },
-		{ "ZeroRouteError", 0, 1 },
-		{ "CspiFramingError", 1, 1 },
-		{ "SgeFramingError", 2, 1 },
-		{ "TpFramingError", 3, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info cspi_regs[] = {
-	{ "CSPI_RX_AE_WM", 0x810, 0 },
-	{ "CSPI_RX_AF_WM", 0x814, 0 },
-	{ "CSPI_CALENDAR_LEN", 0x818, 0 },
-		{ "CalendarLength", 0, 16 },
-	{ "CSPI_FIFO_STATUS_ENABLE", 0x820, 0 },
-		{ "FifoStatusEnable", 0, 1 },
-	{ "CSPI_MAXBURST1_MAXBURST2", 0x828, 0 },
-		{ "MaxBurst1", 0, 16 },
-		{ "MaxBurst2", 16, 16 },
-	{ "CSPI_TRAIN", 0x82c, 0 },
-		{ "CSPI_TRAIN_ALPHA", 0, 16 },
-		{ "CSPI_TRAIN_DATA_MAXT", 16, 16 },
-	{ "CSPI_INTR_STATUS", 0x848, 0 },
-		{ "DIP4Err", 0, 1 },
-		{ "RXDrop", 1, 1 },
-		{ "TXDrop", 2, 1 },
-		{ "RXOverflow", 3, 1 },
-		{ "RAMParityErr", 4, 1 },
-	{ "CSPI_INTR_ENABLE", 0x84c, 0 },
-		{ "DIP4Err", 0, 1 },
-		{ "RXDrop", 1, 1 },
-		{ "TXDrop", 2, 1 },
-		{ "RXOverflow", 3, 1 },
-		{ "RAMParityErr", 4, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info espi_regs[] = {
-	{ "ESPI_SCH_TOKEN0", 0x880, 0 },
-		{ "SchToken0", 0, 16 },
-	{ "ESPI_SCH_TOKEN1", 0x884, 0 },
-		{ "SchToken1", 0, 16 },
-	{ "ESPI_SCH_TOKEN2", 0x888, 0 },
-		{ "SchToken2", 0, 16 },
-	{ "ESPI_SCH_TOKEN3", 0x88c, 0 },
-		{ "SchToken3", 0, 16 },
-	{ "ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK", 0x890, 0 },
-		{ "AlmostEmpty", 0, 16 },
-	{ "ESPI_RX_FIFO_ALMOST_FULL_WATERMARK", 0x894, 0 },
-		{ "AlmostFull", 0, 16 },
-	{ "ESPI_CALENDAR_LENGTH", 0x898, 0 },
-		{ "CalendarLength", 0, 16 },
-	{ "PORT_CONFIG", 0x89c, 0 },
-		{ "RX_NPorts", 0, 8 },
-		{ "TX_NPorts", 8, 8 },
-	{ "ESPI_FIFO_STATUS_ENABLE", 0x8a0, 0 },
-		{ "RXStatusEnable", 0, 1 },
-		{ "TXDropEnable", 1, 1 },
-		{ "RXEndianMode", 2, 1 },
-		{ "TXEndianMode", 3, 1 },
-		{ "Intel1010Mode", 4, 1 },
-	{ "ESPI_MAXBURST1_MAXBURST2", 0x8a8, 0 },
-		{ "MaxBurst1", 0, 16 },
-		{ "MaxBurst2", 16, 16 },
-	{ "ESPI_TRAIN", 0x8ac, 0 },
-		{ "MaxTrainAlpha", 0, 16 },
-		{ "MaxTrainData", 16, 16 },
-	{ "RAM_STATUS", 0x8b0, 0 },
-		{ "RXFIFOParityError", 0, 10 },
-		{ "TXFIFOParityError", 10, 10 },
-		{ "RXFIFOOverflow", 20, 10 },
-	{ "TX_DROP_COUNT0", 0x8b4, 0 },
-		{ "TXPort0DropCnt", 0, 16 },
-		{ "TxPort1DropCnt", 16, 16 },
-	{ "TX_DROP_COUNT1", 0x8b8, 0 },
-		{ "TXPort2DropCnt", 0, 16 },
-		{ "TxPort3DropCnt", 16, 16 },
-	{ "RX_DROP_COUNT0", 0x8bc, 0 },
-		{ "RXPort0DropCnt", 0, 16 },
-		{ "RxPort1DropCnt", 16, 16 },
-	{ "RX_DROP_COUNT1", 0x8c0, 0 },
-		{ "RXPort2DropCnt", 0, 16 },
-		{ "RxPort3DropCnt", 16, 16 },
-	{ "DIP4_ERROR_COUNT", 0x8c4, 0 },
-		{ "Dip4ErrorCnt", 0, 12 },
-		{ "Dip4ErrorCntShadow", 12, 12 },
-		{ "TriCN_RX_Train_Err", 24, 1 },
-		{ "TriCN_RX_Training", 25, 1 },
-		{ "TriCN_RX_Train_OK", 26, 1 },
-	{ "ESPI_INTR_STATUS", 0x8c8, 0 },
-		{ "DIP4Err", 0, 1 },
-		{ "RXDrop", 1, 1 },
-		{ "TXDrop", 2, 1 },
-		{ "RXOverflow", 3, 1 },
-		{ "RAMParityErr", 4, 1 },
-		{ "DIP2ParityErr", 5, 1 },
-	{ "ESPI_INTR_ENABLE", 0x8cc, 0 },
-		{ "DIP4Err", 0, 1 },
-		{ "RXDrop", 1, 1 },
-		{ "TXDrop", 2, 1 },
-		{ "RXOverflow", 3, 1 },
-		{ "RAMParityErr", 4, 1 },
-		{ "DIP2ParityErr", 5, 1 },
-	{ "RX_DROP_THRESHOLD", 0x8d0, 0 },
-	{ "ESPI_RX_RESET", 0x8ec, 0 },
-		{ "ESPI_RX_LNK_RST", 0, 1 },
-		{ "ESPI_RX_CORE_RST", 1, 1 },
-		{ "RX_CLK_STATUS", 2, 1 },
-	{ "ESPI_MISC_CONTROL", 0x8f0, 0 },
-		{ "Out_of_Sync_Count", 0, 4 },
-		{ "DIP2_Count_Mode_Enable", 4, 1 },
-		{ "DIP2_Parity_Err_Thres", 5, 4 },
-		{ "DIP4_Thres", 9, 12 },
-		{ "DIP4_Thres_Enable", 21, 1 },
-		{ "Force_Disable_Status", 22, 1 },
-		{ "Dynamic_Deskew", 23, 1 },
-		{ "Monitored_Port_Num", 25, 2 },
-		{ "Monitored_Direction", 27, 1 },
-		{ "Monitored_Interface", 28, 1 },
-	{ "ESPI_DIP2_ERR_COUNT", 0x8f4, 0 },
-		{ "DIP2_Err_Cnt", 0, 4 },
-	{ "ESPI_CMD_ADDR", 0x8f8, 0 },
-		{ "Write_Data", 0, 8 },
-		{ "Register_Offset", 8, 4 },
-		{ "Channel_Addr", 12, 4 },
-		{ "Module_Addr", 16, 2 },
-		{ "Bundle_Addr", 20, 2 },
-		{ "SPI4_Command", 24, 8 },
-	{ "ESPI_GOSTAT", 0x8fc, 0 },
-		{ "Read_Data", 0, 8 },
-		{ "ESPI_Cmd_Busy", 8, 1 },
-		{ "Error_Ack", 9, 1 },
-		{ "Unmapped_Err", 10, 1 },
-		{ "Transaction_Timer", 16, 8 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info ulp_regs[] = {
-	{ "ULP_ULIMIT", 0x980, 0 },
-	{ "ULP_TAGMASK", 0x984, 0 },
-	{ "ULP_HREG_INDEX", 0x988, 0 },
-	{ "ULP_HREG_DATA", 0x98c, 0 },
-	{ "ULP_INT_ENABLE", 0x990, 0 },
-	{ "ULP_INT_CAUSE", 0x994, 0 },
-		{ "Hreg_Par_Err", 0, 1 },
-		{ "Egrs_Data_Par_Err", 1, 1 },
-		{ "Ingrs_Data_Par_Err", 2, 1 },
-		{ "Pm_Intr", 3, 1 },
-		{ "Pm_E2C_Sync_Err", 4, 1 },
-		{ "Pm_C2E_Sync_Err", 5, 1 },
-		{ "Pm_E2C_Empty_Err", 6, 1 },
-		{ "Pm_C2E_Empty_Err", 7, 1 },
-		{ "Pm_Par_Err", 8, 16 },
-		{ "Pm_E2C_Wrt_Full", 24, 1 },
-		{ "Pm_C2E_Wrt_Full", 25, 1 },
-	{ "ULP_PIO_CTRL", 0x998, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info pl_regs[] = {
-	{ "PL_ENABLE", 0xa00, 0 },
-		{ "PL_Intr_SGE_Err", 0, 1 },
-		{ "PL_Intr_SGE_Data", 1, 1 },
-		{ "PL_Intr_MC3", 2, 1 },
-		{ "PL_Intr_MC4", 3, 1 },
-		{ "PL_Intr_MC5", 4, 1 },
-		{ "PL_Intr_RAT", 5, 1 },
-		{ "PL_Intr_TP", 6, 1 },
-		{ "PL_Intr_ULP", 7, 1 },
-		{ "PL_Intr_ESPI", 8, 1 },
-		{ "PL_Intr_CSPI", 9, 1 },
-		{ "PL_Intr_PCIX", 10, 1 },
-		{ "PL_Intr_EXT", 11, 1 },
-	{ "PL_CAUSE", 0xa04, 0 },
-		{ "PL_Intr_SGE_Err", 0, 1 },
-		{ "PL_Intr_SGE_Data", 1, 1 },
-		{ "PL_Intr_MC3", 2, 1 },
-		{ "PL_Intr_MC4", 3, 1 },
-		{ "PL_Intr_MC5", 4, 1 },
-		{ "PL_Intr_RAT", 5, 1 },
-		{ "PL_Intr_TP", 6, 1 },
-		{ "PL_Intr_ULP", 7, 1 },
-		{ "PL_Intr_ESPI", 8, 1 },
-		{ "PL_Intr_CSPI", 9, 1 },
-		{ "PL_Intr_PCIX", 10, 1 },
-		{ "PL_Intr_EXT", 11, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mc5_regs[] = {
-	{ "MC5_CONFIG", 0xc04, 0 },
-		{ "Mode", 0, 1 },
-		{ "TCAM_Reset", 1, 1 },
-		{ "TCAM_Ready", 2, 1 },
-		{ "DBGI_Enable", 4, 1 },
-		{ "M_Bus_Enable", 5, 1 },
-		{ "Parity_Enable", 6, 1 },
-		{ "SYN_Issue_Mode", 7, 2 },
-		{ "Build", 16, 1 },
-		{ "Compression_Enable", 17, 1 },
-		{ "Num_LIP", 18, 6 },
-		{ "TCAM_Part_Cnt", 24, 2 },
-		{ "TCAM_Part_Type", 26, 2 },
-		{ "TCAM_Part_Size", 28, 2 },
-		{ "TCAM_Part_Type_HI", 30, 1 },
-	{ "MC5_SIZE", 0xc08, 0 },
-		{ "Size", 0, 22 },
-	{ "MC5_ROUTING_TABLE_INDEX", 0xc0c, 0 },
-		{ "Start_of_Routing_Table", 0, 22 },
-	{ "MC5_SERVER_INDEX", 0xc14, 0 },
-		{ "Start_of_Server_Index", 0, 22 },
-	{ "MC5_LIP_RAM_ADDR", 0xc18, 0 },
-		{ "Local_IP_RAM_Addr", 0, 6 },
-		{ "RAM_Write_Enable", 8, 1 },
-	{ "MC5_LIP_RAM_DATA", 0xc1c, 0 },
-	{ "MC5_RSP_LATENCY", 0xc20, 0 },
-		{ "Search_Response_Latency", 0, 5 },
-		{ "Learn_Response_Latency", 8, 5 },
-	{ "MC5_PARITY_LATENCY", 0xc24, 0 },
-		{ "SRCHLAT", 0, 5 },
-		{ "PARLAT", 8, 5 },
-	{ "MC5_WR_LRN_VERIFY", 0xc28, 0 },
-		{ "POVEREN", 0, 1 },
-		{ "LRNVEREN", 1, 1 },
-		{ "VWVEREN", 2, 1 },
-	{ "MC5_PART_ID_INDEX", 0xc2c, 0 },
-		{ "IDINDEX", 0, 4 },
-	{ "MC5_RESET_MAX", 0xc30, 0 },
-		{ "RSTMAX", 0, 9 },
-	{ "MC5_INT_ENABLE", 0xc40, 0 },
-		{ "MC5_Int_Hit_Out_Active_Region_Err", 0, 1 },
-		{ "MC5_Int_Hit_In_Active_Region_Err", 1, 1 },
-		{ "MC5_Int_Hit_In_RT_Region_Err", 2, 1 },
-		{ "MC5_Int_Miss_Err", 3, 1 },
-		{ "MC5_Int_LIP0_Err", 4, 1 },
-		{ "MC5_Int_LIP_Miss_Err", 5, 1 },
-		{ "MC5_Int_Parity_Err", 6, 1 },
-		{ "MC5_Int_Active_Region_Full", 7, 1 },
-		{ "MC5_Int_NFA_Srch_Err", 8, 1 },
-		{ "MC5_Int_SYN_Cookie", 9, 1 },
-		{ "MC5_Int_SYN_Cookie_Bad", 10, 1 },
-		{ "MC5_Int_SYN_Cookie_Off", 11, 1 },
-		{ "MC5_Int_Unknown_Cmd", 15, 1 },
-		{ "MC5_Int_RequestQ_Parity_Err", 16, 1 },
-		{ "MC5_Int_DispatchQ_Parity_Err", 17, 1 },
-		{ "MC5_Int_Del_Act_Empty", 18, 1 },
-	{ "MC5_INT_CAUSE", 0xc44, 0 },
-		{ "MC5_Int_Hit_Out_Active_Region_Err", 0, 1 },
-		{ "MC5_Int_Hit_In_Active_Region_Err", 1, 1 },
-		{ "MC5_Int_Hit_In_RT_Region_Err", 2, 1 },
-		{ "MC5_Int_Miss_Err", 3, 1 },
-		{ "MC5_Int_LIP0_Err", 4, 1 },
-		{ "MC5_Int_LIP_Miss_Err", 5, 1 },
-		{ "MC5_Int_Parity_Err", 6, 1 },
-		{ "MC5_Int_Active_Region_Full", 7, 1 },
-		{ "MC5_Int_NFA_Srch_Err", 8, 1 },
-		{ "MC5_Int_SYN_Cookie", 9, 1 },
-		{ "MC5_Int_SYN_Cookie_Bad", 10, 1 },
-		{ "MC5_Int_SYN_Cookie_Off", 11, 1 },
-		{ "MC5_Int_Unknown_Cmd", 15, 1 },
-		{ "MC5_Int_RequestQ_Parity_Err", 16, 1 },
-		{ "MC5_Int_DispatchQ_Parity_Err", 17, 1 },
-		{ "MC5_Int_Del_Act_Empty", 18, 1 },
-	{ "MC5_INT_TID", 0xc48, 0 },
-	{ "MC5_INT_PTID", 0xc4c, 0 },
-	{ "MC5_DBGI_CONFIG", 0xc74, 0 },
-	{ "MC5_DBGI_REQ_CMD", 0xc78, 0 },
-		{ "CmdMode", 0, 3 },
-		{ "SADRSEL", 4, 1 },
-		{ "Write_Burst_Size", 22, 10 },
-	{ "MC5_DBGI_REQ_ADDR0", 0xc7c, 0 },
-	{ "MC5_DBGI_REQ_ADDR1", 0xc80, 0 },
-	{ "MC5_DBGI_REQ_ADDR2", 0xc84, 0 },
-	{ "MC5_DBGI_REQ_DATA0", 0xc88, 0 },
-	{ "MC5_DBGI_REQ_DATA1", 0xc8c, 0 },
-	{ "MC5_DBGI_REQ_DATA2", 0xc90, 0 },
-	{ "MC5_DBGI_REQ_DATA3", 0xc94, 0 },
-	{ "MC5_DBGI_REQ_DATA4", 0xc98, 0 },
-	{ "MC5_DBGI_REQ_MASK0", 0xc9c, 0 },
-	{ "MC5_DBGI_REQ_MASK1", 0xca0, 0 },
-	{ "MC5_DBGI_REQ_MASK2", 0xca4, 0 },
-	{ "MC5_DBGI_REQ_MASK3", 0xca8, 0 },
-	{ "MC5_DBGI_REQ_MASK4", 0xcac, 0 },
-	{ "MC5_DBGI_RSP_STATUS", 0xcb0, 0 },
-		{ "DBGI_Rsp_Valid", 0, 1 },
-		{ "DBGI_Rsp_Hit", 1, 1 },
-		{ "DBGI_Rsp_Err", 2, 1 },
-		{ "DBGI_Rsp_Err_Reason", 8, 3 },
-	{ "MC5_DBGI_RSP_DATA0", 0xcb4, 0 },
-	{ "MC5_DBGI_RSP_DATA1", 0xcb8, 0 },
-	{ "MC5_DBGI_RSP_DATA2", 0xcbc, 0 },
-	{ "MC5_DBGI_RSP_DATA3", 0xcc0, 0 },
-	{ "MC5_DBGI_RSP_DATA4", 0xcc4, 0 },
-	{ "MC5_DBGI_RSP_LAST_CMD", 0xcc8, 0 },
-	{ "MC5_POPEN_DATA_WR_CMD", 0xccc, 0 },
-	{ "MC5_POPEN_MASK_WR_CMD", 0xcd0, 0 },
-	{ "MC5_AOPEN_SRCH_CMD", 0xcd4, 0 },
-	{ "MC5_AOPEN_LRN_CMD", 0xcd8, 0 },
-	{ "MC5_SYN_SRCH_CMD", 0xcdc, 0 },
-	{ "MC5_SYN_LRN_CMD", 0xce0, 0 },
-	{ "MC5_ACK_SRCH_CMD", 0xce4, 0 },
-	{ "MC5_ACK_LRN_CMD", 0xce8, 0 },
-	{ "MC5_ILOOKUP_CMD", 0xcec, 0 },
-	{ "MC5_ELOOKUP_CMD", 0xcf0, 0 },
-	{ "MC5_DATA_WRITE_CMD", 0xcf4, 0 },
-	{ "MC5_DATA_READ_CMD", 0xcf8, 0 },
-	{ "MC5_MASK_WRITE_CMD", 0xcfc, 0 },
-	{ NULL, 0, 0 }
-};
diff --git a/usr.sbin/cxgbtool/reg_defs_t3.c b/usr.sbin/cxgbtool/reg_defs_t3.c
deleted file mode 100644
index 6e9b8b1..0000000
--- a/usr.sbin/cxgbtool/reg_defs_t3.c
+++ /dev/null
@@ -1,2676 +0,0 @@
-/*
- * $FreeBSD$
- */
-
-
-/* This file is automatically generated --- do not edit */
-
-struct reg_info sge3_regs[] = {
-	{ "SG_CONTROL", 0x0, 0 },
-		{ "EgrEnUpBp", 21, 1 },
-		{ "DropPkt", 20, 1 },
-		{ "EgrGenCtrl", 19, 1 },
-		{ "UserSpaceSize", 14, 5 },
-		{ "HostPageSize", 11, 3 },
-		{ "PCIRelax", 10, 1 },
-		{ "FLMode", 9, 1 },
-		{ "PktShift", 6, 3 },
-		{ "OneIntMultQ", 5, 1 },
-		{ "FLPickAvail", 4, 1 },
-		{ "BigEndianEgress", 3, 1 },
-		{ "BigEndianIngress", 2, 1 },
-		{ "IscsiCoalescing", 1, 1 },
-		{ "GlobalEnable", 0, 1 },
-	{ "SG_KDOORBELL", 0x4, 0 },
-		{ "SelEgrCntx", 31, 1 },
-		{ "EgrCntx", 0, 16 },
-	{ "SG_GTS", 0x8, 0 },
-		{ "RspQ", 29, 3 },
-		{ "NewTimer", 16, 13 },
-		{ "NewIndex", 0, 16 },
-	{ "SG_CONTEXT_CMD", 0xc, 0 },
-		{ "Opcode", 28, 4 },
-		{ "Busy", 27, 1 },
-		{ "CQ_credit", 20, 7 },
-		{ "CQ", 19, 1 },
-		{ "RspQ", 18, 1 },
-		{ "Egress", 17, 1 },
-		{ "FreeList", 16, 1 },
-		{ "Context", 0, 16 },
-	{ "SG_CONTEXT_DATA0", 0x10, 0 },
-	{ "SG_CONTEXT_DATA1", 0x14, 0 },
-	{ "SG_CONTEXT_DATA2", 0x18, 0 },
-	{ "SG_CONTEXT_DATA3", 0x1c, 0 },
-	{ "SG_CONTEXT_MASK0", 0x20, 0 },
-	{ "SG_CONTEXT_MASK1", 0x24, 0 },
-	{ "SG_CONTEXT_MASK2", 0x28, 0 },
-	{ "SG_CONTEXT_MASK3", 0x2c, 0 },
-	{ "SG_RSPQ_CREDIT_RETURN", 0x30, 0 },
-		{ "RspQ", 29, 3 },
-		{ "Data", 0, 16 },
-	{ "SG_HI_DRB_HI_THRSH", 0x38, 0 },
-		{ "HiDrbHiThrsh", 0, 10 },
-	{ "SG_HI_DRB_LO_THRSH", 0x3c, 0 },
-		{ "HiDrbLoThrsh", 0, 10 },
-	{ "SG_LO_DRB_HI_THRSH", 0x40, 0 },
-		{ "LoDrbHiThrsh", 0, 10 },
-	{ "SG_LO_DRB_LO_THRSH", 0x44, 0 },
-		{ "LoDrbLoThrsh", 0, 10 },
-	{ "SG_ONE_INT_MULT_Q_COALESCING_TIMER", 0x48, 0 },
-	{ "SG_RSPQ_FL_STATUS", 0x4c, 0 },
-		{ "RspQ0Starved", 0, 1 },
-		{ "RspQ1Starved", 1, 1 },
-		{ "RspQ2Starved", 2, 1 },
-		{ "RspQ3Starved", 3, 1 },
-		{ "RspQ4Starved", 4, 1 },
-		{ "RspQ5Starved", 5, 1 },
-		{ "RspQ6Starved", 6, 1 },
-		{ "RspQ7Starved", 7, 1 },
-		{ "RspQ0Disabled", 8, 1 },
-		{ "RspQ1Disabled", 9, 1 },
-		{ "RspQ2Disabled", 10, 1 },
-		{ "RspQ3Disabled", 11, 1 },
-		{ "RspQ4Disabled", 12, 1 },
-		{ "RspQ5Disabled", 13, 1 },
-		{ "RspQ6Disabled", 14, 1 },
-		{ "RspQ7Disabled", 15, 1 },
-		{ "FL0Empty", 16, 1 },
-		{ "FL1Empty", 17, 1 },
-		{ "FL2Empty", 18, 1 },
-		{ "FL3Empty", 19, 1 },
-		{ "FL4Empty", 20, 1 },
-		{ "FL5Empty", 21, 1 },
-		{ "FL6Empty", 22, 1 },
-		{ "FL7Empty", 23, 1 },
-		{ "FL8Empty", 24, 1 },
-		{ "FL9Empty", 25, 1 },
-		{ "FL10Empty", 26, 1 },
-		{ "FL11Empty", 27, 1 },
-		{ "FL12Empty", 28, 1 },
-		{ "FL13Empty", 29, 1 },
-		{ "FL14Empty", 30, 1 },
-		{ "FL15Empty", 31, 1 },
-	{ "SG_EGR_PRI_CNT", 0x50, 0 },
-		{ "EgrPriCnt", 0, 5 },
-	{ "SG_EGR_RCQ_DRB_THRSH", 0x54, 0 },
-		{ "HiRcqDrbThrsh", 16, 11 },
-		{ "LoRcqDrbThrsh", 0, 11 },
-	{ "SG_EGR_CNTX_BADDR", 0x58, 0 },
-		{ "EgrCntxBAddr", 5, 27 },
-	{ "SG_INT_CAUSE", 0x5c, 0 },
-		{ "HiCtlDrbDropErr", 13, 1 },
-		{ "LoCtlDrbDropErr", 12, 1 },
-		{ "HiPioDrbDropErr", 11, 1 },
-		{ "LoPioDrbDropErr", 10, 1 },
-		{ "HiCrdtUndFlowErr", 9, 1 },
-		{ "LoCrdtUndFlowErr", 8, 1 },
-		{ "HiPriorityDBFull", 7, 1 },
-		{ "HiPriorityDBEmpty", 6, 1 },
-		{ "LoPriorityDBFull", 5, 1 },
-		{ "LoPriorityDBEmpty", 4, 1 },
-		{ "RspQDisabled", 3, 1 },
-		{ "RspQCreditOverfow", 2, 1 },
-		{ "FlEmpty", 1, 1 },
-		{ "RspQStarve", 0, 1 },
-	{ "SG_INT_ENABLE", 0x60, 0 },
-		{ "HiCtlDrbDropErr", 13, 1 },
-		{ "LoCtlDrbDropErr", 12, 1 },
-		{ "HiPioDrbDropErr", 11, 1 },
-		{ "LoPioDrbDropErr", 10, 1 },
-		{ "HiCrdtUndFlowErr", 9, 1 },
-		{ "LoCrdtUndFlowErr", 8, 1 },
-		{ "HiPriorityDBFull", 7, 1 },
-		{ "HiPriorityDBEmpty", 6, 1 },
-		{ "LoPriorityDBFull", 5, 1 },
-		{ "LoPriorityDBEmpty", 4, 1 },
-		{ "RspQDisabled", 3, 1 },
-		{ "RspQCreditOverfow", 2, 1 },
-		{ "FlEmpty", 1, 1 },
-		{ "RspQStarve", 0, 1 },
-	{ "SG_CMDQ_CREDIT_TH", 0x64, 0 },
-		{ "Timeout", 8, 24 },
-		{ "Threshold", 0, 8 },
-	{ "SG_TIMER_TICK", 0x68, 0 },
-	{ "SG_CQ_CONTEXT_BADDR", 0x6c, 0 },
-		{ "baseAddr", 5, 27 },
-	{ "SG_OCO_BASE", 0x70, 0 },
-		{ "Base1", 16, 16 },
-		{ "Base0", 0, 16 },
-	{ "SG_DRB_PRI_THRESH", 0x74, 0 },
-		{ "DrbPriThrsh", 0, 16 },
-	{ "SG_DEBUG_INDEX", 0x78, 0 },
-	{ "SG_DEBUG_DATA", 0x7c, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info pcix1_regs[] = {
-	{ "PCIX_INT_ENABLE", 0x80, 0 },
-		{ "MSIXParErr", 22, 3 },
-		{ "CFParErr", 18, 4 },
-		{ "RFParErr", 14, 4 },
-		{ "WFParErr", 12, 2 },
-		{ "PIOParErr", 11, 1 },
-		{ "DetUncECCErr", 10, 1 },
-		{ "DetCorECCErr", 9, 1 },
-		{ "RcvSplCmpErr", 8, 1 },
-		{ "UnxSplCmp", 7, 1 },
-		{ "SplCmpDis", 6, 1 },
-		{ "DetParErr", 5, 1 },
-		{ "SigSysErr", 4, 1 },
-		{ "RcvMstAbt", 3, 1 },
-		{ "RcvTarAbt", 2, 1 },
-		{ "SigTarAbt", 1, 1 },
-		{ "MstDetParErr", 0, 1 },
-	{ "PCIX_INT_CAUSE", 0x84, 0 },
-		{ "MSIXParErr", 22, 3 },
-		{ "CFParErr", 18, 4 },
-		{ "RFParErr", 14, 4 },
-		{ "WFParErr", 12, 2 },
-		{ "PIOParErr", 11, 1 },
-		{ "DetUncECCErr", 10, 1 },
-		{ "DetCorECCErr", 9, 1 },
-		{ "RcvSplCmpErr", 8, 1 },
-		{ "UnxSplCmp", 7, 1 },
-		{ "SplCmpDis", 6, 1 },
-		{ "DetParErr", 5, 1 },
-		{ "SigSysErr", 4, 1 },
-		{ "RcvMstAbt", 3, 1 },
-		{ "RcvTarAbt", 2, 1 },
-		{ "SigTarAbt", 1, 1 },
-		{ "MstDetParErr", 0, 1 },
-	{ "PCIX_CFG", 0x88, 0 },
-		{ "CLIDecEn", 18, 1 },
-		{ "LatTmrDis", 17, 1 },
-		{ "LowPwrEn", 16, 1 },
-		{ "AsyncIntVec", 11, 5 },
-		{ "MaxSplTrnC", 8, 3 },
-		{ "MaxSplTrnR", 5, 3 },
-		{ "MaxWrByteCnt", 3, 2 },
-		{ "WrReqAtomicEn", 2, 1 },
-		{ "CRstWrmMode", 1, 1 },
-		{ "PIOAck64En", 0, 1 },
-	{ "PCIX_MODE", 0x8c, 0 },
-		{ "PClkRange", 6, 2 },
-		{ "PCIXInitPat", 2, 4 },
-		{ "66MHz", 1, 1 },
-		{ "64Bit", 0, 1 },
-	{ "PCIX_CAL", 0x90, 0 },
-		{ "Busy", 31, 1 },
-		{ "PerCalDiv", 22, 8 },
-		{ "PerCalEn", 21, 1 },
-		{ "SglCalEn", 20, 1 },
-		{ "ZInUpdMode", 19, 1 },
-		{ "ZInSel", 18, 1 },
-		{ "ZPDMan", 15, 3 },
-		{ "ZPUMan", 12, 3 },
-		{ "ZPDOut", 9, 3 },
-		{ "ZPUOut", 6, 3 },
-		{ "ZPDIn", 3, 3 },
-		{ "ZPUIn", 0, 3 },
-	{ "PCIX_WOL", 0x94, 0 },
-		{ "WakeUp1", 3, 1 },
-		{ "WakeUp0", 2, 1 },
-		{ "SleepMode1", 1, 1 },
-		{ "SleepMode0", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info pcie0_regs[] = {
-	{ "PCIE_INT_ENABLE", 0x80, 0 },
-		{ "BISTErr", 15, 8 },
-		{ "MSIXParErr", 12, 3 },
-		{ "CFParErr", 11, 1 },
-		{ "RFParErr", 10, 1 },
-		{ "WFParErr", 9, 1 },
-		{ "PIOParErr", 8, 1 },
-		{ "UnxSplCplErrC", 7, 1 },
-		{ "UnxSplCplErrR", 6, 1 },
-		{ "VPDAddrChng", 5, 1 },
-		{ "BusMstrEn", 4, 1 },
-		{ "PMStChng", 3, 1 },
-		{ "PEXMsg", 2, 1 },
-		{ "ZeroLenRd", 1, 1 },
-		{ "PEXErr", 0, 1 },
-	{ "PCIE_INT_CAUSE", 0x84, 0 },
-		{ "BISTErr", 15, 8 },
-		{ "MSIXParErr", 12, 3 },
-		{ "CFParErr", 11, 1 },
-		{ "RFParErr", 10, 1 },
-		{ "WFParErr", 9, 1 },
-		{ "PIOParErr", 8, 1 },
-		{ "UnxSplCplErrC", 7, 1 },
-		{ "UnxSplCplErrR", 6, 1 },
-		{ "VPDAddrChng", 5, 1 },
-		{ "BusMstrEn", 4, 1 },
-		{ "PMStChng", 3, 1 },
-		{ "PEXMsg", 2, 1 },
-		{ "ZeroLenRd", 1, 1 },
-		{ "PEXErr", 0, 1 },
-	{ "PCIE_CFG", 0x88, 0 },
-		{ "EnableLinkDwnDRst", 21, 1 },
-		{ "EnableLinkDownRst", 20, 1 },
-		{ "EnableHotRst", 19, 1 },
-		{ "IniWaitForGnt", 18, 1 },
-		{ "IniBEDis", 17, 1 },
-		{ "CLIDecEn", 16, 1 },
-		{ "AsyncIntVec", 11, 5 },
-		{ "MaxSplTrnC", 7, 4 },
-		{ "MaxSplTrnR", 1, 6 },
-		{ "CRstWrmMode", 0, 1 },
-	{ "PCIE_MODE", 0x8c, 0 },
-		{ "LnkCntlState", 2, 8 },
-		{ "VC0Up", 1, 1 },
-		{ "LnkInitial", 0, 1 },
-	{ "PCIE_CAL", 0x90, 0 },
-		{ "CalBusy", 31, 1 },
-		{ "CalFault", 30, 1 },
-		{ "ZInSel", 11, 1 },
-		{ "ZMan", 8, 3 },
-		{ "ZOut", 3, 5 },
-		{ "ZIn", 0, 3 },
-	{ "PCIE_WOL", 0x94, 0 },
-		{ "WakeUp1", 3, 1 },
-		{ "WakeUp0", 2, 1 },
-		{ "SleepMode1", 1, 1 },
-		{ "SleepMode0", 0, 1 },
-	{ "PCIE_PEX_CTRL0", 0x98, 0 },
-		{ "NumFstTrnSeq", 22, 8 },
-		{ "ReplayLmt", 2, 20 },
-		{ "TxPndChkEn", 1, 1 },
-		{ "CplPndChkEn", 0, 1 },
-	{ "PCIE_PEX_CTRL1", 0x9c, 0 },
-		{ "DLLPTimeoutLmt", 11, 20 },
-		{ "AckLat", 0, 11 },
-	{ "PCIE_PEX_CTRL2", 0xa0, 0 },
-		{ "PMExitL1Req", 29, 1 },
-		{ "PMTxIdle", 28, 1 },
-		{ "PCIModeLoop", 27, 1 },
-		{ "L1ASPMTxRxL0sTime", 15, 12 },
-		{ "L0sIdleTime", 4, 11 },
-		{ "EnterL23", 3, 1 },
-		{ "EnterL1ASPMEn", 2, 1 },
-		{ "EnterL1En", 1, 1 },
-		{ "EnterL0sEn", 0, 1 },
-	{ "PCIE_PEX_ERR", 0xa4, 0 },
-		{ "FlowCtlOFlowErr", 17, 1 },
-		{ "ReplayTimeout", 16, 1 },
-		{ "ReplayRollover", 15, 1 },
-		{ "BadDLLP", 14, 1 },
-		{ "DLLPErr", 13, 1 },
-		{ "FlowCtlProtErr", 12, 1 },
-		{ "CplTimeout", 11, 1 },
-		{ "PHYRcvErr", 10, 1 },
-		{ "DisTLP", 9, 1 },
-		{ "BadECRC", 8, 1 },
-		{ "BadTLP", 7, 1 },
-		{ "MalTLP", 6, 1 },
-		{ "UnxCpl", 5, 1 },
-		{ "UnsReq", 4, 1 },
-		{ "PsnReq", 3, 1 },
-		{ "UnsCpl", 2, 1 },
-		{ "CplAbt", 1, 1 },
-		{ "PsnCpl", 0, 1 },
-	{ "PCIE_PIPE_CTRL", 0xa8, 0 },
-		{ "RecDetUsec", 19, 3 },
-		{ "PLLLckCyc", 6, 13 },
-		{ "ElecIdleDetCyc", 3, 3 },
-		{ "UseCDRLOS", 2, 1 },
-		{ "PClkReqInP1", 1, 1 },
-		{ "PClkOffInP1", 0, 1 },
-	{ "PCIE_SERDES_CTRL", 0xac, 0 },
-		{ "ManMode", 31, 1 },
-		{ "ManLpbkEn", 29, 2 },
-		{ "ManTxRecDetEn", 28, 1 },
-		{ "ManTxBeacon", 27, 1 },
-		{ "ManTxEI", 26, 1 },
-		{ "ManRxPolarity", 25, 1 },
-		{ "ManTxRst", 24, 1 },
-		{ "ManRxRst", 23, 1 },
-		{ "ManTxEn", 22, 1 },
-		{ "ManRxEn", 21, 1 },
-		{ "ManEn", 20, 1 },
-		{ "CMURange", 17, 3 },
-		{ "BGEnb", 16, 1 },
-		{ "EnSkpDrop", 15, 1 },
-		{ "EnComma", 14, 1 },
-		{ "En8B10B", 13, 1 },
-		{ "EnElBuf", 12, 1 },
-		{ "Gain", 7, 5 },
-		{ "BandGap", 3, 4 },
-		{ "RxComAdj", 2, 1 },
-		{ "PreEmph", 0, 2 },
-	{ "PCIE_SERDES_STATUS0", 0xb0, 0 },
-		{ "RxErrLane7", 21, 3 },
-		{ "RxErrLane6", 18, 3 },
-		{ "RxErrLane5", 15, 3 },
-		{ "RxErrLane4", 12, 3 },
-		{ "RxErrLane3", 9, 3 },
-		{ "RxErrLane2", 6, 3 },
-		{ "RxErrLane1", 3, 3 },
-		{ "RxErrLane0", 0, 3 },
-	{ "PCIE_SERDES_STATUS1", 0xb4, 0 },
-		{ "CMULock", 31, 1 },
-		{ "RxKLockLane7", 23, 1 },
-		{ "RxKLockLane6", 22, 1 },
-		{ "RxKLockLane5", 21, 1 },
-		{ "RxKLockLane4", 20, 1 },
-		{ "RxKLockLane3", 19, 1 },
-		{ "RxKLockLane2", 18, 1 },
-		{ "RxKLockLane1", 17, 1 },
-		{ "RxKLockLane0", 16, 1 },
-		{ "RxUFlowLane7", 15, 1 },
-		{ "RxUFlowLane6", 14, 1 },
-		{ "RxUFlowLane5", 13, 1 },
-		{ "RxUFlowLane4", 12, 1 },
-		{ "RxUFlowLane3", 11, 1 },
-		{ "RxUFlowLane2", 10, 1 },
-		{ "RxUFlowLane1", 9, 1 },
-		{ "RxUFlowLane0", 8, 1 },
-		{ "RxOFlowLane7", 7, 1 },
-		{ "RxOFlowLane6", 6, 1 },
-		{ "RxOFlowLane5", 5, 1 },
-		{ "RxOFlowLane4", 4, 1 },
-		{ "RxOFlowLane3", 3, 1 },
-		{ "RxOFlowLane2", 2, 1 },
-		{ "RxOFlowLane1", 1, 1 },
-		{ "RxOFlowLane0", 0, 1 },
-	{ "PCIE_SERDES_STATUS2", 0xb8, 0 },
-		{ "TxRecDetLane7", 31, 1 },
-		{ "TxRecDetLane6", 30, 1 },
-		{ "TxRecDetLane5", 29, 1 },
-		{ "TxRecDetLane4", 28, 1 },
-		{ "TxRecDetLane3", 27, 1 },
-		{ "TxRecDetLane2", 26, 1 },
-		{ "TxRecDetLane1", 25, 1 },
-		{ "TxRecDetLane0", 24, 1 },
-		{ "RxEIDLane7", 23, 1 },
-		{ "RxEIDLane6", 22, 1 },
-		{ "RxEIDLane5", 21, 1 },
-		{ "RxEIDLane4", 20, 1 },
-		{ "RxEIDLane3", 19, 1 },
-		{ "RxEIDLane2", 18, 1 },
-		{ "RxEIDLane1", 17, 1 },
-		{ "RxEIDLane0", 16, 1 },
-		{ "RxRemSkipLane7", 15, 1 },
-		{ "RxRemSkipLane6", 14, 1 },
-		{ "RxRemSkipLane5", 13, 1 },
-		{ "RxRemSkipLane4", 12, 1 },
-		{ "RxRemSkipLane3", 11, 1 },
-		{ "RxRemSkipLane2", 10, 1 },
-		{ "RxRemSkipLane1", 9, 1 },
-		{ "RxRemSkipLane0", 8, 1 },
-		{ "RxAddSkipLane7", 7, 1 },
-		{ "RxAddSkipLane6", 6, 1 },
-		{ "RxAddSkipLane5", 5, 1 },
-		{ "RxAddSkipLane4", 4, 1 },
-		{ "RxAddSkipLane3", 3, 1 },
-		{ "RxAddSkipLane2", 2, 1 },
-		{ "RxAddSkipLane1", 1, 1 },
-		{ "RxAddSkipLane0", 0, 1 },
-	{ "PCIE_SERDES_BIST", 0xbc, 0 },
-		{ "BISTDone", 24, 8 },
-		{ "BISTCycleThresh", 3, 16 },
-		{ "BISTMode", 0, 3 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3dbg_regs[] = {
-	{ "T3DBG_DBG0_CFG", 0xc0, 0 },
-		{ "RegSelect", 9, 8 },
-		{ "ModuleSelect", 4, 5 },
-		{ "ClkSelect", 0, 4 },
-	{ "T3DBG_DBG0_EN", 0xc4, 0 },
-		{ "SDRByte0", 8, 1 },
-		{ "DDREn", 4, 1 },
-		{ "PortEn", 0, 1 },
-	{ "T3DBG_DBG1_CFG", 0xc8, 0 },
-		{ "RegSelect", 9, 8 },
-		{ "ModuleSelect", 4, 5 },
-		{ "ClkSelect", 0, 4 },
-	{ "T3DBG_DBG1_EN", 0xcc, 0 },
-		{ "SDRByte0", 8, 1 },
-		{ "DDREn", 4, 1 },
-		{ "PortEn", 0, 1 },
-	{ "T3DBG_GPIO_EN", 0xd0, 0 },
-		{ "GPIO11_OEn", 27, 1 },
-		{ "GPIO10_OEn", 26, 1 },
-		{ "GPIO9_OEn", 25, 1 },
-		{ "GPIO8_OEn", 24, 1 },
-		{ "GPIO7_OEn", 23, 1 },
-		{ "GPIO6_OEn", 22, 1 },
-		{ "GPIO5_OEn", 21, 1 },
-		{ "GPIO4_OEn", 20, 1 },
-		{ "GPIO3_OEn", 19, 1 },
-		{ "GPIO2_OEn", 18, 1 },
-		{ "GPIO1_OEn", 17, 1 },
-		{ "GPIO0_OEn", 16, 1 },
-		{ "GPIO11_Out_Val", 11, 1 },
-		{ "GPIO10_Out_Val", 10, 1 },
-		{ "GPIO9_Out_Val", 9, 1 },
-		{ "GPIO8_Out_Val", 8, 1 },
-		{ "GPIO7_Out_Val", 7, 1 },
-		{ "GPIO6_Out_Val", 6, 1 },
-		{ "GPIO5_Out_Val", 5, 1 },
-		{ "GPIO4_Out_Val", 4, 1 },
-		{ "GPIO3_Out_Val", 3, 1 },
-		{ "GPIO2_Out_Val", 2, 1 },
-		{ "GPIO1_Out_Val", 1, 1 },
-		{ "GPIO0_Out_Val", 0, 1 },
-	{ "T3DBG_GPIO_IN", 0xd4, 0 },
-		{ "GPIO11_IN", 11, 1 },
-		{ "GPIO10_IN", 10, 1 },
-		{ "GPIO9_IN", 9, 1 },
-		{ "GPIO8_IN", 8, 1 },
-		{ "GPIO7_IN", 7, 1 },
-		{ "GPIO6_IN", 6, 1 },
-		{ "GPIO5_IN", 5, 1 },
-		{ "GPIO4_IN", 4, 1 },
-		{ "GPIO3_IN", 3, 1 },
-		{ "GPIO2_IN", 2, 1 },
-		{ "GPIO1_IN", 1, 1 },
-		{ "GPIO0_IN", 0, 1 },
-	{ "T3DBG_INT_ENABLE", 0xd8, 0 },
-		{ "C_LOCK", 21, 1 },
-		{ "M_LOCK", 20, 1 },
-		{ "U_LOCK", 19, 1 },
-		{ "R_LOCK", 18, 1 },
-		{ "PX_LOCK", 17, 1 },
-		{ "PE_LOCK", 16, 1 },
-		{ "GPIO11", 11, 1 },
-		{ "GPIO10", 10, 1 },
-		{ "GPIO9", 9, 1 },
-		{ "GPIO8", 8, 1 },
-		{ "GPIO7", 7, 1 },
-		{ "GPIO6", 6, 1 },
-		{ "GPIO5", 5, 1 },
-		{ "GPIO4", 4, 1 },
-		{ "GPIO3", 3, 1 },
-		{ "GPIO2", 2, 1 },
-		{ "GPIO1", 1, 1 },
-		{ "GPIO0", 0, 1 },
-	{ "T3DBG_INT_CAUSE", 0xdc, 0 },
-		{ "C_LOCK", 21, 1 },
-		{ "M_LOCK", 20, 1 },
-		{ "U_LOCK", 19, 1 },
-		{ "R_LOCK", 18, 1 },
-		{ "PX_LOCK", 17, 1 },
-		{ "PE_LOCK", 16, 1 },
-		{ "GPIO11", 11, 1 },
-		{ "GPIO10", 10, 1 },
-		{ "GPIO9", 9, 1 },
-		{ "GPIO8", 8, 1 },
-		{ "GPIO7", 7, 1 },
-		{ "GPIO6", 6, 1 },
-		{ "GPIO5", 5, 1 },
-		{ "GPIO4", 4, 1 },
-		{ "GPIO3", 3, 1 },
-		{ "GPIO2", 2, 1 },
-		{ "GPIO1", 1, 1 },
-		{ "GPIO0", 0, 1 },
-	{ "T3DBG_DBG0_RST_VALUE", 0xe0, 0 },
-		{ "DebugData", 0, 1 },
-	{ "T3DBG_PLL_OCLK_PAD_EN", 0xe4, 0 },
-		{ "PCIE_OCLK_En", 20, 1 },
-		{ "PCIX_OCLK_En", 16, 1 },
-		{ "U_OCLK_En", 12, 1 },
-		{ "R_OCLK_En", 8, 1 },
-		{ "M_OCLK_En", 4, 1 },
-		{ "C_OCLK_En", 0, 1 },
-	{ "T3DBG_PLL_LOCK", 0xe8, 0 },
-		{ "PCIE_LOCK", 20, 1 },
-		{ "PCIX_LOCK", 16, 1 },
-		{ "U_LOCK", 12, 1 },
-		{ "R_LOCK", 8, 1 },
-		{ "M_LOCK", 4, 1 },
-		{ "C_LOCK", 0, 1 },
-	{ "T3DBG_SERDES_RBC_CFG", 0xec, 0 },
-		{ "X_RBC_Lane_Sel", 16, 1 },
-		{ "X_RBC_Dbg_En", 12, 1 },
-		{ "X_Serdes_Sel", 8, 1 },
-		{ "PE_RBC_Lane_Sel", 4, 1 },
-		{ "PE_RBC_Dbg_En", 0, 1 },
-	{ "T3DBG_GPIO_ACT_LOW", 0xf0, 0 },
-		{ "C_LOCK_ACT_LOW", 21, 1 },
-		{ "M_LOCK_ACT_LOW", 20, 1 },
-		{ "U_LOCK_ACT_LOW", 19, 1 },
-		{ "R_LOCK_ACT_LOW", 18, 1 },
-		{ "PX_LOCK_ACT_LOW", 17, 1 },
-		{ "PE_LOCK_ACT_LOW", 16, 1 },
-		{ "GPIO11_ACT_LOW", 11, 1 },
-		{ "GPIO10_ACT_LOW", 10, 1 },
-		{ "GPIO9_ACT_LOW", 9, 1 },
-		{ "GPIO8_ACT_LOW", 8, 1 },
-		{ "GPIO7_ACT_LOW", 7, 1 },
-		{ "GPIO6_ACT_LOW", 6, 1 },
-		{ "GPIO5_ACT_LOW", 5, 1 },
-		{ "GPIO4_ACT_LOW", 4, 1 },
-		{ "GPIO3_ACT_LOW", 3, 1 },
-		{ "GPIO2_ACT_LOW", 2, 1 },
-		{ "GPIO1_ACT_LOW", 1, 1 },
-		{ "GPIO0_ACT_LOW", 0, 1 },
-	{ "T3DBG_PMON_CFG", 0xf4, 0 },
-		{ "PMON_DONE", 29, 1 },
-		{ "PMON_FAIL", 28, 1 },
-		{ "PMON_FDEL_AUTO", 22, 1 },
-		{ "PMON_CDEL_AUTO", 16, 1 },
-		{ "PMON_FDEL_MANUAL", 10, 1 },
-		{ "PMON_CDEL_MANUAL", 4, 1 },
-		{ "PMON_MANUAL", 1, 1 },
-		{ "PMON_AUTO", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mc7_pmrx_regs[] = {
-	{ "MC7_CFG", 0x100, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x104, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x108, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x10c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x110, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x114, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x118, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x11c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x120, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x124, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x128, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ECC", 0x130, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x134, 0 },
-	{ "MC7_CE_DATA0", 0x138, 0 },
-	{ "MC7_CE_DATA1", 0x13c, 0 },
-	{ "MC7_CE_DATA2", 0x140, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x144, 0 },
-	{ "MC7_UE_DATA0", 0x148, 0 },
-	{ "MC7_UE_DATA1", 0x14c, 0 },
-	{ "MC7_UE_DATA2", 0x150, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x154, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x158, 0 },
-	{ "MC7_BD_DATA1", 0x15c, 0 },
-	{ "MC7_BD_DATA2", 0x160, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x164, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x168, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x16c, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x170, 0 },
-	{ "MC7_BIST_OP", 0x174, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x178, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x17c, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mc7_pmtx_regs[] = {
-	{ "MC7_CFG", 0x180, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x184, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x188, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x18c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x190, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x194, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x198, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x19c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x1a0, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x1a4, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x1a8, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ECC", 0x1b0, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x1b4, 0 },
-	{ "MC7_CE_DATA0", 0x1b8, 0 },
-	{ "MC7_CE_DATA1", 0x1bc, 0 },
-	{ "MC7_CE_DATA2", 0x1c0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x1c4, 0 },
-	{ "MC7_UE_DATA0", 0x1c8, 0 },
-	{ "MC7_UE_DATA1", 0x1cc, 0 },
-	{ "MC7_UE_DATA2", 0x1d0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x1d4, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x1d8, 0 },
-	{ "MC7_BD_DATA1", 0x1dc, 0 },
-	{ "MC7_BD_DATA2", 0x1e0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x1e4, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x1e8, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x1ec, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x1f0, 0 },
-	{ "MC7_BIST_OP", 0x1f4, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x1f8, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x1fc, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mc7_cm_regs[] = {
-	{ "MC7_CFG", 0x200, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x204, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x208, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x20c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x210, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x214, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x218, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x21c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x220, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x224, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x228, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ECC", 0x230, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x234, 0 },
-	{ "MC7_CE_DATA0", 0x238, 0 },
-	{ "MC7_CE_DATA1", 0x23c, 0 },
-	{ "MC7_CE_DATA2", 0x240, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x244, 0 },
-	{ "MC7_UE_DATA0", 0x248, 0 },
-	{ "MC7_UE_DATA1", 0x24c, 0 },
-	{ "MC7_UE_DATA2", 0x250, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x254, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x258, 0 },
-	{ "MC7_BD_DATA1", 0x25c, 0 },
-	{ "MC7_BD_DATA2", 0x260, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x264, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x268, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x26c, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x270, 0 },
-	{ "MC7_BIST_OP", 0x274, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x278, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x27c, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info cim_regs[] = {
-	{ "CIM_BOOT_CFG", 0x280, 0 },
-		{ "BootAddr", 2, 30 },
-		{ "BootSdram", 1, 1 },
-		{ "uPCRst", 0, 1 },
-	{ "CIM_FLASH_BASE_ADDR", 0x284, 0 },
-		{ "FlashBaseAddr", 2, 22 },
-	{ "CIM_FLASH_ADDR_SIZE", 0x288, 0 },
-		{ "FlashAddrSize", 2, 22 },
-	{ "CIM_SDRAM_BASE_ADDR", 0x28c, 0 },
-		{ "SdramBaseAddr", 2, 30 },
-	{ "CIM_SDRAM_ADDR_SIZE", 0x290, 0 },
-		{ "SdramAddrSize", 2, 30 },
-	{ "CIM_UP_SPARE_INT", 0x294, 0 },
-		{ "uPSpareInt", 0, 3 },
-	{ "CIM_HOST_INT_ENABLE", 0x298, 0 },
-		{ "Timer1IntEn", 15, 1 },
-		{ "Timer0IntEn", 14, 1 },
-		{ "PrefDropIntEn", 13, 1 },
-		{ "BlkWrPlIntEn", 12, 1 },
-		{ "BlkRdPlIntEn", 11, 1 },
-		{ "BlkWrCtlIntEn", 10, 1 },
-		{ "BlkRdCtlIntEn", 9, 1 },
-		{ "BlkWrFlashIntEn", 8, 1 },
-		{ "BlkRdFlashIntEn", 7, 1 },
-		{ "SglWrFlashIntEn", 6, 1 },
-		{ "WrBlkFlashIntEn", 5, 1 },
-		{ "BlkWrBootIntEn", 4, 1 },
-		{ "BlkRdBootIntEn", 3, 1 },
-		{ "FlashRangeIntEn", 2, 1 },
-		{ "SdramRangeIntEn", 1, 1 },
-		{ "RsvdSpaceIntEn", 0, 1 },
-	{ "CIM_HOST_INT_CAUSE", 0x29c, 0 },
-		{ "Timer1Int", 15, 1 },
-		{ "Timer0Int", 14, 1 },
-		{ "PrefDropInt", 13, 1 },
-		{ "BlkWrPlInt", 12, 1 },
-		{ "BlkRdPlInt", 11, 1 },
-		{ "BlkWrCtlInt", 10, 1 },
-		{ "BlkRdCtlInt", 9, 1 },
-		{ "BlkWrFlashInt", 8, 1 },
-		{ "BlkRdFlashInt", 7, 1 },
-		{ "SglWrFlashInt", 6, 1 },
-		{ "WrBlkFlashInt", 5, 1 },
-		{ "BlkWrBootInt", 4, 1 },
-		{ "BlkRdBootInt", 3, 1 },
-		{ "FlashRangeInt", 2, 1 },
-		{ "SdramRangeInt", 1, 1 },
-		{ "RsvdSpaceInt", 0, 1 },
-	{ "CIM_UP_INT_ENABLE", 0x2a0, 0 },
-		{ "MstPlIntEn", 16, 1 },
-		{ "Timer1IntEn", 15, 1 },
-		{ "Timer0IntEn", 14, 1 },
-		{ "PrefDropIntEn", 13, 1 },
-		{ "BlkWrPlIntEn", 12, 1 },
-		{ "BlkRdPlIntEn", 11, 1 },
-		{ "BlkWrCtlIntEn", 10, 1 },
-		{ "BlkRdCtlIntEn", 9, 1 },
-		{ "BlkWrFlashIntEn", 8, 1 },
-		{ "BlkRdFlashIntEn", 7, 1 },
-		{ "SglWrFlashIntEn", 6, 1 },
-		{ "WrBlkFlashIntEn", 5, 1 },
-		{ "BlkWrBootIntEn", 4, 1 },
-		{ "BlkRdBootIntEn", 3, 1 },
-		{ "FlashRangeIntEn", 2, 1 },
-		{ "SdramRangeIntEn", 1, 1 },
-		{ "RsvdSpaceIntEn", 0, 1 },
-	{ "CIM_UP_INT_CAUSE", 0x2a4, 0 },
-		{ "MstPlInt", 16, 1 },
-		{ "Timer1Int", 15, 1 },
-		{ "Timer0Int", 14, 1 },
-		{ "PrefDropInt", 13, 1 },
-		{ "BlkWrPlInt", 12, 1 },
-		{ "BlkRdPlInt", 11, 1 },
-		{ "BlkWrCtlInt", 10, 1 },
-		{ "BlkRdCtlInt", 9, 1 },
-		{ "BlkWrFlashInt", 8, 1 },
-		{ "BlkRdFlashInt", 7, 1 },
-		{ "SglWrFlashInt", 6, 1 },
-		{ "WrBlkFlashInt", 5, 1 },
-		{ "BlkWrBootInt", 4, 1 },
-		{ "BlkRdBootInt", 3, 1 },
-		{ "FlashRangeInt", 2, 1 },
-		{ "SdramRangeInt", 1, 1 },
-		{ "RsvdSpaceInt", 0, 1 },
-	{ "CIM_IBQ_FULLA_THRSH", 0x2a8, 0 },
-		{ "Ibq0FullThrsh", 0, 9 },
-		{ "Ibq1FullThrsh", 16, 9 },
-	{ "CIM_IBQ_FULLB_THRSH", 0x2ac, 0 },
-		{ "Ibq2FullThrsh", 0, 9 },
-		{ "Ibq3FullThrsh", 16, 9 },
-	{ "CIM_HOST_ACC_CTRL", 0x2b0, 0 },
-		{ "HostBusy", 17, 1 },
-		{ "HostWrite", 16, 1 },
-		{ "HostAddr", 0, 16 },
-	{ "CIM_HOST_ACC_DATA", 0x2b4, 0 },
-	{ "CIM_IBQ_DBG_CFG", 0x2c0, 0 },
-		{ "IbqDbgAddr", 16, 9 },
-		{ "IbqDbgQID", 3, 2 },
-		{ "IbqDbgWr", 2, 1 },
-		{ "IbqDbgBusy", 1, 1 },
-		{ "IbqDbgEn", 0, 1 },
-	{ "CIM_OBQ_DBG_CFG", 0x2c4, 0 },
-		{ "ObqDbgAddr", 16, 9 },
-		{ "ObqDbgQID", 3, 2 },
-		{ "ObqDbgWr", 2, 1 },
-		{ "ObqDbgBusy", 1, 1 },
-		{ "ObqDbgEn", 0, 1 },
-	{ "CIM_IBQ_DBG_DATA", 0x2c8, 0 },
-	{ "CIM_OBQ_DBG_DATA", 0x2cc, 0 },
-	{ "CIM_CDEBUGDATA", 0x2d0, 0 },
-		{ "CDebugDataH", 16, 16 },
-		{ "CDebugDataL", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info tp1_regs[] = {
-	{ "TP_IN_CONFIG", 0x300, 0 },
-		{ "RXFbArbPrio", 25, 1 },
-		{ "TXFbArbPrio", 24, 1 },
-		{ "DBMaxOpCnt", 16, 8 },
-		{ "NICMode", 14, 1 },
-		{ "EChecksumCheckTCP", 13, 1 },
-		{ "EChecksumCheckIP", 12, 1 },
-		{ "ECPL", 10, 1 },
-		{ "EEthernet", 8, 1 },
-		{ "ETunnel", 7, 1 },
-		{ "CChecksumCheckTCP", 6, 1 },
-		{ "CChecksumCheckIP", 5, 1 },
-		{ "CCPL", 3, 1 },
-		{ "CEthernet", 1, 1 },
-		{ "CTunnel", 0, 1 },
-	{ "TP_OUT_CONFIG", 0x304, 0 },
-		{ "VLANExtractionEnable", 12, 1 },
-		{ "EChecksumGenerateTCP", 11, 1 },
-		{ "EChecksumGenerateIP", 10, 1 },
-		{ "ECPL", 8, 1 },
-		{ "EEthernet", 6, 1 },
-		{ "CChecksumGenerateTCP", 5, 1 },
-		{ "CChecksumGenerateIP", 4, 1 },
-		{ "CCPL", 2, 1 },
-		{ "CEthernet", 0, 1 },
-	{ "TP_GLOBAL_CONFIG", 0x308, 0 },
-		{ "RXFlowControlDisable", 25, 1 },
-		{ "TXPacingEnable", 24, 1 },
-		{ "AttackFilterEnable", 23, 1 },
-		{ "SYNCookieNoOptions", 22, 1 },
-		{ "ProtectedMode", 21, 1 },
-		{ "PingDrop", 20, 1 },
-		{ "FragmentDrop", 19, 1 },
-		{ "FiveTupleLookup", 17, 2 },
-		{ "PathMTU", 15, 1 },
-		{ "IPIdentSplit", 14, 1 },
-		{ "IPChecksumOffload", 13, 1 },
-		{ "UDPChecksumOffload", 12, 1 },
-		{ "TCPChecksumOffload", 11, 1 },
-		{ "QOSMapping", 10, 1 },
-		{ "TCAMServerUse", 8, 2 },
-		{ "IPTTL", 0, 8 },
-	{ "TP_GLOBAL_RX_CREDIT", 0x30c, 0 },
-	{ "TP_CMM_SIZE", 0x310, 0 },
-		{ "CMMemMgrSize", 0, 28 },
-	{ "TP_CMM_MM_BASE", 0x314, 0 },
-		{ "CMMemMgrBase", 0, 28 },
-	{ "TP_CMM_TIMER_BASE", 0x318, 0 },
-		{ "CMTimerBase", 0, 28 },
-	{ "TP_PMM_SIZE", 0x31c, 0 },
-		{ "PMSize", 0, 28 },
-	{ "TP_PMM_TX_BASE", 0x320, 0 },
-	{ "TP_PMM_DEFRAG_BASE", 0x324, 0 },
-	{ "TP_PMM_RX_BASE", 0x328, 0 },
-	{ "TP_PMM_RX_PAGE_SIZE", 0x32c, 0 },
-	{ "TP_PMM_RX_MAX_PAGE", 0x330, 0 },
-		{ "PMRxMaxPage", 0, 21 },
-	{ "TP_PMM_TX_PAGE_SIZE", 0x334, 0 },
-	{ "TP_PMM_TX_MAX_PAGE", 0x338, 0 },
-		{ "PMTxMaxPage", 0, 21 },
-	{ "TP_TCP_OPTIONS", 0x340, 0 },
-		{ "MTUDefault", 16, 16 },
-		{ "MTUEnable", 10, 1 },
-		{ "SACKTx", 9, 1 },
-		{ "SACKRx", 8, 1 },
-		{ "SACKMode", 4, 2 },
-		{ "WindowScaleMode", 2, 2 },
-		{ "TimestampsMode", 0, 2 },
-	{ "TP_DACK_CONFIG", 0x344, 0 },
-		{ "AutoState3", 30, 2 },
-		{ "AutoState2", 28, 2 },
-		{ "AutoState1", 26, 2 },
-		{ "ByteThreshold", 5, 20 },
-		{ "MSSThreshold", 3, 2 },
-		{ "AutoCareful", 2, 1 },
-		{ "AutoEnable", 1, 1 },
-		{ "Mode", 0, 1 },
-	{ "TP_PC_CONFIG", 0x348, 0 },
-		{ "TxTosQueueMapMode", 26, 1 },
-		{ "RddpCongEn", 25, 1 },
-		{ "EnableOnFlyPDU", 24, 1 },
-		{ "EnableEPCMDAFull", 23, 1 },
-		{ "ModulateUnionMode", 22, 1 },
-		{ "TxDataAckRateEnable", 21, 1 },
-		{ "TxDeferEnable", 20, 1 },
-		{ "RxCongestionMode", 19, 1 },
-		{ "HearbeatOnceDACK", 18, 1 },
-		{ "HearbeatOnceHeap", 17, 1 },
-		{ "HearbeatDACK", 16, 1 },
-		{ "TxCongestionMode", 15, 1 },
-		{ "AcceptLatestRcvAdv", 14, 1 },
-		{ "DisableSYNData", 13, 1 },
-		{ "DisableWindowPSH", 12, 1 },
-		{ "DisableFINOldData", 11, 1 },
-		{ "EnableFLMError", 10, 1 },
-		{ "DisableFINOldDataFix", 9, 1 },
-		{ "FilterPeerFIN", 8, 1 },
-		{ "EnableFeedbackSend", 7, 1 },
-		{ "EnableRDMAError", 6, 1 },
-		{ "EnableDDPFlowControl", 5, 1 },
-		{ "DisableHeldData", 4, 1 },
-		{ "TableLatencyDelta", 0, 4 },
-	{ "TP_TCP_BACKOFF_REG0", 0x350, 0 },
-		{ "TimerBackoffIndex3", 24, 8 },
-		{ "TimerBackoffIndex2", 16, 8 },
-		{ "TimerBackoffIndex1", 8, 8 },
-		{ "TimerBackoffIndex0", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG1", 0x354, 0 },
-		{ "TimerBackoffIndex7", 24, 8 },
-		{ "TimerBackoffIndex6", 16, 8 },
-		{ "TimerBackoffIndex5", 8, 8 },
-		{ "TimerBackoffIndex4", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG2", 0x358, 0 },
-		{ "TimerBackoffIndex11", 24, 8 },
-		{ "TimerBackoffIndex10", 16, 8 },
-		{ "TimerBackoffIndex9", 8, 8 },
-		{ "TimerBackoffIndex8", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG3", 0x35c, 0 },
-		{ "TimerBackoffIndex15", 24, 8 },
-		{ "TimerBackoffIndex14", 16, 8 },
-		{ "TimerBackoffIndex13", 8, 8 },
-		{ "TimerBackoffIndex12", 0, 8 },
-	{ "TP_PARA_REG0", 0x360, 0 },
-		{ "InitCwnd", 24, 3 },
-		{ "DupAckThresh", 20, 4 },
-	{ "TP_PARA_REG1", 0x364, 0 },
-		{ "InitRwnd", 16, 16 },
-		{ "InitialSSThresh", 0, 16 },
-	{ "TP_PARA_REG2", 0x368, 0 },
-		{ "MaxRxData", 16, 16 },
-		{ "RxCoalesceSize", 0, 16 },
-	{ "TP_PARA_REG3", 0x36c, 0 },
-		{ "TunnelCngDrop1", 21, 1 },
-		{ "TunnelCngDrop0", 20, 1 },
-		{ "TxDataAckIdx", 16, 4 },
-		{ "RxFragEnable", 12, 3 },
-		{ "TxPaceFixedStrict", 11, 1 },
-		{ "TxPaceAutoStrict", 10, 1 },
-		{ "TxPaceFixed", 9, 1 },
-		{ "TxPaceAuto", 8, 1 },
-		{ "RxUrgMode", 5, 1 },
-		{ "TxUrgMode", 4, 1 },
-		{ "CngCtrlMode", 2, 2 },
-		{ "RxCoalesceEnable", 1, 1 },
-		{ "RxCoalescePshEn", 0, 1 },
-	{ "TP_PARA_REG4", 0x370, 0 },
-		{ "HighSpeedCfg", 24, 8 },
-		{ "NewRenoCfg", 16, 8 },
-		{ "TahoeCfg", 8, 8 },
-		{ "RenoCfg", 0, 8 },
-	{ "TP_PARA_REG5", 0x374, 0 },
-		{ "IndicateSize", 16, 16 },
-		{ "SchdEnable", 8, 1 },
-		{ "OnFlyDDPEnable", 2, 1 },
-		{ "DackTimerSpin", 1, 1 },
-		{ "PushTimerEnable", 0, 1 },
-	{ "TP_PARA_REG6", 0x378, 0 },
-		{ "TxPDUSizeAdj", 16, 8 },
-		{ "EnableEPDU", 14, 1 },
-		{ "EnableESnd", 13, 1 },
-		{ "EnableCSnd", 12, 1 },
-		{ "EnableDeferACK", 9, 1 },
-		{ "EnablePDUC", 8, 1 },
-		{ "EnablePDUI", 7, 1 },
-		{ "EnablePDUE", 6, 1 },
-		{ "EnableDefer", 5, 1 },
-		{ "EnableClearRxmtOos", 4, 1 },
-		{ "DisablePDUCng", 3, 1 },
-		{ "DisablePDUTimeout", 2, 1 },
-		{ "DisablePDURxmt", 1, 1 },
-		{ "DisablePDUxmt", 0, 1 },
-	{ "TP_PARA_REG7", 0x37c, 0 },
-		{ "PMMaxXferLen1", 16, 16 },
-		{ "PMMaxXferLen0", 0, 16 },
-	{ "TP_TIMER_RESOLUTION", 0x390, 0 },
-		{ "TimerResolution", 16, 8 },
-		{ "TimestampResolution", 8, 8 },
-		{ "DelayedACKResolution", 0, 8 },
-	{ "TP_MSL", 0x394, 0 },
-		{ "MSL", 0, 30 },
-	{ "TP_RXT_MIN", 0x398, 0 },
-		{ "RxtMin", 0, 30 },
-	{ "TP_RXT_MAX", 0x39c, 0 },
-		{ "RxtMax", 0, 30 },
-	{ "TP_PERS_MIN", 0x3a0, 0 },
-		{ "PersMin", 0, 30 },
-	{ "TP_PERS_MAX", 0x3a4, 0 },
-		{ "PersMax", 0, 30 },
-	{ "TP_KEEP_IDLE", 0x3a8, 0 },
-		{ "KeepaliveIdle", 0, 30 },
-	{ "TP_KEEP_INTVL", 0x3ac, 0 },
-		{ "KeepaliveIntvl", 0, 30 },
-	{ "TP_INIT_SRTT", 0x3b0, 0 },
-		{ "InitSrtt", 0, 16 },
-	{ "TP_DACK_TIMER", 0x3b4, 0 },
-		{ "DackTime", 0, 12 },
-	{ "TP_FINWAIT2_TIMER", 0x3b8, 0 },
-		{ "Finwait2Time", 0, 30 },
-	{ "TP_FAST_FINWAIT2_TIMER", 0x3bc, 0 },
-		{ "FastFinwait2Time", 0, 30 },
-	{ "TP_SHIFT_CNT", 0x3c0, 0 },
-		{ "SynShiftMax", 24, 8 },
-		{ "RxtShiftMaxR1", 20, 4 },
-		{ "RxtShiftMaxR2", 16, 4 },
-		{ "PerShiftBackoffMax", 12, 4 },
-		{ "PerShiftMax", 8, 4 },
-		{ "KeepaliveMax", 0, 8 },
-	{ "TP_TIME_HI", 0x3c8, 0 },
-	{ "TP_TIME_LO", 0x3cc, 0 },
-	{ "TP_ULP_TABLE", 0x3d4, 0 },
-		{ "ULPType7Field", 28, 4 },
-		{ "ULPType6Field", 24, 4 },
-		{ "ULPType5Field", 20, 4 },
-		{ "ULPType4Field", 16, 4 },
-		{ "ULPType3Field", 12, 4 },
-		{ "ULPType2Field", 8, 4 },
-		{ "ULPType1Field", 4, 4 },
-		{ "ULPType0Field", 0, 4 },
-	{ "TP_PACE_TABLE", 0x3d8, 0 },
-	{ "TP_CCTRL_TABLE", 0x3dc, 0 },
-	{ "TP_TOS_TABLE", 0x3e0, 0 },
-	{ "TP_MTU_TABLE", 0x3e4, 0 },
-	{ "TP_RSS_MAP_TABLE", 0x3e8, 0 },
-	{ "TP_RSS_LKP_TABLE", 0x3ec, 0 },
-	{ "TP_RSS_CONFIG", 0x3f0, 0 },
-		{ "TNL4tupEn", 29, 1 },
-		{ "TNL2tupEn", 28, 1 },
-		{ "TNLprtEn", 26, 1 },
-		{ "TNLMapEn", 25, 1 },
-		{ "TNLLkpEn", 24, 1 },
-		{ "OFD4tupEn", 21, 1 },
-		{ "OFD2tupEn", 20, 1 },
-		{ "OFDMapEn", 17, 1 },
-		{ "OFDLkpEn", 16, 1 },
-		{ "SYN4tupEn", 13, 1 },
-		{ "SYN2tupEn", 12, 1 },
-		{ "SYNMapEn", 9, 1 },
-		{ "SYNLkpEn", 8, 1 },
-		{ "RRCPLMapEn", 7, 1 },
-		{ "RRCPLCPUSIZE", 4, 3 },
-		{ "RQFeedbackEnable", 3, 1 },
-		{ "HashToeplitz", 2, 1 },
-		{ "HashSave", 1, 1 },
-		{ "Disable", 0, 1 },
-	{ "TP_RSS_CONFIG_TNL", 0x3f4, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_CONFIG_OFD", 0x3f8, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_CONFIG_SYN", 0x3fc, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_SECRET_KEY0", 0x400, 0 },
-	{ "TP_RSS_SECRET_KEY1", 0x404, 0 },
-	{ "TP_RSS_SECRET_KEY2", 0x408, 0 },
-	{ "TP_RSS_SECRET_KEY3", 0x40c, 0 },
-	{ "TP_TM_PIO_ADDR", 0x418, 0 },
-	{ "TP_TM_PIO_DATA", 0x41c, 0 },
-	{ "TP_TX_MOD_QUE_TABLE", 0x420, 0 },
-	{ "TP_TX_RESOURCE_LIMIT", 0x424, 0 },
-		{ "TX_RESOURCE_LIMIT_CH1_PC", 24, 8 },
-		{ "TX_RESOURCE_LIMIT_CH1_NON_PC", 16, 8 },
-		{ "TX_RESOURCE_LIMIT_CH0_PC", 8, 8 },
-		{ "TX_RESOURCE_LIMIT_CH0_NON_PC", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_REQ_MAP", 0x428, 0 },
-		{ "RX_MOD_WEIGHT", 24, 8 },
-		{ "TX_MOD_WEIGHT", 16, 8 },
-		{ "TX_MOD_TIMER_MODE", 8, 8 },
-		{ "TX_MOD_QUEUE_REQ_MAP", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_WEIGHT1", 0x42c, 0 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT7", 24, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT6", 16, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT5", 8, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_WEIGHT0", 0x430, 0 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT3", 24, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT2", 16, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT1", 8, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 },
-	{ "TP_MOD_CHANNEL_WEIGHT", 0x434, 0 },
-		{ "RX_MOD_CHANNEL_WEIGHT1", 24, 8 },
-		{ "RX_MOD_CHANNEL_WEIGHT0", 16, 8 },
-		{ "TX_MOD_CHANNEL_WEIGHT1", 8, 8 },
-		{ "TX_MOD_CHANNEL_WEIGHT0", 0, 8 },
-	{ "TP_MOD_RATE_LIMIT", 0x438, 0 },
-		{ "RX_MOD_RATE_LIMIT_INC", 24, 8 },
-		{ "RX_MOD_RATE_LIMIT_TICK", 16, 8 },
-		{ "TX_MOD_RATE_LIMIT_INC", 8, 8 },
-		{ "TX_MOD_RATE_LIMIT_TICK", 0, 8 },
-	{ "TP_PIO_ADDR", 0x440, 0 },
-	{ "TP_PIO_DATA", 0x444, 0 },
-	{ "TP_RESET", 0x44c, 0 },
-		{ "FlstInitEnable", 1, 1 },
-		{ "TPReset", 0, 1 },
-	{ "TP_MIB_INDEX", 0x450, 0 },
-	{ "TP_MIB_RDATA", 0x454, 0 },
-	{ "TP_SYNC_TIME_HI", 0x458, 0 },
-	{ "TP_SYNC_TIME_LO", 0x45c, 0 },
-	{ "TP_CMM_MM_RX_FLST_BASE", 0x460, 0 },
-		{ "CMRxFlstBase", 0, 28 },
-	{ "TP_CMM_MM_TX_FLST_BASE", 0x464, 0 },
-		{ "CMTxFlstBase", 0, 28 },
-	{ "TP_CMM_MM_PS_FLST_BASE", 0x468, 0 },
-		{ "CMPsFlstBase", 0, 28 },
-	{ "TP_CMM_MM_MAX_PSTRUCT", 0x46c, 0 },
-		{ "CMMaxPstruct", 0, 21 },
-	{ "TP_INT_ENABLE", 0x470, 0 },
-	{ "TP_INT_CAUSE", 0x474, 0 },
-	{ "TP_FLM_FREE_PS_CNT", 0x480, 0 },
-		{ "FreePstructCount", 0, 21 },
-	{ "TP_FLM_FREE_RX_CNT", 0x484, 0 },
-		{ "FreeRxPageCount", 0, 21 },
-	{ "TP_FLM_FREE_TX_CNT", 0x488, 0 },
-		{ "FreeTxPageCount", 0, 21 },
-	{ "TP_TM_HEAP_PUSH_CNT", 0x48c, 0 },
-	{ "TP_TM_HEAP_POP_CNT", 0x490, 0 },
-	{ "TP_TM_DACK_PUSH_CNT", 0x494, 0 },
-	{ "TP_TM_DACK_POP_CNT", 0x498, 0 },
-	{ "TP_TM_MOD_PUSH_CNT", 0x49c, 0 },
-	{ "TP_MOD_POP_CNT", 0x4a0, 0 },
-	{ "TP_TIMER_SEPARATOR", 0x4a4, 0 },
-	{ "TP_DEBUG_SEL", 0x4a8, 0 },
-	{ "TP_DEBUG_FLAGS", 0x4ac, 0 },
-		{ "RXDebugFlags", 16, 16 },
-		{ "TXDebugFlags", 0, 16 },
-	{ "TP_CM_FLOW_CNTL_MODE", 0x4b0, 0 },
-		{ "CMFlowCacheDisable", 0, 1 },
-	{ "TP_PC_CONGESTION_CNTL", 0x4b4, 0 },
-		{ "EDropTunnel", 19, 1 },
-		{ "CDropTunnel", 18, 1 },
-		{ "EThreshold", 12, 6 },
-		{ "CThreshold", 6, 6 },
-		{ "TxThreshold", 0, 6 },
-	{ "TP_TX_DROP_COUNT", 0x4bc, 0 },
-	{ "TP_CLEAR_DEBUG", 0x4c0, 0 },
-		{ "ClrDebug", 0, 1 },
-	{ "TP_DEBUG_VEC", 0x4c4, 0 },
-	{ "TP_DEBUG_VEC2", 0x4c8, 0 },
-	{ "TP_DEBUG_REG_SEL", 0x4cc, 0 },
-	{ "TP_DEBUG", 0x4d0, 0 },
-	{ "TP_DBG_LA_CONFIG", 0x4d4, 0 },
-	{ "TP_DBG_LA_DATAH", 0x4d8, 0 },
-	{ "TP_DBG_LA_DATAL", 0x4dc, 0 },
-	{ "TP_EMBED_OP_FIELD0", 0x4e8, 0 },
-	{ "TP_EMBED_OP_FIELD1", 0x4ec, 0 },
-	{ "TP_EMBED_OP_FIELD2", 0x4f0, 0 },
-	{ "TP_EMBED_OP_FIELD3", 0x4f4, 0 },
-	{ "TP_EMBED_OP_FIELD4", 0x4f8, 0 },
-	{ "TP_EMBED_OP_FIELD5", 0x4fc, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info ulp2_rx_regs[] = {
-	{ "ULPRX_CTL", 0x500, 0 },
-		{ "PCMD1Threshold", 24, 8 },
-		{ "PCMD0Threshold", 16, 8 },
-		{ "round_robin", 4, 1 },
-		{ "RDMA_permissive_mode", 3, 1 },
-		{ "PagePodME", 2, 1 },
-		{ "IscsiTagTcb", 1, 1 },
-		{ "TddpTagTcb", 0, 1 },
-	{ "ULPRX_INT_ENABLE", 0x504, 0 },
-		{ "ParErr", 0, 1 },
-	{ "ULPRX_INT_CAUSE", 0x508, 0 },
-		{ "ParErr", 0, 1 },
-	{ "ULPRX_ISCSI_LLIMIT", 0x50c, 0 },
-		{ "IscsiLlimit", 6, 26 },
-	{ "ULPRX_ISCSI_ULIMIT", 0x510, 0 },
-		{ "IscsiUlimit", 6, 26 },
-	{ "ULPRX_ISCSI_TAGMASK", 0x514, 0 },
-		{ "IscsiTagMask", 6, 26 },
-	{ "ULPRX_ISCSI_PSZ", 0x518, 0 },
-		{ "Hpz3", 24, 4 },
-		{ "Hpz2", 16, 4 },
-		{ "Hpz1", 8, 4 },
-		{ "Hpz0", 0, 4 },
-	{ "ULPRX_TDDP_LLIMIT", 0x51c, 0 },
-		{ "TddpLlimit", 6, 26 },
-	{ "ULPRX_TDDP_ULIMIT", 0x520, 0 },
-		{ "TddpUlimit", 6, 26 },
-	{ "ULPRX_TDDP_TAGMASK", 0x524, 0 },
-		{ "TddpTagMask", 6, 26 },
-	{ "ULPRX_TDDP_PSZ", 0x528, 0 },
-		{ "Hpz3", 24, 4 },
-		{ "Hpz2", 16, 4 },
-		{ "Hpz1", 8, 4 },
-		{ "Hpz0", 0, 4 },
-	{ "ULPRX_STAG_LLIMIT", 0x52c, 0 },
-	{ "ULPRX_STAG_ULIMIT", 0x530, 0 },
-	{ "ULPRX_RQ_LLIMIT", 0x534, 0 },
-	{ "ULPRX_RQ_ULIMIT", 0x538, 0 },
-	{ "ULPRX_PBL_LLIMIT", 0x53c, 0 },
-	{ "ULPRX_PBL_ULIMIT", 0x540, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info ulp2_tx_regs[] = {
-	{ "ULPTX_CONFIG", 0x580, 0 },
-		{ "CFG_RR_ARB", 0, 1 },
-	{ "ULPTX_INT_ENABLE", 0x584, 0 },
-		{ "Pbl_bound_err_ch1", 1, 1 },
-		{ "Pbl_bound_err_ch0", 0, 1 },
-	{ "ULPTX_INT_CAUSE", 0x588, 0 },
-		{ "Pbl_bound_err_ch1", 1, 1 },
-		{ "Pbl_bound_err_ch0", 0, 1 },
-	{ "ULPTX_TPT_LLIMIT", 0x58c, 0 },
-	{ "ULPTX_TPT_ULIMIT", 0x590, 0 },
-	{ "ULPTX_PBL_LLIMIT", 0x594, 0 },
-	{ "ULPTX_PBL_ULIMIT", 0x598, 0 },
-	{ "ULPTX_CPL_ERR_OFFSET", 0x59c, 0 },
-	{ "ULPTX_CPL_ERR_MASK", 0x5a0, 0 },
-	{ "ULPTX_CPL_ERR_VALUE", 0x5a4, 0 },
-	{ "ULPTX_CPL_PACK_SIZE", 0x5a8, 0 },
-		{ "value", 24, 8 },
-		{ "Ch1Size2", 24, 8 },
-		{ "Ch1Size1", 16, 8 },
-		{ "Ch0Size2", 8, 8 },
-		{ "Ch0Size1", 0, 8 },
-	{ "ULPTX_DMA_WEIGHT", 0x5ac, 0 },
-		{ "D1_WEIGHT", 16, 16 },
-		{ "D0_WEIGHT", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info pm1_rx_regs[] = {
-	{ "PM1_RX_CFG", 0x5c0, 0 },
-	{ "PM1_RX_MODE", 0x5c4, 0 },
-		{ "stat_channel", 1, 1 },
-		{ "priority_ch", 0, 1 },
-	{ "PM1_RX_STAT_CONFIG", 0x5c8, 0 },
-	{ "PM1_RX_STAT_COUNT", 0x5cc, 0 },
-	{ "PM1_RX_STAT_MSB", 0x5d0, 0 },
-	{ "PM1_RX_STAT_LSB", 0x5d4, 0 },
-	{ "PM1_RX_INT_ENABLE", 0x5d8, 0 },
-		{ "zero_e_cmd_error", 18, 1 },
-		{ "iespi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "iespi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "iespi0_Rx_framing_error", 15, 1 },
-		{ "iespi1_Rx_framing_error", 14, 1 },
-		{ "iespi0_Tx_framing_error", 13, 1 },
-		{ "iespi1_Tx_framing_error", 12, 1 },
-		{ "ocspi0_Rx_framing_error", 11, 1 },
-		{ "ocspi1_Rx_framing_error", 10, 1 },
-		{ "ocspi0_Tx_framing_error", 9, 1 },
-		{ "ocspi1_Tx_framing_error", 8, 1 },
-		{ "ocspi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "iespi_par_error", 3, 3 },
-		{ "ocspi_par_error", 0, 3 },
-	{ "PM1_RX_INT_CAUSE", 0x5dc, 0 },
-		{ "zero_e_cmd_error", 18, 1 },
-		{ "iespi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "iespi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "iespi0_Rx_framing_error", 15, 1 },
-		{ "iespi1_Rx_framing_error", 14, 1 },
-		{ "iespi0_Tx_framing_error", 13, 1 },
-		{ "iespi1_Tx_framing_error", 12, 1 },
-		{ "ocspi0_Rx_framing_error", 11, 1 },
-		{ "ocspi1_Rx_framing_error", 10, 1 },
-		{ "ocspi0_Tx_framing_error", 9, 1 },
-		{ "ocspi1_Tx_framing_error", 8, 1 },
-		{ "ocspi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "iespi_par_error", 3, 3 },
-		{ "ocspi_par_error", 0, 3 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info pm1_tx_regs[] = {
-	{ "PM1_TX_CFG", 0x5e0, 0 },
-	{ "PM1_TX_MODE", 0x5e4, 0 },
-		{ "stat_channel", 1, 1 },
-		{ "priority_ch", 0, 1 },
-	{ "PM1_TX_STAT_CONFIG", 0x5e8, 0 },
-	{ "PM1_TX_STAT_COUNT", 0x5ec, 0 },
-	{ "PM1_TX_STAT_MSB", 0x5f0, 0 },
-	{ "PM1_TX_STAT_LSB", 0x5f4, 0 },
-	{ "PM1_TX_INT_ENABLE", 0x5f8, 0 },
-		{ "zero_c_cmd_error", 18, 1 },
-		{ "icspi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "icspi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "icspi0_Rx_framing_error", 15, 1 },
-		{ "icspi1_Rx_framing_error", 14, 1 },
-		{ "icspi0_Tx_framing_error", 13, 1 },
-		{ "icspi1_Tx_framing_error", 12, 1 },
-		{ "oespi0_Rx_framing_error", 11, 1 },
-		{ "oespi1_Rx_framing_error", 10, 1 },
-		{ "oespi0_Tx_framing_error", 9, 1 },
-		{ "oespi1_Tx_framing_error", 8, 1 },
-		{ "oespi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "icspi_par_error", 3, 3 },
-		{ "oespi_par_error", 0, 3 },
-	{ "PM1_TX_INT_CAUSE", 0x5fc, 0 },
-		{ "zero_c_cmd_error", 18, 1 },
-		{ "icspi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "icspi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "icspi0_Rx_framing_error", 15, 1 },
-		{ "icspi1_Rx_framing_error", 14, 1 },
-		{ "icspi0_Tx_framing_error", 13, 1 },
-		{ "icspi1_Tx_framing_error", 12, 1 },
-		{ "oespi0_Rx_framing_error", 11, 1 },
-		{ "oespi1_Rx_framing_error", 10, 1 },
-		{ "oespi0_Tx_framing_error", 9, 1 },
-		{ "oespi1_Tx_framing_error", 8, 1 },
-		{ "oespi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "icspi_par_error", 3, 3 },
-		{ "oespi_par_error", 0, 3 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mps0_regs[] = {
-	{ "MPS_CFG", 0x600, 0 },
-		{ "SGETPQid", 8, 3 },
-		{ "TPRxPortSize", 7, 1 },
-		{ "TPTxPort1Size", 6, 1 },
-		{ "TPTxPort0Size", 5, 1 },
-		{ "TPRxPortEn", 4, 1 },
-		{ "TPTxPort1En", 3, 1 },
-		{ "TPTxPort0En", 2, 1 },
-		{ "Port1Active", 1, 1 },
-		{ "Port0Active", 0, 1 },
-	{ "MPS_DRR_CFG1", 0x604, 0 },
-		{ "RldWtTPD1", 11, 11 },
-		{ "RldWtTPD0", 0, 11 },
-	{ "MPS_DRR_CFG2", 0x608, 0 },
-		{ "RldWtTotal", 0, 12 },
-	{ "MPS_MCA_STATUS", 0x60c, 0 },
-		{ "MCAPktCnt", 12, 20 },
-		{ "MCADepth", 0, 12 },
-	{ "MPS_TX0_TP_CNT", 0x610, 0 },
-		{ "TX0TPDisCnt", 24, 8 },
-		{ "TX0TPCnt", 0, 24 },
-	{ "MPS_TX1_TP_CNT", 0x614, 0 },
-		{ "TX1TPDisCnt", 24, 8 },
-		{ "TX1TPCnt", 0, 24 },
-	{ "MPS_RX_TP_CNT", 0x618, 0 },
-		{ "RXTPDisCnt", 24, 8 },
-		{ "RXTPCnt", 0, 24 },
-	{ "MPS_INT_ENABLE", 0x61c, 0 },
-		{ "MCAParErrEnb", 6, 3 },
-		{ "RXTpParErrEnb", 4, 2 },
-		{ "TX1TpParErrEnb", 2, 2 },
-		{ "TX0TpParErrEnb", 0, 2 },
-	{ "MPS_INT_CAUSE", 0x620, 0 },
-		{ "MCAParErr", 6, 3 },
-		{ "RXTpParErr", 4, 2 },
-		{ "TX1TpParErr", 2, 2 },
-		{ "TX0TpParErr", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info cpl_switch_regs[] = {
-	{ "CPL_SWITCH_CNTRL", 0x640, 0 },
-		{ "cpl_pkt_tid", 8, 24 },
-		{ "cpu_no_3F_CIM_enable", 3, 1 },
-		{ "switch_table_enable", 2, 1 },
-		{ "sge_enable", 1, 1 },
-		{ "cim_enable", 0, 1 },
-	{ "CPL_SWITCH_TBL_IDX", 0x644, 0 },
-		{ "switch_tbl_idx", 0, 4 },
-	{ "CPL_SWITCH_TBL_DATA", 0x648, 0 },
-	{ "CPL_SWITCH_ZERO_ERROR", 0x64c, 0 },
-		{ "zero_cmd", 0, 8 },
-	{ "CPL_INTR_ENABLE", 0x650, 0 },
-		{ "cim_ovfl_error", 4, 1 },
-		{ "tp_framing_error", 3, 1 },
-		{ "sge_framing_error", 2, 1 },
-		{ "cim_framing_error", 1, 1 },
-		{ "zero_switch_error", 0, 1 },
-	{ "CPL_INTR_CAUSE", 0x654, 0 },
-		{ "cim_ovfl_error", 4, 1 },
-		{ "tp_framing_error", 3, 1 },
-		{ "sge_framing_error", 2, 1 },
-		{ "cim_framing_error", 1, 1 },
-		{ "zero_switch_error", 0, 1 },
-	{ "CPL_MAP_TBL_IDX", 0x658, 0 },
-		{ "cpl_map_tbl_idx", 0, 8 },
-	{ "CPL_MAP_TBL_DATA", 0x65c, 0 },
-		{ "cpl_map_tbl_data", 0, 8 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info smb0_regs[] = {
-	{ "SMB_GLOBAL_TIME_CFG", 0x660, 0 },
-		{ "LADbgWrPtr", 24, 8 },
-		{ "LADbgRdPtr", 16, 8 },
-		{ "LADbgEn", 13, 1 },
-		{ "MacroCntCfg", 8, 5 },
-		{ "MicroCntCfg", 0, 8 },
-	{ "SMB_MST_TIMEOUT_CFG", 0x664, 0 },
-		{ "DebugSelH", 28, 4 },
-		{ "DebugSelL", 24, 4 },
-		{ "MstTimeOutCfg", 0, 24 },
-	{ "SMB_MST_CTL_CFG", 0x668, 0 },
-		{ "MstFifoDbg", 31, 1 },
-		{ "MstFifoDbgClr", 30, 1 },
-		{ "MstRxByteCfg", 12, 6 },
-		{ "MstTxByteCfg", 6, 6 },
-		{ "MstReset", 1, 1 },
-		{ "MstCtlEn", 0, 1 },
-	{ "SMB_MST_CTL_STS", 0x66c, 0 },
-		{ "MstRxByteCnt", 12, 6 },
-		{ "MstTxByteCnt", 6, 6 },
-		{ "MstBusySts", 0, 1 },
-	{ "SMB_MST_TX_FIFO_RDWR", 0x670, 0 },
-	{ "SMB_MST_RX_FIFO_RDWR", 0x674, 0 },
-	{ "SMB_SLV_TIMEOUT_CFG", 0x678, 0 },
-		{ "SlvTimeOutCfg", 0, 24 },
-	{ "SMB_SLV_CTL_CFG", 0x67c, 0 },
-		{ "SlvFifoDbg", 31, 1 },
-		{ "SlvFifoDbgClr", 30, 1 },
-		{ "SlvAddrCfg", 4, 7 },
-		{ "SlvAlrtSet", 2, 1 },
-		{ "SlvReset", 1, 1 },
-		{ "SlvCtlEn", 0, 1 },
-	{ "SMB_SLV_CTL_STS", 0x680, 0 },
-		{ "SlvFifoTxCnt", 12, 6 },
-		{ "SlvFifoCnt", 6, 6 },
-		{ "SlvAlrtSts", 2, 1 },
-		{ "SlvBusySts", 0, 1 },
-	{ "SMB_SLV_FIFO_RDWR", 0x684, 0 },
-	{ "SMB_SLV_CMD_FIFO_RDWR", 0x688, 0 },
-	{ "SMB_INT_ENABLE", 0x68c, 0 },
-		{ "SlvTimeOutIntEn", 7, 1 },
-		{ "SlvErrIntEn", 6, 1 },
-		{ "SlvDoneIntEn", 5, 1 },
-		{ "SlvRxRdyIntEn", 4, 1 },
-		{ "MstTimeOutIntEn", 3, 1 },
-		{ "MstNAckIntEn", 2, 1 },
-		{ "MstLostArbIntEn", 1, 1 },
-		{ "MstDoneIntEn", 0, 1 },
-	{ "SMB_INT_CAUSE", 0x690, 0 },
-		{ "SlvTimeOutInt", 7, 1 },
-		{ "SlvErrInt", 6, 1 },
-		{ "SlvDoneInt", 5, 1 },
-		{ "SlvRxRdyInt", 4, 1 },
-		{ "MstTimeOutInt", 3, 1 },
-		{ "MstNAckInt", 2, 1 },
-		{ "MstLostArbInt", 1, 1 },
-		{ "MstDoneInt", 0, 1 },
-	{ "SMB_DEBUG_DATA", 0x694, 0 },
-		{ "DebugDataH", 16, 16 },
-		{ "DebugDataL", 0, 16 },
-	{ "SMB_DEBUG_LA", 0x69c, 0 },
-		{ "DebugLAReqAddr", 0, 10 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info i2cm0_regs[] = {
-	{ "I2C_CFG", 0x6a0, 0 },
-		{ "ClkDiv", 0, 12 },
-	{ "I2C_DATA", 0x6a4, 0 },
-		{ "Data", 0, 8 },
-	{ "I2C_OP", 0x6a8, 0 },
-		{ "Busy", 31, 1 },
-		{ "Ack", 30, 1 },
-		{ "Cont", 1, 1 },
-		{ "Op", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mi1_regs[] = {
-	{ "MI1_CFG", 0x6b0, 0 },
-		{ "ClkDiv", 5, 8 },
-		{ "St", 3, 2 },
-		{ "PreEn", 2, 1 },
-		{ "MDIInv", 1, 1 },
-		{ "MDIEn", 0, 1 },
-	{ "MI1_ADDR", 0x6b4, 0 },
-		{ "PhyAddr", 5, 5 },
-		{ "RegAddr", 0, 5 },
-	{ "MI1_DATA", 0x6b8, 0 },
-		{ "Data", 0, 16 },
-	{ "MI1_OP", 0x6bc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Inc", 2, 1 },
-		{ "Op", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info jm1_regs[] = {
-	{ "JM_CFG", 0x6c0, 0 },
-		{ "ClkDiv", 2, 8 },
-		{ "TRst", 1, 1 },
-		{ "En", 0, 1 },
-	{ "JM_MODE", 0x6c4, 0 },
-	{ "JM_DATA", 0x6c8, 0 },
-	{ "JM_OP", 0x6cc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Cnt", 0, 5 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info sf1_regs[] = {
-	{ "SF_DATA", 0x6d8, 0 },
-	{ "SF_OP", 0x6dc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Cont", 3, 1 },
-		{ "ByteCnt", 1, 2 },
-		{ "Op", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info pl3_regs[] = {
-	{ "PL_INT_ENABLE0", 0x6e0, 0 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_CAUSE0", 0x6e4, 0 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_ENABLE1", 0x6e8, 0 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_CAUSE1", 0x6ec, 0 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_RST", 0x6f0, 0 },
-		{ "CRstWrm", 1, 1 },
-		{ "CRstWrmMode", 0, 1 },
-	{ "PL_REV", 0x6f4, 0 },
-		{ "Rev", 0, 4 },
-	{ "PL_CLI", 0x6f8, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info mc5a_regs[] = {
-	{ "MC5_BUF_CONFIG", 0x700, 0 },
-		{ "term300_240", 31, 1 },
-		{ "term150", 30, 1 },
-		{ "term60", 29, 1 },
-		{ "gddriii", 28, 1 },
-		{ "gddrii", 27, 1 },
-		{ "gddri", 26, 1 },
-		{ "read", 25, 1 },
-		{ "cal_imp_upd", 23, 1 },
-		{ "cal_busy", 22, 1 },
-		{ "cal_error", 21, 1 },
-		{ "sgl_cal_en", 20, 1 },
-		{ "imp_upd_mode", 19, 1 },
-		{ "imp_sel", 18, 1 },
-		{ "man_pu", 15, 3 },
-		{ "man_pd", 12, 3 },
-		{ "cal_pu", 9, 3 },
-		{ "cal_pd", 6, 3 },
-		{ "set_pu", 3, 3 },
-		{ "set_pd", 0, 3 },
-	{ "MC5_DB_CONFIG", 0x704, 0 },
-		{ "TMCfgWrLock", 31, 1 },
-		{ "TMTypeHi", 30, 1 },
-		{ "TMPartSize", 28, 2 },
-		{ "TMType", 26, 2 },
-		{ "TMPartCount", 24, 2 },
-		{ "nLIP", 18, 6 },
-		{ "COMPEN", 17, 1 },
-		{ "BUILD", 16, 1 },
-		{ "TM_IO_PDOWN", 9, 1 },
-		{ "SYNMode", 7, 2 },
-		{ "PRTYEN", 6, 1 },
-		{ "MBUSEN", 5, 1 },
-		{ "DBGIEN", 4, 1 },
-		{ "TMRDY", 2, 1 },
-		{ "TMRST", 1, 1 },
-		{ "TMMode", 0, 1 },
-	{ "MC5_DB_ROUTING_TABLE_INDEX", 0x70c, 0 },
-		{ "RTINDX", 0, 22 },
-	{ "MC5_DB_SERVER_INDEX", 0x714, 0 },
-		{ "SRINDX", 0, 22 },
-	{ "MC5_DB_LIP_RAM_ADDR", 0x718, 0 },
-		{ "RAMWR", 8, 1 },
-		{ "RAMADDR", 0, 6 },
-	{ "MC5_DB_LIP_RAM_DATA", 0x71c, 0 },
-	{ "MC5_DB_RSP_LATENCY", 0x720, 0 },
-		{ "RDLAT", 16, 5 },
-		{ "LRNLAT", 8, 5 },
-		{ "SRCHLAT", 0, 5 },
-	{ "MC5_DB_PARITY_LATENCY", 0x724, 0 },
-		{ "PARLAT", 0, 4 },
-	{ "MC5_DB_WR_LRN_VERIFY", 0x728, 0 },
-		{ "VWVEREN", 2, 1 },
-		{ "LRNVEREN", 1, 1 },
-		{ "POVEREN", 0, 1 },
-	{ "MC5_DB_PART_ID_INDEX", 0x72c, 0 },
-		{ "IDINDEX", 0, 4 },
-	{ "MC5_DB_RESET_MAX", 0x730, 0 },
-		{ "RSTMAX", 0, 4 },
-	{ "MC5_DB_ACT_CNT", 0x734, 0 },
-		{ "ACTCNT", 0, 20 },
-	{ "MC5_DB_INT_ENABLE", 0x740, 0 },
-		{ "MsgSel", 28, 4 },
-		{ "DelActEmpty", 18, 1 },
-		{ "DispQParErr", 17, 1 },
-		{ "ReqQParErr", 16, 1 },
-		{ "UnknownCmd", 15, 1 },
-		{ "SYNCookieOff", 11, 1 },
-		{ "SYNCookieBad", 10, 1 },
-		{ "SYNCookie", 9, 1 },
-		{ "NFASrchFail", 8, 1 },
-		{ "ActRgnFull", 7, 1 },
-		{ "ParityErr", 6, 1 },
-		{ "LIPMiss", 5, 1 },
-		{ "LIP0", 4, 1 },
-		{ "Miss", 3, 1 },
-		{ "RoutingHit", 2, 1 },
-		{ "ActiveHit", 1, 1 },
-		{ "ActiveOutHit", 0, 1 },
-	{ "MC5_DB_INT_CAUSE", 0x744, 0 },
-		{ "DelActEmpty", 18, 1 },
-		{ "DispQParErr", 17, 1 },
-		{ "ReqQParErr", 16, 1 },
-		{ "UnknownCmd", 15, 1 },
-		{ "SYNCookieOff", 11, 1 },
-		{ "SYNCookieBad", 10, 1 },
-		{ "SYNCookie", 9, 1 },
-		{ "NFASrchFail", 8, 1 },
-		{ "ActRgnFull", 7, 1 },
-		{ "ParityErr", 6, 1 },
-		{ "LIPMiss", 5, 1 },
-		{ "LIP0", 4, 1 },
-		{ "Miss", 3, 1 },
-		{ "RoutingHit", 2, 1 },
-		{ "ActiveHit", 1, 1 },
-		{ "ActiveOutHit", 0, 1 },
-	{ "MC5_DB_INT_TID", 0x748, 0 },
-		{ "INTTID", 0, 20 },
-	{ "MC5_DB_INT_PTID", 0x74c, 0 },
-		{ "INTPTID", 0, 20 },
-	{ "MC5_DB_DBGI_CONFIG", 0x774, 0 },
-		{ "WRReqSize", 22, 10 },
-		{ "SADRSel", 4, 1 },
-		{ "CMDMode", 0, 3 },
-	{ "MC5_DB_DBGI_REQ_CMD", 0x778, 0 },
-		{ "MBusCmd", 0, 4 },
-		{ "IDTCmdHi", 11, 3 },
-		{ "IDTCmdLo", 0, 4 },
-		{ "IDTCmd", 0, 20 },
-		{ "LCMDB", 16, 11 },
-		{ "LCMDA", 0, 11 },
-	{ "MC5_DB_DBGI_REQ_ADDR0", 0x77c, 0 },
-	{ "MC5_DB_DBGI_REQ_ADDR1", 0x780, 0 },
-	{ "MC5_DB_DBGI_REQ_ADDR2", 0x784, 0 },
-		{ "DBGIReqAdrHi", 0, 8 },
-	{ "MC5_DB_DBGI_REQ_DATA0", 0x788, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA1", 0x78c, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA2", 0x790, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA3", 0x794, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA4", 0x798, 0 },
-		{ "DBGIReqData4", 0, 16 },
-	{ "MC5_DB_DBGI_REQ_MASK0", 0x79c, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK1", 0x7a0, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK2", 0x7a4, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK3", 0x7a8, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK4", 0x7ac, 0 },
-		{ "DBGIReqMsk4", 0, 16 },
-	{ "MC5_DB_DBGI_RSP_STATUS", 0x7b0, 0 },
-		{ "DBGIRspMsg", 8, 4 },
-		{ "DBGIRspMsgVld", 2, 1 },
-		{ "DBGIRspHit", 1, 1 },
-		{ "DBGIRspValid", 0, 1 },
-	{ "MC5_DB_DBGI_RSP_DATA0", 0x7b4, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA1", 0x7b8, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA2", 0x7bc, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA3", 0x7c0, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA4", 0x7c4, 0 },
-		{ "DBGIRspData3", 0, 16 },
-	{ "MC5_DB_DBGI_RSP_LAST_CMD", 0x7c8, 0 },
-		{ "LastCmdB", 16, 11 },
-		{ "LastCmdA", 0, 11 },
-	{ "MC5_DB_POPEN_DATA_WR_CMD", 0x7cc, 0 },
-		{ "PO_DWR", 0, 20 },
-	{ "MC5_DB_POPEN_MASK_WR_CMD", 0x7d0, 0 },
-		{ "PO_MWR", 0, 20 },
-	{ "MC5_DB_AOPEN_SRCH_CMD", 0x7d4, 0 },
-		{ "AO_SRCH", 0, 20 },
-	{ "MC5_DB_AOPEN_LRN_CMD", 0x7d8, 0 },
-		{ "AO_LRN", 0, 20 },
-	{ "MC5_DB_SYN_SRCH_CMD", 0x7dc, 0 },
-		{ "SYN_SRCH", 0, 20 },
-	{ "MC5_DB_SYN_LRN_CMD", 0x7e0, 0 },
-		{ "SYN_LRN", 0, 20 },
-	{ "MC5_DB_ACK_SRCH_CMD", 0x7e4, 0 },
-		{ "ACK_SRCH", 0, 20 },
-	{ "MC5_DB_ACK_LRN_CMD", 0x7e8, 0 },
-		{ "ACK_LRN", 0, 20 },
-	{ "MC5_DB_ILOOKUP_CMD", 0x7ec, 0 },
-		{ "I_SRCH", 0, 20 },
-	{ "MC5_DB_ELOOKUP_CMD", 0x7f0, 0 },
-		{ "E_SRCH", 0, 20 },
-	{ "MC5_DB_DATA_WRITE_CMD", 0x7f4, 0 },
-		{ "Write", 0, 20 },
-	{ "MC5_DB_DATA_READ_CMD", 0x7f8, 0 },
-		{ "ReadCmd", 0, 20 },
-	{ "MC5_DB_MASK_WRITE_CMD", 0x7fc, 0 },
-		{ "MaskWr", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info xgmac0_0_regs[] = {
-	{ "XGM_TX_CTRL", 0x800, 0 },
-		{ "SendPause", 2, 1 },
-		{ "SendZeroPause", 1, 1 },
-		{ "TxEn", 0, 1 },
-	{ "XGM_TX_CFG", 0x804, 0 },
-		{ "CfgClkSpeed", 2, 3 },
-		{ "StretchMode", 1, 1 },
-		{ "TxPauseEn", 0, 1 },
-	{ "XGM_TX_PAUSE_QUANTA", 0x808, 0 },
-		{ "TxPauseQuanta", 0, 16 },
-	{ "XGM_RX_CTRL", 0x80c, 0 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_RX_CFG", 0x810, 0 },
-		{ "Con802_3Preamble", 12, 1 },
-		{ "EnNon802_3Preamble", 11, 1 },
-		{ "CopyPreamble", 10, 1 },
-		{ "DisPauseFrames", 9, 1 },
-		{ "En1536BFrames", 8, 1 },
-		{ "EnJumbo", 7, 1 },
-		{ "RmFCS", 6, 1 },
-		{ "DisNonVlan", 5, 1 },
-		{ "EnExtMatch", 4, 1 },
-		{ "EnHashUcast", 3, 1 },
-		{ "EnHashMcast", 2, 1 },
-		{ "DisBCast", 1, 1 },
-		{ "CopyAllFrames", 0, 1 },
-	{ "XGM_RX_HASH_LOW", 0x814, 0 },
-	{ "XGM_RX_HASH_HIGH", 0x818, 0 },
-	{ "XGM_RX_EXACT_MATCH_LOW_1", 0x81c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_1", 0x820, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_2", 0x824, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_2", 0x828, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_3", 0x82c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_3", 0x830, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_4", 0x834, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_4", 0x838, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_5", 0x83c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_5", 0x840, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_6", 0x844, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_6", 0x848, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_7", 0x84c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_7", 0x850, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_8", 0x854, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_8", 0x858, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_1", 0x85c, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_2", 0x860, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_3", 0x864, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_4", 0x868, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_INT_STATUS", 0x86c, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_MASK", 0x870, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_ENABLE", 0x874, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_DISABLE", 0x878, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_TX_PAUSE_TIMER", 0x87c, 0 },
-		{ "CurPauseTimer", 0, 16 },
-	{ "XGM_STAT_CTRL", 0x880, 0 },
-		{ "ReadSnpShot", 4, 1 },
-		{ "TakeSnpShot", 3, 1 },
-		{ "ClrStats", 2, 1 },
-		{ "IncrStats", 1, 1 },
-		{ "EnTestModeWr", 0, 1 },
-	{ "XGM_RXFIFO_CFG", 0x884, 0 },
-		{ "RxFIFOPauseHWM", 17, 12 },
-		{ "RxFIFOPauseLWM", 5, 12 },
-		{ "ForcedPause", 4, 1 },
-		{ "ExternLoopback", 3, 1 },
-		{ "RxByteSwap", 2, 1 },
-		{ "RxStrFrwrd", 1, 1 },
-		{ "DisErrFrames", 0, 1 },
-	{ "XGM_TXFIFO_CFG", 0x888, 0 },
-		{ "TxIPG", 13, 8 },
-		{ "TxFIFOThresh", 4, 9 },
-		{ "InternLoopback", 3, 1 },
-		{ "TxByteSwap", 2, 1 },
-		{ "DisCRC", 1, 1 },
-		{ "DisPreAmble", 0, 1 },
-	{ "XGM_SLOW_TIMER", 0x88c, 0 },
-		{ "PauseSlowTimerEn", 31, 1 },
-		{ "PauseSlowTimer", 0, 20 },
-	{ "XGM_SERDES_CTRL", 0x890, 0 },
-		{ "SERDESEn", 25, 1 },
-		{ "SERDESReset_", 24, 1 },
-		{ "CMURange", 21, 3 },
-		{ "BGEnb", 20, 1 },
-		{ "EnSkpDrop", 19, 1 },
-		{ "EnComma", 18, 1 },
-		{ "En8B10B", 17, 1 },
-		{ "EnElBuf", 16, 1 },
-		{ "Gain", 11, 5 },
-		{ "BandGap", 7, 4 },
-		{ "LpbkEn", 5, 2 },
-		{ "RxEn", 4, 1 },
-		{ "TxEn", 3, 1 },
-		{ "RxComAdj", 2, 1 },
-		{ "PreEmph", 0, 2 },
-	{ "XGM_XAUI_PCS_TEST", 0x894, 0 },
-		{ "TestPattern", 1, 2 },
-		{ "EnTest", 0, 1 },
-	{ "XGM_RGMII_CTRL", 0x898, 0 },
-		{ "PhAlignFIFOThresh", 1, 2 },
-		{ "TxClk90Shift", 0, 1 },
-	{ "XGM_RGMII_IMP", 0x89c, 0 },
-		{ "ImpSetUpdate", 6, 1 },
-		{ "RGMIIImpPD", 3, 3 },
-		{ "RGMIIImpPU", 0, 3 },
-	{ "XGM_XAUI_IMP", 0x8a0, 0 },
-		{ "CalBusy", 31, 1 },
-		{ "CalFault", 29, 1 },
-		{ "CalImp", 24, 5 },
-		{ "XAUIImp", 0, 3 },
-	{ "XGM_SERDES_BIST", 0x8a4, 0 },
-		{ "BISTDone", 28, 4 },
-		{ "BISTCycleThresh", 3, 17 },
-		{ "BISTMode", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE", 0x8a8, 0 },
-		{ "RxMaxPktSize", 0, 14 },
-	{ "XGM_RESET_CTRL", 0x8ac, 0 },
-		{ "XG2G_Reset_", 3, 1 },
-		{ "RGMII_Reset_", 2, 1 },
-		{ "PCS_Reset_", 1, 1 },
-		{ "MAC_Reset_", 0, 1 },
-	{ "XGM_XAUI1G_CTRL", 0x8b0, 0 },
-		{ "XAUI1GLinkId", 0, 2 },
-	{ "XGM_SERDES_LANE_CTRL", 0x8b4, 0 },
-		{ "LaneReversal", 8, 1 },
-		{ "TxPolarity", 4, 4 },
-		{ "RxPolarity", 0, 4 },
-	{ "XGM_PORT_CFG", 0x8b8, 0 },
-		{ "SafeSpeedChange", 4, 1 },
-		{ "ClkDivReset_", 3, 1 },
-		{ "PortSpeed", 1, 2 },
-		{ "EnRGMII", 0, 1 },
-	{ "XGM_EPIO_DATA0", 0x8c0, 0 },
-	{ "XGM_EPIO_DATA1", 0x8c4, 0 },
-	{ "XGM_EPIO_DATA2", 0x8c8, 0 },
-	{ "XGM_EPIO_DATA3", 0x8cc, 0 },
-	{ "XGM_EPIO_OP", 0x8d0, 0 },
-		{ "PIO_Ready", 31, 1 },
-		{ "PIO_WrRd", 24, 1 },
-		{ "PIO_Address", 0, 8 },
-	{ "XGM_INT_ENABLE", 0x8d4, 0 },
-		{ "SERDESCMULock_loss", 24, 1 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBIST_err", 8, 4 },
-		{ "SERDES_los", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_INT_CAUSE", 0x8d8, 0 },
-		{ "SERDESCMULock_loss", 24, 1 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBIST_err", 8, 4 },
-		{ "SERDES_los", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_STAT_TX_BYTE_LOW", 0x900, 0 },
-	{ "XGM_STAT_TX_BYTE_HIGH", 0x904, 0 },
-		{ "TxBytes_high", 0, 13 },
-	{ "XGM_STAT_TX_FRAME_LOW", 0x908, 0 },
-	{ "XGM_STAT_TX_FRAME_HIGH", 0x90c, 0 },
-		{ "TxFrames_high", 0, 4 },
-	{ "XGM_STAT_TX_BCAST", 0x910, 0 },
-	{ "XGM_STAT_TX_MCAST", 0x914, 0 },
-	{ "XGM_STAT_TX_PAUSE", 0x918, 0 },
-	{ "XGM_STAT_TX_64B_FRAMES", 0x91c, 0 },
-	{ "XGM_STAT_TX_65_127B_FRAMES", 0x920, 0 },
-	{ "XGM_STAT_TX_128_255B_FRAMES", 0x924, 0 },
-	{ "XGM_STAT_TX_256_511B_FRAMES", 0x928, 0 },
-	{ "XGM_STAT_TX_512_1023B_FRAMES", 0x92c, 0 },
-	{ "XGM_STAT_TX_1024_1518B_FRAMES", 0x930, 0 },
-	{ "XGM_STAT_TX_1519_MAXB_FRAMES", 0x934, 0 },
-	{ "XGM_STAT_TX_ERR_FRAMES", 0x938, 0 },
-	{ "XGM_STAT_RX_BYTES_LOW", 0x93c, 0 },
-	{ "XGM_STAT_RX_BYTES_HIGH", 0x940, 0 },
-		{ "RxBytes_high", 0, 13 },
-	{ "XGM_STAT_RX_FRAMES_LOW", 0x944, 0 },
-	{ "XGM_STAT_RX_FRAMES_HIGH", 0x948, 0 },
-		{ "RxFrames_high", 0, 4 },
-	{ "XGM_STAT_RX_BCAST_FRAMES", 0x94c, 0 },
-	{ "XGM_STAT_RX_MCAST_FRAMES", 0x950, 0 },
-	{ "XGM_STAT_RX_PAUSE_FRAMES", 0x954, 0 },
-		{ "RxPauseFrames", 0, 16 },
-	{ "XGM_STAT_RX_64B_FRAMES", 0x958, 0 },
-	{ "XGM_STAT_RX_65_127B_FRAMES", 0x95c, 0 },
-	{ "XGM_STAT_RX_128_255B_FRAMES", 0x960, 0 },
-	{ "XGM_STAT_RX_256_511B_FRAMES", 0x964, 0 },
-	{ "XGM_STAT_RX_512_1023B_FRAMES", 0x968, 0 },
-	{ "XGM_STAT_RX_1024_1518B_FRAMES", 0x96c, 0 },
-	{ "XGM_STAT_RX_1519_MAXB_FRAMES", 0x970, 0 },
-	{ "XGM_STAT_RX_SHORT_FRAMES", 0x974, 0 },
-		{ "RxShortFrames", 0, 16 },
-	{ "XGM_STAT_RX_OVERSIZE_FRAMES", 0x978, 0 },
-		{ "RxOversizeFrames", 0, 16 },
-	{ "XGM_STAT_RX_JABBER_FRAMES", 0x97c, 0 },
-		{ "RxJabberFrames", 0, 16 },
-	{ "XGM_STAT_RX_CRC_ERR_FRAMES", 0x980, 0 },
-		{ "RxCRCErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x984, 0 },
-		{ "RxLengthErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x988, 0 },
-		{ "RxSymCodeErrFrames", 0, 16 },
-	{ "XGM_SERDES_STATUS0", 0x98c, 0 },
-		{ "RxErrLane3", 9, 3 },
-		{ "RxErrLane2", 6, 3 },
-		{ "RxErrLane1", 3, 3 },
-		{ "RxErrLane0", 0, 3 },
-	{ "XGM_SERDES_STATUS1", 0x990, 0 },
-		{ "CMULock", 31, 1 },
-		{ "RxKLockLane3", 11, 1 },
-		{ "RxKLockLane2", 10, 1 },
-		{ "RxKLockLane1", 9, 1 },
-		{ "RxKLockLane0", 8, 1 },
-		{ "RxUFlowLane3", 7, 1 },
-		{ "RxUFlowLane2", 6, 1 },
-		{ "RxUFlowLane1", 5, 1 },
-		{ "RxUFlowLane0", 4, 1 },
-		{ "RxOFlowLane3", 3, 1 },
-		{ "RxOFlowLane2", 2, 1 },
-		{ "RxOFlowLane1", 1, 1 },
-		{ "RxOFlowLane0", 0, 1 },
-	{ "XGM_SERDES_STATUS2", 0x994, 0 },
-		{ "RxEIDLane3", 11, 1 },
-		{ "RxEIDLane2", 10, 1 },
-		{ "RxEIDLane1", 9, 1 },
-		{ "RxEIDLane0", 8, 1 },
-		{ "RxRemSkipLane3", 7, 1 },
-		{ "RxRemSkipLane2", 6, 1 },
-		{ "RxRemSkipLane1", 5, 1 },
-		{ "RxRemSkipLane0", 4, 1 },
-		{ "RxAddSkipLane3", 3, 1 },
-		{ "RxAddSkipLane2", 2, 1 },
-		{ "RxAddSkipLane1", 1, 1 },
-		{ "RxAddSkipLane0", 0, 1 },
-	{ "XGM_XAUI_PCS_ERR", 0x998, 0 },
-		{ "PCS_SyncStatus", 5, 4 },
-		{ "PCS_CTCFIFOErr", 1, 4 },
-		{ "PCS_NotAligned", 0, 1 },
-	{ "XGM_RGMII_STATUS", 0x99c, 0 },
-		{ "GMIIDuplex", 3, 1 },
-		{ "GMIISpeed", 1, 2 },
-		{ "GMIILinkStatus", 0, 1 },
-	{ "XGM_WOL_STATUS", 0x9a0, 0 },
-		{ "PatDetected", 31, 1 },
-		{ "MatchedFilter", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0x9a4, 0 },
-	{ "XGM_TX_SPI4_SOP_EOP_CNT", 0x9a8, 0 },
-		{ "TxSPI4SopCnt", 16, 16 },
-		{ "TxSPI4EopCnt", 0, 16 },
-	{ "XGM_RX_SPI4_SOP_EOP_CNT", 0x9ac, 0 },
-		{ "RxSPI4SopCnt", 16, 16 },
-		{ "RxSPI4EopCnt", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info xgmac0_1_regs[] = {
-	{ "XGM_TX_CTRL", 0xa00, 0 },
-		{ "SendPause", 2, 1 },
-		{ "SendZeroPause", 1, 1 },
-		{ "TxEn", 0, 1 },
-	{ "XGM_TX_CFG", 0xa04, 0 },
-		{ "CfgClkSpeed", 2, 3 },
-		{ "StretchMode", 1, 1 },
-		{ "TxPauseEn", 0, 1 },
-	{ "XGM_TX_PAUSE_QUANTA", 0xa08, 0 },
-		{ "TxPauseQuanta", 0, 16 },
-	{ "XGM_RX_CTRL", 0xa0c, 0 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_RX_CFG", 0xa10, 0 },
-		{ "Con802_3Preamble", 12, 1 },
-		{ "EnNon802_3Preamble", 11, 1 },
-		{ "CopyPreamble", 10, 1 },
-		{ "DisPauseFrames", 9, 1 },
-		{ "En1536BFrames", 8, 1 },
-		{ "EnJumbo", 7, 1 },
-		{ "RmFCS", 6, 1 },
-		{ "DisNonVlan", 5, 1 },
-		{ "EnExtMatch", 4, 1 },
-		{ "EnHashUcast", 3, 1 },
-		{ "EnHashMcast", 2, 1 },
-		{ "DisBCast", 1, 1 },
-		{ "CopyAllFrames", 0, 1 },
-	{ "XGM_RX_HASH_LOW", 0xa14, 0 },
-	{ "XGM_RX_HASH_HIGH", 0xa18, 0 },
-	{ "XGM_RX_EXACT_MATCH_LOW_1", 0xa1c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_1", 0xa20, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_2", 0xa24, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_2", 0xa28, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_3", 0xa2c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_3", 0xa30, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_4", 0xa34, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_4", 0xa38, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_5", 0xa3c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_5", 0xa40, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_6", 0xa44, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_6", 0xa48, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_7", 0xa4c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_7", 0xa50, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_8", 0xa54, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_8", 0xa58, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_1", 0xa5c, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_2", 0xa60, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_3", 0xa64, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_4", 0xa68, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_INT_STATUS", 0xa6c, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_MASK", 0xa70, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_ENABLE", 0xa74, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_DISABLE", 0xa78, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_TX_PAUSE_TIMER", 0xa7c, 0 },
-		{ "CurPauseTimer", 0, 16 },
-	{ "XGM_STAT_CTRL", 0xa80, 0 },
-		{ "ReadSnpShot", 4, 1 },
-		{ "TakeSnpShot", 3, 1 },
-		{ "ClrStats", 2, 1 },
-		{ "IncrStats", 1, 1 },
-		{ "EnTestModeWr", 0, 1 },
-	{ "XGM_RXFIFO_CFG", 0xa84, 0 },
-		{ "RxFIFOPauseHWM", 17, 12 },
-		{ "RxFIFOPauseLWM", 5, 12 },
-		{ "ForcedPause", 4, 1 },
-		{ "ExternLoopback", 3, 1 },
-		{ "RxByteSwap", 2, 1 },
-		{ "RxStrFrwrd", 1, 1 },
-		{ "DisErrFrames", 0, 1 },
-	{ "XGM_TXFIFO_CFG", 0xa88, 0 },
-		{ "TxIPG", 13, 8 },
-		{ "TxFIFOThresh", 4, 9 },
-		{ "InternLoopback", 3, 1 },
-		{ "TxByteSwap", 2, 1 },
-		{ "DisCRC", 1, 1 },
-		{ "DisPreAmble", 0, 1 },
-	{ "XGM_SLOW_TIMER", 0xa8c, 0 },
-		{ "PauseSlowTimerEn", 31, 1 },
-		{ "PauseSlowTimer", 0, 20 },
-	{ "XGM_SERDES_CTRL", 0xa90, 0 },
-		{ "SERDESEn", 25, 1 },
-		{ "SERDESReset_", 24, 1 },
-		{ "CMURange", 21, 3 },
-		{ "BGEnb", 20, 1 },
-		{ "EnSkpDrop", 19, 1 },
-		{ "EnComma", 18, 1 },
-		{ "En8B10B", 17, 1 },
-		{ "EnElBuf", 16, 1 },
-		{ "Gain", 11, 5 },
-		{ "BandGap", 7, 4 },
-		{ "LpbkEn", 5, 2 },
-		{ "RxEn", 4, 1 },
-		{ "TxEn", 3, 1 },
-		{ "RxComAdj", 2, 1 },
-		{ "PreEmph", 0, 2 },
-	{ "XGM_XAUI_PCS_TEST", 0xa94, 0 },
-		{ "TestPattern", 1, 2 },
-		{ "EnTest", 0, 1 },
-	{ "XGM_RGMII_CTRL", 0xa98, 0 },
-		{ "PhAlignFIFOThresh", 1, 2 },
-		{ "TxClk90Shift", 0, 1 },
-	{ "XGM_RGMII_IMP", 0xa9c, 0 },
-		{ "ImpSetUpdate", 6, 1 },
-		{ "RGMIIImpPD", 3, 3 },
-		{ "RGMIIImpPU", 0, 3 },
-	{ "XGM_XAUI_IMP", 0xaa0, 0 },
-		{ "CalBusy", 31, 1 },
-		{ "CalFault", 29, 1 },
-		{ "CalImp", 24, 5 },
-		{ "XAUIImp", 0, 3 },
-	{ "XGM_SERDES_BIST", 0xaa4, 0 },
-		{ "BISTDone", 28, 4 },
-		{ "BISTCycleThresh", 3, 17 },
-		{ "BISTMode", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE", 0xaa8, 0 },
-		{ "RxMaxPktSize", 0, 14 },
-	{ "XGM_RESET_CTRL", 0xaac, 0 },
-		{ "XG2G_Reset_", 3, 1 },
-		{ "RGMII_Reset_", 2, 1 },
-		{ "PCS_Reset_", 1, 1 },
-		{ "MAC_Reset_", 0, 1 },
-	{ "XGM_XAUI1G_CTRL", 0xab0, 0 },
-		{ "XAUI1GLinkId", 0, 2 },
-	{ "XGM_SERDES_LANE_CTRL", 0xab4, 0 },
-		{ "LaneReversal", 8, 1 },
-		{ "TxPolarity", 4, 4 },
-		{ "RxPolarity", 0, 4 },
-	{ "XGM_PORT_CFG", 0xab8, 0 },
-		{ "SafeSpeedChange", 4, 1 },
-		{ "ClkDivReset_", 3, 1 },
-		{ "PortSpeed", 1, 2 },
-		{ "EnRGMII", 0, 1 },
-	{ "XGM_EPIO_DATA0", 0xac0, 0 },
-	{ "XGM_EPIO_DATA1", 0xac4, 0 },
-	{ "XGM_EPIO_DATA2", 0xac8, 0 },
-	{ "XGM_EPIO_DATA3", 0xacc, 0 },
-	{ "XGM_EPIO_OP", 0xad0, 0 },
-		{ "PIO_Ready", 31, 1 },
-		{ "PIO_WrRd", 24, 1 },
-		{ "PIO_Address", 0, 8 },
-	{ "XGM_INT_ENABLE", 0xad4, 0 },
-		{ "SERDESCMULock_loss", 24, 1 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBIST_err", 8, 4 },
-		{ "SERDES_los", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_INT_CAUSE", 0xad8, 0 },
-		{ "SERDESCMULock_loss", 24, 1 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBIST_err", 8, 4 },
-		{ "SERDES_los", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_STAT_TX_BYTE_LOW", 0xb00, 0 },
-	{ "XGM_STAT_TX_BYTE_HIGH", 0xb04, 0 },
-		{ "TxBytes_high", 0, 13 },
-	{ "XGM_STAT_TX_FRAME_LOW", 0xb08, 0 },
-	{ "XGM_STAT_TX_FRAME_HIGH", 0xb0c, 0 },
-		{ "TxFrames_high", 0, 4 },
-	{ "XGM_STAT_TX_BCAST", 0xb10, 0 },
-	{ "XGM_STAT_TX_MCAST", 0xb14, 0 },
-	{ "XGM_STAT_TX_PAUSE", 0xb18, 0 },
-	{ "XGM_STAT_TX_64B_FRAMES", 0xb1c, 0 },
-	{ "XGM_STAT_TX_65_127B_FRAMES", 0xb20, 0 },
-	{ "XGM_STAT_TX_128_255B_FRAMES", 0xb24, 0 },
-	{ "XGM_STAT_TX_256_511B_FRAMES", 0xb28, 0 },
-	{ "XGM_STAT_TX_512_1023B_FRAMES", 0xb2c, 0 },
-	{ "XGM_STAT_TX_1024_1518B_FRAMES", 0xb30, 0 },
-	{ "XGM_STAT_TX_1519_MAXB_FRAMES", 0xb34, 0 },
-	{ "XGM_STAT_TX_ERR_FRAMES", 0xb38, 0 },
-	{ "XGM_STAT_RX_BYTES_LOW", 0xb3c, 0 },
-	{ "XGM_STAT_RX_BYTES_HIGH", 0xb40, 0 },
-		{ "RxBytes_high", 0, 13 },
-	{ "XGM_STAT_RX_FRAMES_LOW", 0xb44, 0 },
-	{ "XGM_STAT_RX_FRAMES_HIGH", 0xb48, 0 },
-		{ "RxFrames_high", 0, 4 },
-	{ "XGM_STAT_RX_BCAST_FRAMES", 0xb4c, 0 },
-	{ "XGM_STAT_RX_MCAST_FRAMES", 0xb50, 0 },
-	{ "XGM_STAT_RX_PAUSE_FRAMES", 0xb54, 0 },
-		{ "RxPauseFrames", 0, 16 },
-	{ "XGM_STAT_RX_64B_FRAMES", 0xb58, 0 },
-	{ "XGM_STAT_RX_65_127B_FRAMES", 0xb5c, 0 },
-	{ "XGM_STAT_RX_128_255B_FRAMES", 0xb60, 0 },
-	{ "XGM_STAT_RX_256_511B_FRAMES", 0xb64, 0 },
-	{ "XGM_STAT_RX_512_1023B_FRAMES", 0xb68, 0 },
-	{ "XGM_STAT_RX_1024_1518B_FRAMES", 0xb6c, 0 },
-	{ "XGM_STAT_RX_1519_MAXB_FRAMES", 0xb70, 0 },
-	{ "XGM_STAT_RX_SHORT_FRAMES", 0xb74, 0 },
-		{ "RxShortFrames", 0, 16 },
-	{ "XGM_STAT_RX_OVERSIZE_FRAMES", 0xb78, 0 },
-		{ "RxOversizeFrames", 0, 16 },
-	{ "XGM_STAT_RX_JABBER_FRAMES", 0xb7c, 0 },
-		{ "RxJabberFrames", 0, 16 },
-	{ "XGM_STAT_RX_CRC_ERR_FRAMES", 0xb80, 0 },
-		{ "RxCRCErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0xb84, 0 },
-		{ "RxLengthErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0xb88, 0 },
-		{ "RxSymCodeErrFrames", 0, 16 },
-	{ "XGM_SERDES_STATUS0", 0xb8c, 0 },
-		{ "RxErrLane3", 9, 3 },
-		{ "RxErrLane2", 6, 3 },
-		{ "RxErrLane1", 3, 3 },
-		{ "RxErrLane0", 0, 3 },
-	{ "XGM_SERDES_STATUS1", 0xb90, 0 },
-		{ "CMULock", 31, 1 },
-		{ "RxKLockLane3", 11, 1 },
-		{ "RxKLockLane2", 10, 1 },
-		{ "RxKLockLane1", 9, 1 },
-		{ "RxKLockLane0", 8, 1 },
-		{ "RxUFlowLane3", 7, 1 },
-		{ "RxUFlowLane2", 6, 1 },
-		{ "RxUFlowLane1", 5, 1 },
-		{ "RxUFlowLane0", 4, 1 },
-		{ "RxOFlowLane3", 3, 1 },
-		{ "RxOFlowLane2", 2, 1 },
-		{ "RxOFlowLane1", 1, 1 },
-		{ "RxOFlowLane0", 0, 1 },
-	{ "XGM_SERDES_STATUS2", 0xb94, 0 },
-		{ "RxEIDLane3", 11, 1 },
-		{ "RxEIDLane2", 10, 1 },
-		{ "RxEIDLane1", 9, 1 },
-		{ "RxEIDLane0", 8, 1 },
-		{ "RxRemSkipLane3", 7, 1 },
-		{ "RxRemSkipLane2", 6, 1 },
-		{ "RxRemSkipLane1", 5, 1 },
-		{ "RxRemSkipLane0", 4, 1 },
-		{ "RxAddSkipLane3", 3, 1 },
-		{ "RxAddSkipLane2", 2, 1 },
-		{ "RxAddSkipLane1", 1, 1 },
-		{ "RxAddSkipLane0", 0, 1 },
-	{ "XGM_XAUI_PCS_ERR", 0xb98, 0 },
-		{ "PCS_SyncStatus", 5, 4 },
-		{ "PCS_CTCFIFOErr", 1, 4 },
-		{ "PCS_NotAligned", 0, 1 },
-	{ "XGM_RGMII_STATUS", 0xb9c, 0 },
-		{ "GMIIDuplex", 3, 1 },
-		{ "GMIISpeed", 1, 2 },
-		{ "GMIILinkStatus", 0, 1 },
-	{ "XGM_WOL_STATUS", 0xba0, 0 },
-		{ "PatDetected", 31, 1 },
-		{ "MatchedFilter", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0xba4, 0 },
-	{ "XGM_TX_SPI4_SOP_EOP_CNT", 0xba8, 0 },
-		{ "TxSPI4SopCnt", 16, 16 },
-		{ "TxSPI4EopCnt", 0, 16 },
-	{ "XGM_RX_SPI4_SOP_EOP_CNT", 0xbac, 0 },
-		{ "RxSPI4SopCnt", 16, 16 },
-		{ "RxSPI4EopCnt", 0, 16 },
-	{ NULL, 0, 0 }
-};
diff --git a/usr.sbin/cxgbtool/reg_defs_t3b.c b/usr.sbin/cxgbtool/reg_defs_t3b.c
deleted file mode 100644
index cd85d84..0000000
--- a/usr.sbin/cxgbtool/reg_defs_t3b.c
+++ /dev/null
@@ -1,2832 +0,0 @@
-/*
- * $FreeBSD$
- */
-
-/* This file is automatically generated --- do not edit */
-
-struct reg_info t3b_sge3_regs[] = {
-	{ "SG_CONTROL", 0x0, 0 },
-		{ "UrgTnl", 26, 1 },
-		{ "NewNotify", 25, 1 },
-		{ "AvoidCqOvfl", 24, 1 },
-		{ "OptOneIntMultQ", 23, 1 },
-		{ "CQCrdtCtrl", 22, 1 },
-		{ "EgrEnUpBp", 21, 1 },
-		{ "DropPkt", 20, 1 },
-		{ "EgrGenCtrl", 19, 1 },
-		{ "UserSpaceSize", 14, 5 },
-		{ "HostPageSize", 11, 3 },
-		{ "PCIRelax", 10, 1 },
-		{ "FLMode", 9, 1 },
-		{ "PktShift", 6, 3 },
-		{ "OneIntMultQ", 5, 1 },
-		{ "FLPickAvail", 4, 1 },
-		{ "BigEndianEgress", 3, 1 },
-		{ "BigEndianIngress", 2, 1 },
-		{ "IscsiCoalescing", 1, 1 },
-		{ "GlobalEnable", 0, 1 },
-	{ "SG_KDOORBELL", 0x4, 0 },
-		{ "SelEgrCntx", 31, 1 },
-		{ "EgrCntx", 0, 16 },
-	{ "SG_GTS", 0x8, 0 },
-		{ "RspQ", 29, 3 },
-		{ "NewTimer", 16, 13 },
-		{ "NewIndex", 0, 16 },
-	{ "SG_CONTEXT_CMD", 0xc, 0 },
-		{ "Opcode", 28, 4 },
-		{ "Busy", 27, 1 },
-		{ "CQ_credit", 20, 7 },
-		{ "CQ", 19, 1 },
-		{ "RspQ", 18, 1 },
-		{ "Egress", 17, 1 },
-		{ "FreeList", 16, 1 },
-		{ "Context", 0, 16 },
-	{ "SG_CONTEXT_DATA0", 0x10, 0 },
-	{ "SG_CONTEXT_DATA1", 0x14, 0 },
-	{ "SG_CONTEXT_DATA2", 0x18, 0 },
-	{ "SG_CONTEXT_DATA3", 0x1c, 0 },
-	{ "SG_CONTEXT_MASK0", 0x20, 0 },
-	{ "SG_CONTEXT_MASK1", 0x24, 0 },
-	{ "SG_CONTEXT_MASK2", 0x28, 0 },
-	{ "SG_CONTEXT_MASK3", 0x2c, 0 },
-	{ "SG_RSPQ_CREDIT_RETURN", 0x30, 0 },
-		{ "RspQ", 29, 3 },
-		{ "Data", 0, 16 },
-	{ "SG_DATA_INTR", 0x34, 0 },
-		{ "ErrIntr", 31, 1 },
-		{ "DataIntr", 0, 8 },
-	{ "SG_HI_DRB_HI_THRSH", 0x38, 0 },
-		{ "HiDrbHiThrsh", 0, 10 },
-	{ "SG_HI_DRB_LO_THRSH", 0x3c, 0 },
-		{ "HiDrbLoThrsh", 0, 10 },
-	{ "SG_LO_DRB_HI_THRSH", 0x40, 0 },
-		{ "LoDrbHiThrsh", 0, 10 },
-	{ "SG_LO_DRB_LO_THRSH", 0x44, 0 },
-		{ "LoDrbLoThrsh", 0, 10 },
-	{ "SG_ONE_INT_MULT_Q_COALESCING_TIMER", 0x48, 0 },
-	{ "SG_RSPQ_FL_STATUS", 0x4c, 0 },
-		{ "RspQ0Starved", 0, 1 },
-		{ "RspQ1Starved", 1, 1 },
-		{ "RspQ2Starved", 2, 1 },
-		{ "RspQ3Starved", 3, 1 },
-		{ "RspQ4Starved", 4, 1 },
-		{ "RspQ5Starved", 5, 1 },
-		{ "RspQ6Starved", 6, 1 },
-		{ "RspQ7Starved", 7, 1 },
-		{ "RspQ0Disabled", 8, 1 },
-		{ "RspQ1Disabled", 9, 1 },
-		{ "RspQ2Disabled", 10, 1 },
-		{ "RspQ3Disabled", 11, 1 },
-		{ "RspQ4Disabled", 12, 1 },
-		{ "RspQ5Disabled", 13, 1 },
-		{ "RspQ6Disabled", 14, 1 },
-		{ "RspQ7Disabled", 15, 1 },
-		{ "FL0Empty", 16, 1 },
-		{ "FL1Empty", 17, 1 },
-		{ "FL2Empty", 18, 1 },
-		{ "FL3Empty", 19, 1 },
-		{ "FL4Empty", 20, 1 },
-		{ "FL5Empty", 21, 1 },
-		{ "FL6Empty", 22, 1 },
-		{ "FL7Empty", 23, 1 },
-		{ "FL8Empty", 24, 1 },
-		{ "FL9Empty", 25, 1 },
-		{ "FL10Empty", 26, 1 },
-		{ "FL11Empty", 27, 1 },
-		{ "FL12Empty", 28, 1 },
-		{ "FL13Empty", 29, 1 },
-		{ "FL14Empty", 30, 1 },
-		{ "FL15Empty", 31, 1 },
-	{ "SG_EGR_PRI_CNT", 0x50, 0 },
-		{ "EgrErrOpCode", 24, 8 },
-		{ "EgrHiOpCode", 16, 8 },
-		{ "EgrLoOpCode", 8, 8 },
-		{ "EgrPriCnt", 0, 5 },
-	{ "SG_EGR_RCQ_DRB_THRSH", 0x54, 0 },
-		{ "HiRcqDrbThrsh", 16, 11 },
-		{ "LoRcqDrbThrsh", 0, 11 },
-	{ "SG_EGR_CNTX_BADDR", 0x58, 0 },
-		{ "EgrCntxBAddr", 5, 27 },
-	{ "SG_INT_CAUSE", 0x5c, 0 },
-		{ "HiCtlDrbDropErr", 13, 1 },
-		{ "LoCtlDrbDropErr", 12, 1 },
-		{ "HiPioDrbDropErr", 11, 1 },
-		{ "LoPioDrbDropErr", 10, 1 },
-		{ "HiCrdtUndFlowErr", 9, 1 },
-		{ "LoCrdtUndFlowErr", 8, 1 },
-		{ "HiPriorityDBFull", 7, 1 },
-		{ "HiPriorityDBEmpty", 6, 1 },
-		{ "LoPriorityDBFull", 5, 1 },
-		{ "LoPriorityDBEmpty", 4, 1 },
-		{ "RspQDisabled", 3, 1 },
-		{ "RspQCreditOverfow", 2, 1 },
-		{ "FlEmpty", 1, 1 },
-		{ "RspQStarve", 0, 1 },
-	{ "SG_INT_ENABLE", 0x60, 0 },
-		{ "HiCtlDrbDropErr", 13, 1 },
-		{ "LoCtlDrbDropErr", 12, 1 },
-		{ "HiPioDrbDropErr", 11, 1 },
-		{ "LoPioDrbDropErr", 10, 1 },
-		{ "HiCrdtUndFlowErr", 9, 1 },
-		{ "LoCrdtUndFlowErr", 8, 1 },
-		{ "HiPriorityDBFull", 7, 1 },
-		{ "HiPriorityDBEmpty", 6, 1 },
-		{ "LoPriorityDBFull", 5, 1 },
-		{ "LoPriorityDBEmpty", 4, 1 },
-		{ "RspQDisabled", 3, 1 },
-		{ "RspQCreditOverfow", 2, 1 },
-		{ "FlEmpty", 1, 1 },
-		{ "RspQStarve", 0, 1 },
-	{ "SG_CMDQ_CREDIT_TH", 0x64, 0 },
-		{ "Timeout", 8, 24 },
-		{ "Threshold", 0, 8 },
-	{ "SG_TIMER_TICK", 0x68, 0 },
-	{ "SG_CQ_CONTEXT_BADDR", 0x6c, 0 },
-		{ "baseAddr", 5, 27 },
-	{ "SG_OCO_BASE", 0x70, 0 },
-		{ "Base1", 16, 16 },
-		{ "Base0", 0, 16 },
-	{ "SG_DRB_PRI_THRESH", 0x74, 0 },
-		{ "DrbPriThrsh", 0, 16 },
-	{ "SG_DEBUG_INDEX", 0x78, 0 },
-	{ "SG_DEBUG_DATA", 0x7c, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_pcix1_regs[] = {
-	{ "PCIX_INT_ENABLE", 0x80, 0 },
-		{ "MSIXParErr", 22, 3 },
-		{ "CFParErr", 18, 4 },
-		{ "RFParErr", 14, 4 },
-		{ "WFParErr", 12, 2 },
-		{ "PIOParErr", 11, 1 },
-		{ "DetUncECCErr", 10, 1 },
-		{ "DetCorECCErr", 9, 1 },
-		{ "RcvSplCmpErr", 8, 1 },
-		{ "UnxSplCmp", 7, 1 },
-		{ "SplCmpDis", 6, 1 },
-		{ "DetParErr", 5, 1 },
-		{ "SigSysErr", 4, 1 },
-		{ "RcvMstAbt", 3, 1 },
-		{ "RcvTarAbt", 2, 1 },
-		{ "SigTarAbt", 1, 1 },
-		{ "MstDetParErr", 0, 1 },
-	{ "PCIX_INT_CAUSE", 0x84, 0 },
-		{ "MSIXParErr", 22, 3 },
-		{ "CFParErr", 18, 4 },
-		{ "RFParErr", 14, 4 },
-		{ "WFParErr", 12, 2 },
-		{ "PIOParErr", 11, 1 },
-		{ "DetUncECCErr", 10, 1 },
-		{ "DetCorECCErr", 9, 1 },
-		{ "RcvSplCmpErr", 8, 1 },
-		{ "UnxSplCmp", 7, 1 },
-		{ "SplCmpDis", 6, 1 },
-		{ "DetParErr", 5, 1 },
-		{ "SigSysErr", 4, 1 },
-		{ "RcvMstAbt", 3, 1 },
-		{ "RcvTarAbt", 2, 1 },
-		{ "SigTarAbt", 1, 1 },
-		{ "MstDetParErr", 0, 1 },
-	{ "PCIX_CFG", 0x88, 0 },
-		{ "CLIDecEn", 18, 1 },
-		{ "LatTmrDis", 17, 1 },
-		{ "LowPwrEn", 16, 1 },
-		{ "AsyncIntVec", 11, 5 },
-		{ "MaxSplTrnC", 8, 3 },
-		{ "MaxSplTrnR", 5, 3 },
-		{ "MaxWrByteCnt", 3, 2 },
-		{ "WrReqAtomicEn", 2, 1 },
-		{ "CRstWrmMode", 1, 1 },
-		{ "PIOAck64En", 0, 1 },
-	{ "PCIX_MODE", 0x8c, 0 },
-		{ "PClkRange", 6, 2 },
-		{ "PCIXInitPat", 2, 4 },
-		{ "66MHz", 1, 1 },
-		{ "64Bit", 0, 1 },
-	{ "PCIX_CAL", 0x90, 0 },
-		{ "Busy", 31, 1 },
-		{ "PerCalDiv", 22, 8 },
-		{ "PerCalEn", 21, 1 },
-		{ "SglCalEn", 20, 1 },
-		{ "ZInUpdMode", 19, 1 },
-		{ "ZInSel", 18, 1 },
-		{ "ZPDMan", 15, 3 },
-		{ "ZPUMan", 12, 3 },
-		{ "ZPDOut", 9, 3 },
-		{ "ZPUOut", 6, 3 },
-		{ "ZPDIn", 3, 3 },
-		{ "ZPUIn", 0, 3 },
-	{ "PCIX_WOL", 0x94, 0 },
-		{ "WakeUp1", 3, 1 },
-		{ "WakeUp0", 2, 1 },
-		{ "SleepMode1", 1, 1 },
-		{ "SleepMode0", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_pcie0_regs[] = {
-	{ "PCIE_INT_ENABLE", 0x80, 0 },
-		{ "BISTErr", 15, 8 },
-		{ "MSIXParErr", 12, 3 },
-		{ "CFParErr", 11, 1 },
-		{ "RFParErr", 10, 1 },
-		{ "WFParErr", 9, 1 },
-		{ "PIOParErr", 8, 1 },
-		{ "UnxSplCplErrC", 7, 1 },
-		{ "UnxSplCplErrR", 6, 1 },
-		{ "VPDAddrChng", 5, 1 },
-		{ "BusMstrEn", 4, 1 },
-		{ "PMStChng", 3, 1 },
-		{ "PEXMsg", 2, 1 },
-		{ "ZeroLenRd", 1, 1 },
-		{ "PEXErr", 0, 1 },
-	{ "PCIE_INT_CAUSE", 0x84, 0 },
-		{ "BISTErr", 15, 8 },
-		{ "MSIXParErr", 12, 3 },
-		{ "CFParErr", 11, 1 },
-		{ "RFParErr", 10, 1 },
-		{ "WFParErr", 9, 1 },
-		{ "PIOParErr", 8, 1 },
-		{ "UnxSplCplErrC", 7, 1 },
-		{ "UnxSplCplErrR", 6, 1 },
-		{ "VPDAddrChng", 5, 1 },
-		{ "BusMstrEn", 4, 1 },
-		{ "PMStChng", 3, 1 },
-		{ "PEXMsg", 2, 1 },
-		{ "ZeroLenRd", 1, 1 },
-		{ "PEXErr", 0, 1 },
-	{ "PCIE_CFG", 0x88, 0 },
-		{ "PriorityINTA", 23, 1 },
-		{ "IniFullPkt", 22, 1 },
-		{ "EnableLinkDwnDRst", 21, 1 },
-		{ "EnableLinkDownRst", 20, 1 },
-		{ "EnableHotRst", 19, 1 },
-		{ "IniWaitForGnt", 18, 1 },
-		{ "IniBEDis", 17, 1 },
-		{ "CLIDecEn", 16, 1 },
-		{ "AsyncIntVec", 11, 5 },
-		{ "MaxSplTrnC", 7, 4 },
-		{ "MaxSplTrnR", 1, 6 },
-		{ "CRstWrmMode", 0, 1 },
-	{ "PCIE_MODE", 0x8c, 0 },
-		{ "NumFstTrnSeqRx", 10, 8 },
-		{ "LnkCntlState", 2, 8 },
-		{ "VC0Up", 1, 1 },
-		{ "LnkInitial", 0, 1 },
-	{ "PCIE_WOL", 0x94, 0 },
-		{ "WakeUp1", 3, 1 },
-		{ "WakeUp0", 2, 1 },
-		{ "SleepMode1", 1, 1 },
-		{ "SleepMode0", 0, 1 },
-	{ "PCIE_PEX_CTRL0", 0x98, 0 },
-		{ "CplTimeoutRetry", 31, 1 },
-		{ "StrictTSMN", 30, 1 },
-		{ "NumFstTrnSeq", 22, 8 },
-		{ "ReplayLmt", 2, 20 },
-		{ "TxPndChkEn", 1, 1 },
-		{ "CplPndChkEn", 0, 1 },
-	{ "PCIE_PEX_CTRL1", 0x9c, 0 },
-		{ "RxPhyErrEn", 31, 1 },
-		{ "DLLPTimeoutLmt", 13, 18 },
-		{ "AckLat", 0, 13 },
-	{ "PCIE_PEX_CTRL2", 0xa0, 0 },
-		{ "LnkCntlDetDir", 30, 1 },
-		{ "EnterL1rEn", 29, 1 },
-		{ "PMExitL1Req", 28, 1 },
-		{ "PMTxIdle", 27, 1 },
-		{ "PCIModeLoop", 26, 1 },
-		{ "L1ASPMTxRxL0sTime", 14, 12 },
-		{ "L0sIdleTime", 3, 11 },
-		{ "EnterL1ASPMEn", 2, 1 },
-		{ "EnterL1En", 1, 1 },
-		{ "EnterL0sEn", 0, 1 },
-	{ "PCIE_PEX_ERR", 0xa4, 0 },
-		{ "CplTimeoutID", 18, 7 },
-		{ "FlowCtlOFlowErr", 17, 1 },
-		{ "ReplayTimeout", 16, 1 },
-		{ "ReplayRollover", 15, 1 },
-		{ "BadDLLP", 14, 1 },
-		{ "DLLPErr", 13, 1 },
-		{ "FlowCtlProtErr", 12, 1 },
-		{ "CplTimeout", 11, 1 },
-		{ "PHYRcvErr", 10, 1 },
-		{ "DisTLP", 9, 1 },
-		{ "BadECRC", 8, 1 },
-		{ "BadTLP", 7, 1 },
-		{ "MalTLP", 6, 1 },
-		{ "UnxCpl", 5, 1 },
-		{ "UnsReq", 4, 1 },
-		{ "PsnReq", 3, 1 },
-		{ "UnsCpl", 2, 1 },
-		{ "CplAbt", 1, 1 },
-		{ "PsnCpl", 0, 1 },
-	{ "PCIE_SERDES_CTRL", 0xa8, 0 },
-		{ "PMASel", 3, 1 },
-		{ "Lane", 0, 3 },
-	{ "PCIE_SERDES_QUAD_CTRL0", 0xac, 0 },
-		{ "TestSig", 10, 19 },
-		{ "Offset", 2, 8 },
-		{ "OffsetEn", 1, 1 },
-		{ "IDDQb", 0, 1 },
-	{ "PCIE_SERDES_QUAD_CTRL1", 0xb0, 0 },
-		{ "FastInit", 28, 1 },
-		{ "CTCDisable", 27, 1 },
-		{ "ManResetPLL", 26, 1 },
-		{ "ManL2Pwrdn", 25, 1 },
-		{ "ManQuadEn", 24, 1 },
-		{ "RxEqCtl", 22, 2 },
-		{ "HiVMode", 21, 1 },
-		{ "RefSel", 19, 2 },
-		{ "RxTermAdj", 17, 2 },
-		{ "TxTermAdj", 15, 2 },
-		{ "Deq", 11, 4 },
-		{ "Dtx", 7, 4 },
-		{ "LoDrv", 6, 1 },
-		{ "HiDrv", 5, 1 },
-		{ "IntParReset", 4, 1 },
-		{ "IntParLPBK", 3, 1 },
-		{ "IntSerLPBKwDrv", 2, 1 },
-		{ "PW", 1, 1 },
-		{ "PClkDetect", 0, 1 },
-	{ "PCIE_SERDES_LANE_CTRL", 0xb4, 0 },
-		{ "ExtBISTChkErrClr", 22, 1 },
-		{ "ExtBISTChkEn", 21, 1 },
-		{ "ExtBISTGenEn", 20, 1 },
-		{ "ExtBISTPat", 17, 3 },
-		{ "ExtParReset", 16, 1 },
-		{ "ExtParLPBK", 15, 1 },
-		{ "ManRxTermEn", 14, 1 },
-		{ "ManBeaconTxEn", 13, 1 },
-		{ "ManRxDetectEn", 12, 1 },
-		{ "ManTxIdleEn", 11, 1 },
-		{ "ManRxIdleEn", 10, 1 },
-		{ "ManL1Pwrdn", 9, 1 },
-		{ "ManReset", 8, 1 },
-		{ "ManFmOffset", 3, 5 },
-		{ "ManFmOffsetEn", 2, 1 },
-		{ "ManLaneEn", 1, 1 },
-		{ "IntSerLPBK", 0, 1 },
-	{ "PCIE_SERDES_LANE_STAT", 0xb8, 0 },
-		{ "ExtBISTChkErrCnt", 8, 24 },
-		{ "ExtBISTChkFmd", 7, 1 },
-		{ "BeaconDetectChg", 6, 1 },
-		{ "RxDetectChg", 5, 1 },
-		{ "TxIdleDetectChg", 4, 1 },
-		{ "BeaconDetect", 2, 1 },
-		{ "RxDetect", 1, 1 },
-		{ "TxIdleDetect", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_t3dbg_regs[] = {
-	{ "T3DBG_DBG0_CFG", 0xc0, 0 },
-		{ "RegSelect", 9, 8 },
-		{ "ModuleSelect", 4, 5 },
-		{ "ClkSelect", 0, 4 },
-	{ "T3DBG_DBG0_EN", 0xc4, 0 },
-		{ "SDRByte0", 8, 1 },
-		{ "DDREn", 4, 1 },
-		{ "PortEn", 0, 1 },
-	{ "T3DBG_DBG1_CFG", 0xc8, 0 },
-		{ "RegSelect", 9, 8 },
-		{ "ModuleSelect", 4, 5 },
-		{ "ClkSelect", 0, 4 },
-	{ "T3DBG_DBG1_EN", 0xcc, 0 },
-		{ "SDRByte0", 8, 1 },
-		{ "DDREn", 4, 1 },
-		{ "PortEn", 0, 1 },
-	{ "T3DBG_GPIO_EN", 0xd0, 0 },
-		{ "GPIO11_OEn", 27, 1 },
-		{ "GPIO10_OEn", 26, 1 },
-		{ "GPIO9_OEn", 25, 1 },
-		{ "GPIO8_OEn", 24, 1 },
-		{ "GPIO7_OEn", 23, 1 },
-		{ "GPIO6_OEn", 22, 1 },
-		{ "GPIO5_OEn", 21, 1 },
-		{ "GPIO4_OEn", 20, 1 },
-		{ "GPIO3_OEn", 19, 1 },
-		{ "GPIO2_OEn", 18, 1 },
-		{ "GPIO1_OEn", 17, 1 },
-		{ "GPIO0_OEn", 16, 1 },
-		{ "GPIO11_Out_Val", 11, 1 },
-		{ "GPIO10_Out_Val", 10, 1 },
-		{ "GPIO9_Out_Val", 9, 1 },
-		{ "GPIO8_Out_Val", 8, 1 },
-		{ "GPIO7_Out_Val", 7, 1 },
-		{ "GPIO6_Out_Val", 6, 1 },
-		{ "GPIO5_Out_Val", 5, 1 },
-		{ "GPIO4_Out_Val", 4, 1 },
-		{ "GPIO3_Out_Val", 3, 1 },
-		{ "GPIO2_Out_Val", 2, 1 },
-		{ "GPIO1_Out_Val", 1, 1 },
-		{ "GPIO0_Out_Val", 0, 1 },
-	{ "T3DBG_GPIO_IN", 0xd4, 0 },
-		{ "GPIO11_CHG_DET", 27, 1 },
-		{ "GPIO10_CHG_DET", 26, 1 },
-		{ "GPIO9_CHG_DET", 25, 1 },
-		{ "GPIO8_CHG_DET", 24, 1 },
-		{ "GPIO7_CHG_DET", 23, 1 },
-		{ "GPIO6_CHG_DET", 22, 1 },
-		{ "GPIO5_CHG_DET", 21, 1 },
-		{ "GPIO4_CHG_DET", 20, 1 },
-		{ "GPIO3_CHG_DET", 19, 1 },
-		{ "GPIO2_CHG_DET", 18, 1 },
-		{ "GPIO1_CHG_DET", 17, 1 },
-		{ "GPIO0_CHG_DET", 16, 1 },
-		{ "GPIO11_IN", 11, 1 },
-		{ "GPIO10_IN", 10, 1 },
-		{ "GPIO9_IN", 9, 1 },
-		{ "GPIO8_IN", 8, 1 },
-		{ "GPIO7_IN", 7, 1 },
-		{ "GPIO6_IN", 6, 1 },
-		{ "GPIO5_IN", 5, 1 },
-		{ "GPIO4_IN", 4, 1 },
-		{ "GPIO3_IN", 3, 1 },
-		{ "GPIO2_IN", 2, 1 },
-		{ "GPIO1_IN", 1, 1 },
-		{ "GPIO0_IN", 0, 1 },
-	{ "T3DBG_INT_ENABLE", 0xd8, 0 },
-		{ "C_LOCK", 21, 1 },
-		{ "M_LOCK", 20, 1 },
-		{ "U_LOCK", 19, 1 },
-		{ "R_LOCK", 18, 1 },
-		{ "PX_LOCK", 17, 1 },
-		{ "GPIO11", 11, 1 },
-		{ "GPIO10", 10, 1 },
-		{ "GPIO9", 9, 1 },
-		{ "GPIO8", 8, 1 },
-		{ "GPIO7", 7, 1 },
-		{ "GPIO6", 6, 1 },
-		{ "GPIO5", 5, 1 },
-		{ "GPIO4", 4, 1 },
-		{ "GPIO3", 3, 1 },
-		{ "GPIO2", 2, 1 },
-		{ "GPIO1", 1, 1 },
-		{ "GPIO0", 0, 1 },
-	{ "T3DBG_INT_CAUSE", 0xdc, 0 },
-		{ "C_LOCK", 21, 1 },
-		{ "M_LOCK", 20, 1 },
-		{ "U_LOCK", 19, 1 },
-		{ "R_LOCK", 18, 1 },
-		{ "PX_LOCK", 17, 1 },
-		{ "GPIO11", 11, 1 },
-		{ "GPIO10", 10, 1 },
-		{ "GPIO9", 9, 1 },
-		{ "GPIO8", 8, 1 },
-		{ "GPIO7", 7, 1 },
-		{ "GPIO6", 6, 1 },
-		{ "GPIO5", 5, 1 },
-		{ "GPIO4", 4, 1 },
-		{ "GPIO3", 3, 1 },
-		{ "GPIO2", 2, 1 },
-		{ "GPIO1", 1, 1 },
-		{ "GPIO0", 0, 1 },
-	{ "T3DBG_DBG0_RST_VALUE", 0xe0, 0 },
-		{ "DebugData", 0, 8 },
-	{ "T3DBG_PLL_OCLK_PAD_EN", 0xe4, 0 },
-		{ "PCIE_OCLK_En", 20, 1 },
-		{ "PClkTree_DBG_En", 17, 1 },
-		{ "PCIX_OCLK_En", 16, 1 },
-		{ "U_OCLK_En", 12, 1 },
-		{ "R_OCLK_En", 8, 1 },
-		{ "M_OCLK_En", 4, 1 },
-		{ "C_OCLK_En", 0, 1 },
-	{ "T3DBG_PLL_LOCK", 0xe8, 0 },
-		{ "PCIX_LOCK", 16, 1 },
-		{ "U_LOCK", 12, 1 },
-		{ "R_LOCK", 8, 1 },
-		{ "M_LOCK", 4, 1 },
-		{ "C_LOCK", 0, 1 },
-	{ "T3DBG_SERDES_RBC_CFG", 0xec, 0 },
-		{ "X_RBC_Lane_Sel", 16, 2 },
-		{ "X_RBC_Dbg_En", 12, 1 },
-		{ "X_Serdes_Sel", 8, 1 },
-		{ "PE_RBC_Lane_Sel", 4, 3 },
-		{ "PE_RBC_Dbg_En", 0, 1 },
-	{ "T3DBG_GPIO_ACT_LOW", 0xf0, 0 },
-		{ "C_LOCK_ACT_LOW", 21, 1 },
-		{ "M_LOCK_ACT_LOW", 20, 1 },
-		{ "U_LOCK_ACT_LOW", 19, 1 },
-		{ "R_LOCK_ACT_LOW", 18, 1 },
-		{ "PX_LOCK_ACT_LOW", 17, 1 },
-		{ "GPIO11_ACT_LOW", 11, 1 },
-		{ "GPIO10_ACT_LOW", 10, 1 },
-		{ "GPIO9_ACT_LOW", 9, 1 },
-		{ "GPIO8_ACT_LOW", 8, 1 },
-		{ "GPIO7_ACT_LOW", 7, 1 },
-		{ "GPIO6_ACT_LOW", 6, 1 },
-		{ "GPIO5_ACT_LOW", 5, 1 },
-		{ "GPIO4_ACT_LOW", 4, 1 },
-		{ "GPIO3_ACT_LOW", 3, 1 },
-		{ "GPIO2_ACT_LOW", 2, 1 },
-		{ "GPIO1_ACT_LOW", 1, 1 },
-		{ "GPIO0_ACT_LOW", 0, 1 },
-	{ "T3DBG_PMON_CFG", 0xf4, 0 },
-		{ "PMON_DONE", 29, 1 },
-		{ "PMON_FAIL", 28, 1 },
-		{ "PMON_FDEL_AUTO", 22, 6 },
-		{ "PMON_CDEL_AUTO", 16, 6 },
-		{ "PMON_FDEL_MANUAL", 10, 6 },
-		{ "PMON_CDEL_MANUAL", 4, 6 },
-		{ "PMON_MANUAL", 1, 1 },
-		{ "PMON_AUTO", 0, 1 },
-	{ "T3DBG_SERDES_REFCLK_CFG", 0xf8, 0 },
-		{ "PE_REFCLK_DBG_EN", 12, 1 },
-		{ "X_REFCLK_DBG_EN", 8, 1 },
-		{ "PE_REFCLK_TERMADJ", 5, 2 },
-		{ "PE_REFCLK_PD", 4, 1 },
-		{ "X_REFCLK_TERMADJ", 1, 2 },
-		{ "X_REFCLK_PD", 0, 1 },
-	{ "T3DBG_PCIE_PMA_BSPIN_CFG", 0xfc, 0 },
-		{ "BSModeQuad1", 31, 1 },
-		{ "BSInSelLane7", 29, 2 },
-		{ "BSEnLane7", 28, 1 },
-		{ "BSInSelLane6", 25, 2 },
-		{ "BSEnLane6", 24, 1 },
-		{ "BSInSelLane5", 21, 2 },
-		{ "BSEnLane5", 20, 1 },
-		{ "BSInSelLane4", 17, 2 },
-		{ "BSEnLane4", 16, 1 },
-		{ "BSModeQuad0", 15, 1 },
-		{ "BSInSelLane3", 13, 2 },
-		{ "BSEnLane3", 12, 1 },
-		{ "BSInSelLane2", 9, 2 },
-		{ "BSEnLane2", 8, 1 },
-		{ "BSInSelLane1", 5, 2 },
-		{ "BSEnLane1", 4, 1 },
-		{ "BSInSelLane0", 1, 2 },
-		{ "BSEnLane0", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_mc7_pmrx_regs[] = {
-	{ "MC7_CFG", 0x100, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x104, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x108, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x10c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x110, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x114, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x118, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x11c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x120, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x124, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x128, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ERR_ADDR", 0x12c, 0 },
-		{ "ErrAddress", 3, 29 },
-		{ "ErrAgent", 1, 2 },
-		{ "ErrOp", 0, 1 },
-	{ "MC7_ECC", 0x130, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x134, 0 },
-	{ "MC7_CE_DATA0", 0x138, 0 },
-	{ "MC7_CE_DATA1", 0x13c, 0 },
-	{ "MC7_CE_DATA2", 0x140, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x144, 0 },
-	{ "MC7_UE_DATA0", 0x148, 0 },
-	{ "MC7_UE_DATA1", 0x14c, 0 },
-	{ "MC7_UE_DATA2", 0x150, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x154, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x158, 0 },
-	{ "MC7_BD_DATA1", 0x15c, 0 },
-	{ "MC7_BD_DATA2", 0x160, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x164, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x168, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x16c, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x170, 0 },
-	{ "MC7_BIST_OP", 0x174, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x178, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x17c, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_mc7_pmtx_regs[] = {
-	{ "MC7_CFG", 0x180, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x184, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x188, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x18c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x190, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x194, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x198, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x19c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x1a0, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x1a4, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x1a8, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ERR_ADDR", 0x1ac, 0 },
-		{ "ErrAddress", 3, 29 },
-		{ "ErrAgent", 1, 2 },
-		{ "ErrOp", 0, 1 },
-	{ "MC7_ECC", 0x1b0, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x1b4, 0 },
-	{ "MC7_CE_DATA0", 0x1b8, 0 },
-	{ "MC7_CE_DATA1", 0x1bc, 0 },
-	{ "MC7_CE_DATA2", 0x1c0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x1c4, 0 },
-	{ "MC7_UE_DATA0", 0x1c8, 0 },
-	{ "MC7_UE_DATA1", 0x1cc, 0 },
-	{ "MC7_UE_DATA2", 0x1d0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x1d4, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x1d8, 0 },
-	{ "MC7_BD_DATA1", 0x1dc, 0 },
-	{ "MC7_BD_DATA2", 0x1e0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x1e4, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x1e8, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x1ec, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x1f0, 0 },
-	{ "MC7_BIST_OP", 0x1f4, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x1f8, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x1fc, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_mc7_cm_regs[] = {
-	{ "MC7_CFG", 0x200, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x204, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x208, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x20c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x210, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x214, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x218, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x21c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x220, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x224, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x228, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ERR_ADDR", 0x22c, 0 },
-		{ "ErrAddress", 3, 29 },
-		{ "ErrAgent", 1, 2 },
-		{ "ErrOp", 0, 1 },
-	{ "MC7_ECC", 0x230, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x234, 0 },
-	{ "MC7_CE_DATA0", 0x238, 0 },
-	{ "MC7_CE_DATA1", 0x23c, 0 },
-	{ "MC7_CE_DATA2", 0x240, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x244, 0 },
-	{ "MC7_UE_DATA0", 0x248, 0 },
-	{ "MC7_UE_DATA1", 0x24c, 0 },
-	{ "MC7_UE_DATA2", 0x250, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x254, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x258, 0 },
-	{ "MC7_BD_DATA1", 0x25c, 0 },
-	{ "MC7_BD_DATA2", 0x260, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x264, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x268, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x26c, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x270, 0 },
-	{ "MC7_BIST_OP", 0x274, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x278, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x27c, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_cim_regs[] = {
-	{ "CIM_BOOT_CFG", 0x280, 0 },
-		{ "BootAddr", 2, 30 },
-		{ "BootSdram", 1, 1 },
-		{ "uPCRst", 0, 1 },
-	{ "CIM_FLASH_BASE_ADDR", 0x284, 0 },
-		{ "FlashBaseAddr", 2, 22 },
-	{ "CIM_FLASH_ADDR_SIZE", 0x288, 0 },
-		{ "FlashAddrSize", 2, 22 },
-	{ "CIM_SDRAM_BASE_ADDR", 0x28c, 0 },
-		{ "SdramBaseAddr", 2, 30 },
-	{ "CIM_SDRAM_ADDR_SIZE", 0x290, 0 },
-		{ "SdramAddrSize", 2, 30 },
-	{ "CIM_UP_SPARE_INT", 0x294, 0 },
-		{ "uPSpareInt", 0, 3 },
-	{ "CIM_HOST_INT_ENABLE", 0x298, 0 },
-		{ "Timer1IntEn", 15, 1 },
-		{ "Timer0IntEn", 14, 1 },
-		{ "PrefDropIntEn", 13, 1 },
-		{ "BlkWrPlIntEn", 12, 1 },
-		{ "BlkRdPlIntEn", 11, 1 },
-		{ "BlkWrCtlIntEn", 10, 1 },
-		{ "BlkRdCtlIntEn", 9, 1 },
-		{ "BlkWrFlashIntEn", 8, 1 },
-		{ "BlkRdFlashIntEn", 7, 1 },
-		{ "SglWrFlashIntEn", 6, 1 },
-		{ "WrBlkFlashIntEn", 5, 1 },
-		{ "BlkWrBootIntEn", 4, 1 },
-		{ "BlkRdBootIntEn", 3, 1 },
-		{ "FlashRangeIntEn", 2, 1 },
-		{ "SdramRangeIntEn", 1, 1 },
-		{ "RsvdSpaceIntEn", 0, 1 },
-	{ "CIM_HOST_INT_CAUSE", 0x29c, 0 },
-		{ "Timer1Int", 15, 1 },
-		{ "Timer0Int", 14, 1 },
-		{ "PrefDropInt", 13, 1 },
-		{ "BlkWrPlInt", 12, 1 },
-		{ "BlkRdPlInt", 11, 1 },
-		{ "BlkWrCtlInt", 10, 1 },
-		{ "BlkRdCtlInt", 9, 1 },
-		{ "BlkWrFlashInt", 8, 1 },
-		{ "BlkRdFlashInt", 7, 1 },
-		{ "SglWrFlashInt", 6, 1 },
-		{ "WrBlkFlashInt", 5, 1 },
-		{ "BlkWrBootInt", 4, 1 },
-		{ "BlkRdBootInt", 3, 1 },
-		{ "FlashRangeInt", 2, 1 },
-		{ "SdramRangeInt", 1, 1 },
-		{ "RsvdSpaceInt", 0, 1 },
-	{ "CIM_UP_INT_ENABLE", 0x2a0, 0 },
-		{ "MstPlIntEn", 16, 1 },
-		{ "Timer1IntEn", 15, 1 },
-		{ "Timer0IntEn", 14, 1 },
-		{ "PrefDropIntEn", 13, 1 },
-		{ "BlkWrPlIntEn", 12, 1 },
-		{ "BlkRdPlIntEn", 11, 1 },
-		{ "BlkWrCtlIntEn", 10, 1 },
-		{ "BlkRdCtlIntEn", 9, 1 },
-		{ "BlkWrFlashIntEn", 8, 1 },
-		{ "BlkRdFlashIntEn", 7, 1 },
-		{ "SglWrFlashIntEn", 6, 1 },
-		{ "WrBlkFlashIntEn", 5, 1 },
-		{ "BlkWrBootIntEn", 4, 1 },
-		{ "BlkRdBootIntEn", 3, 1 },
-		{ "FlashRangeIntEn", 2, 1 },
-		{ "SdramRangeIntEn", 1, 1 },
-		{ "RsvdSpaceIntEn", 0, 1 },
-	{ "CIM_UP_INT_CAUSE", 0x2a4, 0 },
-		{ "MstPlInt", 16, 1 },
-		{ "Timer1Int", 15, 1 },
-		{ "Timer0Int", 14, 1 },
-		{ "PrefDropInt", 13, 1 },
-		{ "BlkWrPlInt", 12, 1 },
-		{ "BlkRdPlInt", 11, 1 },
-		{ "BlkWrCtlInt", 10, 1 },
-		{ "BlkRdCtlInt", 9, 1 },
-		{ "BlkWrFlashInt", 8, 1 },
-		{ "BlkRdFlashInt", 7, 1 },
-		{ "SglWrFlashInt", 6, 1 },
-		{ "WrBlkFlashInt", 5, 1 },
-		{ "BlkWrBootInt", 4, 1 },
-		{ "BlkRdBootInt", 3, 1 },
-		{ "FlashRangeInt", 2, 1 },
-		{ "SdramRangeInt", 1, 1 },
-		{ "RsvdSpaceInt", 0, 1 },
-	{ "CIM_IBQ_FULLA_THRSH", 0x2a8, 0 },
-		{ "Ibq0FullThrsh", 0, 9 },
-		{ "Ibq1FullThrsh", 16, 9 },
-	{ "CIM_IBQ_FULLB_THRSH", 0x2ac, 0 },
-		{ "Ibq2FullThrsh", 0, 9 },
-		{ "Ibq3FullThrsh", 16, 9 },
-	{ "CIM_HOST_ACC_CTRL", 0x2b0, 0 },
-		{ "HostBusy", 17, 1 },
-		{ "HostWrite", 16, 1 },
-		{ "HostAddr", 0, 16 },
-	{ "CIM_HOST_ACC_DATA", 0x2b4, 0 },
-	{ "CIM_IBQ_DBG_CFG", 0x2c0, 0 },
-		{ "IbqDbgAddr", 16, 9 },
-		{ "IbqDbgQID", 3, 2 },
-		{ "IbqDbgWr", 2, 1 },
-		{ "IbqDbgBusy", 1, 1 },
-		{ "IbqDbgEn", 0, 1 },
-	{ "CIM_OBQ_DBG_CFG", 0x2c4, 0 },
-		{ "ObqDbgAddr", 16, 9 },
-		{ "ObqDbgQID", 3, 2 },
-		{ "ObqDbgWr", 2, 1 },
-		{ "ObqDbgBusy", 1, 1 },
-		{ "ObqDbgEn", 0, 1 },
-	{ "CIM_IBQ_DBG_DATA", 0x2c8, 0 },
-	{ "CIM_OBQ_DBG_DATA", 0x2cc, 0 },
-	{ "CIM_CDEBUGDATA", 0x2d0, 0 },
-		{ "CDebugDataH", 16, 16 },
-		{ "CDebugDataL", 0, 16 },
-	{ "CIM_DEBUGCFG", 0x2e0, 0 },
-		{ "POLADbgRdPtr", 23, 9 },
-		{ "PILADbgRdPtr", 14, 9 },
-		{ "LADbgEn", 12, 1 },
-		{ "DebugSelH", 5, 5 },
-		{ "DebugSelL", 0, 5 },
-	{ "CIM_DEBUGSTS", 0x2e4, 0 },
-		{ "POLADbgWrPtr", 16, 9 },
-		{ "PILADbgWrPtr", 0, 9 },
-	{ "CIM_PO_LA_DEBUGDATA", 0x2e8, 0 },
-	{ "CIM_PI_LA_DEBUGDATA", 0x2ec, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_tp1_regs[] = {
-	{ "TP_IN_CONFIG", 0x300, 0 },
-		{ "RXFbArbPrio", 25, 1 },
-		{ "TXFbArbPrio", 24, 1 },
-		{ "DBMaxOpCnt", 16, 8 },
-		{ "IPv6Enable", 15, 1 },
-		{ "NICMode", 14, 1 },
-		{ "EChecksumCheckTCP", 13, 1 },
-		{ "EChecksumCheckIP", 12, 1 },
-		{ "ECPL", 10, 1 },
-		{ "EEthernet", 8, 1 },
-		{ "ETunnel", 7, 1 },
-		{ "CChecksumCheckTCP", 6, 1 },
-		{ "CChecksumCheckIP", 5, 1 },
-		{ "CCPL", 3, 1 },
-		{ "CEthernet", 1, 1 },
-		{ "CTunnel", 0, 1 },
-	{ "TP_OUT_CONFIG", 0x304, 0 },
-		{ "IPIDSplitMode", 16, 1 },
-		{ "VLANExtractionEnable2ndPort", 13, 1 },
-		{ "VLANExtractionEnable", 12, 1 },
-		{ "EChecksumGenerateTCP", 11, 1 },
-		{ "EChecksumGenerateIP", 10, 1 },
-		{ "ECPL", 8, 1 },
-		{ "EEthernet", 6, 1 },
-		{ "CChecksumGenerateTCP", 5, 1 },
-		{ "CChecksumGenerateIP", 4, 1 },
-		{ "CCPL", 2, 1 },
-		{ "CEthernet", 0, 1 },
-	{ "TP_GLOBAL_CONFIG", 0x308, 0 },
-		{ "SYNCookieParams", 26, 6 },
-		{ "RXFlowControlDisable", 25, 1 },
-		{ "TXPacingEnable", 24, 1 },
-		{ "AttackFilterEnable", 23, 1 },
-		{ "SYNCookieNoOptions", 22, 1 },
-		{ "ProtectedMode", 21, 1 },
-		{ "PingDrop", 20, 1 },
-		{ "FragmentDrop", 19, 1 },
-		{ "FiveTupleLookup", 17, 2 },
-		{ "PathMTU", 15, 1 },
-		{ "IPIdentSplit", 14, 1 },
-		{ "IPChecksumOffload", 13, 1 },
-		{ "UDPChecksumOffload", 12, 1 },
-		{ "TCPChecksumOffload", 11, 1 },
-		{ "QOSMapping", 10, 1 },
-		{ "TCAMServerUse", 8, 2 },
-		{ "IPTTL", 0, 8 },
-	{ "TP_GLOBAL_RX_CREDIT", 0x30c, 0 },
-	{ "TP_CMM_SIZE", 0x310, 0 },
-		{ "CMMemMgrSize", 0, 28 },
-	{ "TP_CMM_MM_BASE", 0x314, 0 },
-		{ "CMMemMgrBase", 0, 28 },
-	{ "TP_CMM_TIMER_BASE", 0x318, 0 },
-		{ "CMTimerMaxNum", 28, 2 },
-		{ "CMTimerBase", 0, 28 },
-	{ "TP_PMM_SIZE", 0x31c, 0 },
-		{ "PMSize", 0, 28 },
-	{ "TP_PMM_TX_BASE", 0x320, 0 },
-	{ "TP_PMM_DEFRAG_BASE", 0x324, 0 },
-	{ "TP_PMM_RX_BASE", 0x328, 0 },
-	{ "TP_PMM_RX_PAGE_SIZE", 0x32c, 0 },
-	{ "TP_PMM_RX_MAX_PAGE", 0x330, 0 },
-		{ "PMRxMaxPage", 0, 21 },
-	{ "TP_PMM_TX_PAGE_SIZE", 0x334, 0 },
-	{ "TP_PMM_TX_MAX_PAGE", 0x338, 0 },
-		{ "PMTxMaxPage", 0, 21 },
-	{ "TP_TCP_OPTIONS", 0x340, 0 },
-		{ "MTUDefault", 16, 16 },
-		{ "MTUEnable", 10, 1 },
-		{ "SACKTx", 9, 1 },
-		{ "SACKRx", 8, 1 },
-		{ "SACKMode", 4, 2 },
-		{ "WindowScaleMode", 2, 2 },
-		{ "TimestampsMode", 0, 2 },
-	{ "TP_DACK_CONFIG", 0x344, 0 },
-		{ "AutoState3", 30, 2 },
-		{ "AutoState2", 28, 2 },
-		{ "AutoState1", 26, 2 },
-		{ "ByteThreshold", 5, 20 },
-		{ "MSSThreshold", 3, 2 },
-		{ "AutoCareful", 2, 1 },
-		{ "AutoEnable", 1, 1 },
-		{ "Mode", 0, 1 },
-	{ "TP_PC_CONFIG", 0x348, 0 },
-		{ "CMCacheDisable", 31, 1 },
-		{ "EnableOcspiFull", 30, 1 },
-		{ "EnableFLMErrorDDP", 29, 1 },
-		{ "LockTid", 28, 1 },
-		{ "FixRcvWnd", 27, 1 },
-		{ "TxTosQueueMapMode", 26, 1 },
-		{ "RddpCongEn", 25, 1 },
-		{ "EnableOnFlyPDU", 24, 1 },
-		{ "EnableEPCMDAFull", 23, 1 },
-		{ "ModulateUnionMode", 22, 1 },
-		{ "TxDataAckRateEnable", 21, 1 },
-		{ "TxDeferEnable", 20, 1 },
-		{ "RxCongestionMode", 19, 1 },
-		{ "HearbeatOnceDACK", 18, 1 },
-		{ "HearbeatOnceHeap", 17, 1 },
-		{ "HearbeatDACK", 16, 1 },
-		{ "TxCongestionMode", 15, 1 },
-		{ "AcceptLatestRcvAdv", 14, 1 },
-		{ "DisableSYNData", 13, 1 },
-		{ "DisableWindowPSH", 12, 1 },
-		{ "DisableFINOldData", 11, 1 },
-		{ "EnableFLMError", 10, 1 },
-		{ "DisableNextMtu", 9, 1 },
-		{ "FilterPeerFIN", 8, 1 },
-		{ "EnableFeedbackSend", 7, 1 },
-		{ "EnableRDMAError", 6, 1 },
-		{ "EnableDDPFlowControl", 5, 1 },
-		{ "DisableHeldFIN", 4, 1 },
-		{ "TableLatencyDelta", 0, 4 },
-	{ "TP_PC_CONFIG2", 0x34c, 0 },
-		{ "EnableDropRQEmptyPkt", 10, 1 },
-		{ "EnableTxPortfromDA2", 9, 1 },
-		{ "EnableRxPktTmstpRss", 8, 1 },
-		{ "EnableSndUnaInRxData", 7, 1 },
-		{ "EnableRxPortFromAddr", 6, 1 },
-		{ "EnableTxPortfromDA", 5, 1 },
-		{ "CHdrAFull", 4, 1 },
-		{ "EnableNonOfdScbBit", 3, 1 },
-		{ "EnableNonOfdTidRss", 2, 1 },
-		{ "EnableNonOfdTcbRss", 1, 1 },
-		{ "EnableOldRxForward", 0, 1 },
-	{ "TP_TCP_BACKOFF_REG0", 0x350, 0 },
-		{ "TimerBackoffIndex3", 24, 8 },
-		{ "TimerBackoffIndex2", 16, 8 },
-		{ "TimerBackoffIndex1", 8, 8 },
-		{ "TimerBackoffIndex0", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG1", 0x354, 0 },
-		{ "TimerBackoffIndex7", 24, 8 },
-		{ "TimerBackoffIndex6", 16, 8 },
-		{ "TimerBackoffIndex5", 8, 8 },
-		{ "TimerBackoffIndex4", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG2", 0x358, 0 },
-		{ "TimerBackoffIndex11", 24, 8 },
-		{ "TimerBackoffIndex10", 16, 8 },
-		{ "TimerBackoffIndex9", 8, 8 },
-		{ "TimerBackoffIndex8", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG3", 0x35c, 0 },
-		{ "TimerBackoffIndex15", 24, 8 },
-		{ "TimerBackoffIndex14", 16, 8 },
-		{ "TimerBackoffIndex13", 8, 8 },
-		{ "TimerBackoffIndex12", 0, 8 },
-	{ "TP_PARA_REG0", 0x360, 0 },
-		{ "InitCwnd", 24, 3 },
-		{ "DupAckThresh", 20, 4 },
-	{ "TP_PARA_REG1", 0x364, 0 },
-		{ "InitRwnd", 16, 16 },
-		{ "InitialSSThresh", 0, 16 },
-	{ "TP_PARA_REG2", 0x368, 0 },
-		{ "MaxRxData", 16, 16 },
-		{ "RxCoalesceSize", 0, 16 },
-	{ "TP_PARA_REG3", 0x36c, 0 },
-		{ "TunnelCngDrop1", 21, 1 },
-		{ "TunnelCngDrop0", 20, 1 },
-		{ "TxDataAckIdx", 16, 4 },
-		{ "RxFragEnable", 12, 3 },
-		{ "TxPaceFixedStrict", 11, 1 },
-		{ "TxPaceAutoStrict", 10, 1 },
-		{ "TxPaceFixed", 9, 1 },
-		{ "TxPaceAuto", 8, 1 },
-		{ "RxUrgTunnel", 6, 1 },
-		{ "RxUrgMode", 5, 1 },
-		{ "TxUrgMode", 4, 1 },
-		{ "CngCtrlMode", 2, 2 },
-		{ "RxCoalesceEnable", 1, 1 },
-		{ "RxCoalescePshEn", 0, 1 },
-	{ "TP_PARA_REG4", 0x370, 0 },
-		{ "HighSpeedCfg", 24, 8 },
-		{ "NewRenoCfg", 16, 8 },
-		{ "TahoeCfg", 8, 8 },
-		{ "RenoCfg", 0, 8 },
-	{ "TP_PARA_REG5", 0x374, 0 },
-		{ "IndicateSize", 16, 16 },
-		{ "SchdEnable", 8, 1 },
-		{ "OnFlyDDPEnable", 2, 1 },
-		{ "DackTimerSpin", 1, 1 },
-		{ "PushTimerEnable", 0, 1 },
-	{ "TP_PARA_REG6", 0x378, 0 },
-		{ "TxPDUSizeAdj", 16, 8 },
-		{ "EnableDeferACK", 12, 1 },
-		{ "EnableESnd", 11, 1 },
-		{ "EnableCSnd", 10, 1 },
-		{ "EnablePDUE", 9, 1 },
-		{ "EnablePDUC", 8, 1 },
-		{ "EnableBUFI", 7, 1 },
-		{ "EnableBUFE", 6, 1 },
-		{ "EnableDefer", 5, 1 },
-		{ "EnableClearRxmtOos", 4, 1 },
-		{ "DisablePDUCng", 3, 1 },
-		{ "DisablePDUTimeout", 2, 1 },
-		{ "DisablePDURxmt", 1, 1 },
-		{ "DisablePDUxmt", 0, 1 },
-	{ "TP_PARA_REG7", 0x37c, 0 },
-		{ "PMMaxXferLen1", 16, 16 },
-		{ "PMMaxXferLen0", 0, 16 },
-	{ "TP_TIMER_RESOLUTION", 0x390, 0 },
-		{ "TimerResolution", 16, 8 },
-		{ "TimestampResolution", 8, 8 },
-		{ "DelayedACKResolution", 0, 8 },
-	{ "TP_MSL", 0x394, 0 },
-		{ "MSL", 0, 30 },
-	{ "TP_RXT_MIN", 0x398, 0 },
-		{ "RxtMin", 0, 30 },
-	{ "TP_RXT_MAX", 0x39c, 0 },
-		{ "RxtMax", 0, 30 },
-	{ "TP_PERS_MIN", 0x3a0, 0 },
-		{ "PersMin", 0, 30 },
-	{ "TP_PERS_MAX", 0x3a4, 0 },
-		{ "PersMax", 0, 30 },
-	{ "TP_KEEP_IDLE", 0x3a8, 0 },
-		{ "KeepaliveIdle", 0, 30 },
-	{ "TP_KEEP_INTVL", 0x3ac, 0 },
-		{ "KeepaliveIntvl", 0, 30 },
-	{ "TP_INIT_SRTT", 0x3b0, 0 },
-		{ "InitSrtt", 0, 16 },
-	{ "TP_DACK_TIMER", 0x3b4, 0 },
-		{ "DackTime", 0, 12 },
-	{ "TP_FINWAIT2_TIMER", 0x3b8, 0 },
-		{ "Finwait2Time", 0, 30 },
-	{ "TP_FAST_FINWAIT2_TIMER", 0x3bc, 0 },
-		{ "FastFinwait2Time", 0, 30 },
-	{ "TP_SHIFT_CNT", 0x3c0, 0 },
-		{ "SynShiftMax", 24, 8 },
-		{ "RxtShiftMaxR1", 20, 4 },
-		{ "RxtShiftMaxR2", 16, 4 },
-		{ "PerShiftBackoffMax", 12, 4 },
-		{ "PerShiftMax", 8, 4 },
-		{ "KeepaliveMax", 0, 8 },
-	{ "TP_TIME_HI", 0x3c8, 0 },
-	{ "TP_TIME_LO", 0x3cc, 0 },
-	{ "TP_MTU_PORT_TABLE", 0x3d0, 0 },
-		{ "Port1MTUValue", 16, 16 },
-		{ "Port0MTUValue", 0, 16 },
-	{ "TP_ULP_TABLE", 0x3d4, 0 },
-		{ "ULPType7Field", 28, 4 },
-		{ "ULPType6Field", 24, 4 },
-		{ "ULPType5Field", 20, 4 },
-		{ "ULPType4Field", 16, 4 },
-		{ "ULPType3Field", 12, 4 },
-		{ "ULPType2Field", 8, 4 },
-		{ "ULPType1Field", 4, 4 },
-		{ "ULPType0Field", 0, 4 },
-	{ "TP_PACE_TABLE", 0x3d8, 0 },
-	{ "TP_CCTRL_TABLE", 0x3dc, 0 },
-	{ "TP_TOS_TABLE", 0x3e0, 0 },
-	{ "TP_MTU_TABLE", 0x3e4, 0 },
-	{ "TP_RSS_MAP_TABLE", 0x3e8, 0 },
-	{ "TP_RSS_LKP_TABLE", 0x3ec, 0 },
-	{ "TP_RSS_CONFIG", 0x3f0, 0 },
-		{ "TNL4tupEn", 29, 1 },
-		{ "TNL2tupEn", 28, 1 },
-		{ "TNLprtEn", 26, 1 },
-		{ "TNLMapEn", 25, 1 },
-		{ "TNLLkpEn", 24, 1 },
-		{ "OFD4tupEn", 21, 1 },
-		{ "OFD2tupEn", 20, 1 },
-		{ "OFDMapEn", 17, 1 },
-		{ "OFDLkpEn", 16, 1 },
-		{ "SYN4tupEn", 13, 1 },
-		{ "SYN2tupEn", 12, 1 },
-		{ "SYNMapEn", 9, 1 },
-		{ "SYNLkpEn", 8, 1 },
-		{ "RRCPLMapEn", 7, 1 },
-		{ "RRCPLCPUSIZE", 4, 3 },
-		{ "RQFeedbackEnable", 3, 1 },
-		{ "HashToeplitz", 2, 1 },
-		{ "HashSave", 1, 1 },
-		{ "Disable", 0, 1 },
-	{ "TP_RSS_CONFIG_TNL", 0x3f4, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_CONFIG_OFD", 0x3f8, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_CONFIG_SYN", 0x3fc, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_SECRET_KEY0", 0x400, 0 },
-	{ "TP_RSS_SECRET_KEY1", 0x404, 0 },
-	{ "TP_RSS_SECRET_KEY2", 0x408, 0 },
-	{ "TP_RSS_SECRET_KEY3", 0x40c, 0 },
-	{ "TP_TM_PIO_ADDR", 0x418, 0 },
-	{ "TP_TM_PIO_DATA", 0x41c, 0 },
-	{ "TP_TX_MOD_QUE_TABLE", 0x420, 0 },
-	{ "TP_TX_RESOURCE_LIMIT", 0x424, 0 },
-		{ "TX_RESOURCE_LIMIT_CH1_PC", 24, 8 },
-		{ "TX_RESOURCE_LIMIT_CH1_NON_PC", 16, 8 },
-		{ "TX_RESOURCE_LIMIT_CH0_PC", 8, 8 },
-		{ "TX_RESOURCE_LIMIT_CH0_NON_PC", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_REQ_MAP", 0x428, 0 },
-		{ "RX_MOD_WEIGHT", 24, 8 },
-		{ "TX_MOD_WEIGHT", 16, 8 },
-		{ "TX_MOD_TIMER_MODE", 8, 8 },
-		{ "TX_MOD_QUEUE_REQ_MAP", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_WEIGHT1", 0x42c, 0 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT7", 24, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT6", 16, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT5", 8, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_WEIGHT0", 0x430, 0 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT3", 24, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT2", 16, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT1", 8, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 },
-	{ "TP_MOD_CHANNEL_WEIGHT", 0x434, 0 },
-		{ "RX_MOD_CHANNEL_WEIGHT1", 24, 8 },
-		{ "RX_MOD_CHANNEL_WEIGHT0", 16, 8 },
-		{ "TX_MOD_CHANNEL_WEIGHT1", 8, 8 },
-		{ "TX_MOD_CHANNEL_WEIGHT0", 0, 8 },
-	{ "TP_MOD_RATE_LIMIT", 0x438, 0 },
-		{ "RX_MOD_RATE_LIMIT_INC", 24, 8 },
-		{ "RX_MOD_RATE_LIMIT_TICK", 16, 8 },
-		{ "TX_MOD_RATE_LIMIT_INC", 8, 8 },
-		{ "TX_MOD_RATE_LIMIT_TICK", 0, 8 },
-	{ "TP_PIO_ADDR", 0x440, 0 },
-	{ "TP_PIO_DATA", 0x444, 0 },
-	{ "TP_RESET", 0x44c, 0 },
-		{ "FlstInitEnable", 1, 1 },
-		{ "TPReset", 0, 1 },
-	{ "TP_MIB_INDEX", 0x450, 0 },
-	{ "TP_MIB_RDATA", 0x454, 0 },
-	{ "TP_SYNC_TIME_HI", 0x458, 0 },
-	{ "TP_SYNC_TIME_LO", 0x45c, 0 },
-	{ "TP_CMM_MM_RX_FLST_BASE", 0x460, 0 },
-		{ "CMRxFlstBase", 0, 28 },
-	{ "TP_CMM_MM_TX_FLST_BASE", 0x464, 0 },
-		{ "CMTxFlstBase", 0, 28 },
-	{ "TP_CMM_MM_PS_FLST_BASE", 0x468, 0 },
-		{ "CMPsFlstBase", 0, 28 },
-	{ "TP_CMM_MM_MAX_PSTRUCT", 0x46c, 0 },
-		{ "CMMaxPstruct", 0, 21 },
-	{ "TP_INT_ENABLE", 0x470, 0 },
-	{ "TP_INT_CAUSE", 0x474, 0 },
-	{ "TP_FLM_FREE_PS_CNT", 0x480, 0 },
-		{ "FreePstructCount", 0, 21 },
-	{ "TP_FLM_FREE_RX_CNT", 0x484, 0 },
-		{ "FreeRxPageCount", 0, 21 },
-	{ "TP_FLM_FREE_TX_CNT", 0x488, 0 },
-		{ "FreeTxPageCount", 0, 21 },
-	{ "TP_TM_HEAP_PUSH_CNT", 0x48c, 0 },
-	{ "TP_TM_HEAP_POP_CNT", 0x490, 0 },
-	{ "TP_TM_DACK_PUSH_CNT", 0x494, 0 },
-	{ "TP_TM_DACK_POP_CNT", 0x498, 0 },
-	{ "TP_TM_MOD_PUSH_CNT", 0x49c, 0 },
-	{ "TP_MOD_POP_CNT", 0x4a0, 0 },
-	{ "TP_TIMER_SEPARATOR", 0x4a4, 0 },
-	{ "TP_DEBUG_SEL", 0x4a8, 0 },
-	{ "TP_DEBUG_FLAGS", 0x4ac, 0 },
-		{ "RxTimerDackFirst", 26, 1 },
-		{ "RxTimerDack", 25, 1 },
-		{ "RxTimerHeartbeat", 24, 1 },
-		{ "RxPawsDrop", 23, 1 },
-		{ "RxUrgDataDrop", 22, 1 },
-		{ "RxFutureData", 21, 1 },
-		{ "RxRcvRxmData", 20, 1 },
-		{ "RxRcvOooDataFin", 19, 1 },
-		{ "RxRcvOooData", 18, 1 },
-		{ "RxRcvWndZero", 17, 1 },
-		{ "RxRcvWndLtMss", 16, 1 },
-		{ "TxDupAckInc", 11, 1 },
-		{ "TxRxmUrg", 10, 1 },
-		{ "TxRxmFin", 9, 1 },
-		{ "TxRxmSyn", 8, 1 },
-		{ "TxRxmNewReno", 7, 1 },
-		{ "TxRxmFast", 6, 1 },
-		{ "TxRxmTimer", 5, 1 },
-		{ "TxRxmTimerKeepalive", 4, 1 },
-		{ "TxRxmTimerPersist", 3, 1 },
-		{ "TxRcvAdvShrunk", 2, 1 },
-		{ "TxRcvAdvZero", 1, 1 },
-		{ "TxRcvAdvLtMss", 0, 1 },
-	{ "TP_PROXY_FLOW_CNTL", 0x4b0, 0 },
-	{ "TP_PC_CONGESTION_CNTL", 0x4b4, 0 },
-		{ "EDropTunnel", 19, 1 },
-		{ "CDropTunnel", 18, 1 },
-		{ "EThreshold", 12, 6 },
-		{ "CThreshold", 6, 6 },
-		{ "TxThreshold", 0, 6 },
-	{ "TP_TX_DROP_COUNT", 0x4bc, 0 },
-	{ "TP_CLEAR_DEBUG", 0x4c0, 0 },
-		{ "ClrDebug", 0, 1 },
-	{ "TP_DEBUG_VEC", 0x4c4, 0 },
-	{ "TP_DEBUG_VEC2", 0x4c8, 0 },
-	{ "TP_DEBUG_REG_SEL", 0x4cc, 0 },
-	{ "TP_DEBUG", 0x4d0, 0 },
-	{ "TP_DBG_LA_CONFIG", 0x4d4, 0 },
-	{ "TP_DBG_LA_DATAH", 0x4d8, 0 },
-	{ "TP_DBG_LA_DATAL", 0x4dc, 0 },
-	{ "TP_EMBED_OP_FIELD0", 0x4e8, 0 },
-	{ "TP_EMBED_OP_FIELD1", 0x4ec, 0 },
-	{ "TP_EMBED_OP_FIELD2", 0x4f0, 0 },
-	{ "TP_EMBED_OP_FIELD3", 0x4f4, 0 },
-	{ "TP_EMBED_OP_FIELD4", 0x4f8, 0 },
-	{ "TP_EMBED_OP_FIELD5", 0x4fc, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_ulp2_rx_regs[] = {
-	{ "ULPRX_CTL", 0x500, 0 },
-		{ "PCMD1Threshold", 24, 8 },
-		{ "PCMD0Threshold", 16, 8 },
-		{ "round_robin", 4, 1 },
-		{ "RDMA_permissive_mode", 3, 1 },
-		{ "PagePodME", 2, 1 },
-		{ "IscsiTagTcb", 1, 1 },
-		{ "TddpTagTcb", 0, 1 },
-	{ "ULPRX_INT_ENABLE", 0x504, 0 },
-		{ "ParErr", 0, 1 },
-	{ "ULPRX_INT_CAUSE", 0x508, 0 },
-		{ "ParErr", 0, 1 },
-	{ "ULPRX_ISCSI_LLIMIT", 0x50c, 0 },
-		{ "IscsiLlimit", 6, 26 },
-	{ "ULPRX_ISCSI_ULIMIT", 0x510, 0 },
-		{ "IscsiUlimit", 6, 26 },
-	{ "ULPRX_ISCSI_TAGMASK", 0x514, 0 },
-		{ "IscsiTagMask", 6, 26 },
-	{ "ULPRX_ISCSI_PSZ", 0x518, 0 },
-		{ "Hpz3", 24, 4 },
-		{ "Hpz2", 16, 4 },
-		{ "Hpz1", 8, 4 },
-		{ "Hpz0", 0, 4 },
-	{ "ULPRX_TDDP_LLIMIT", 0x51c, 0 },
-		{ "TddpLlimit", 6, 26 },
-	{ "ULPRX_TDDP_ULIMIT", 0x520, 0 },
-		{ "TddpUlimit", 6, 26 },
-	{ "ULPRX_TDDP_TAGMASK", 0x524, 0 },
-		{ "TddpTagMask", 6, 26 },
-	{ "ULPRX_TDDP_PSZ", 0x528, 0 },
-		{ "Hpz3", 24, 4 },
-		{ "Hpz2", 16, 4 },
-		{ "Hpz1", 8, 4 },
-		{ "Hpz0", 0, 4 },
-	{ "ULPRX_STAG_LLIMIT", 0x52c, 0 },
-	{ "ULPRX_STAG_ULIMIT", 0x530, 0 },
-	{ "ULPRX_RQ_LLIMIT", 0x534, 0 },
-	{ "ULPRX_RQ_ULIMIT", 0x538, 0 },
-	{ "ULPRX_PBL_LLIMIT", 0x53c, 0 },
-	{ "ULPRX_PBL_ULIMIT", 0x540, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_ulp2_tx_regs[] = {
-	{ "ULPTX_CONFIG", 0x580, 0 },
-		{ "CFG_RR_ARB", 0, 1 },
-	{ "ULPTX_INT_ENABLE", 0x584, 0 },
-		{ "Pbl_bound_err_ch1", 1, 1 },
-		{ "Pbl_bound_err_ch0", 0, 1 },
-	{ "ULPTX_INT_CAUSE", 0x588, 0 },
-		{ "Pbl_bound_err_ch1", 1, 1 },
-		{ "Pbl_bound_err_ch0", 0, 1 },
-	{ "ULPTX_TPT_LLIMIT", 0x58c, 0 },
-	{ "ULPTX_TPT_ULIMIT", 0x590, 0 },
-	{ "ULPTX_PBL_LLIMIT", 0x594, 0 },
-	{ "ULPTX_PBL_ULIMIT", 0x598, 0 },
-	{ "ULPTX_CPL_ERR_OFFSET", 0x59c, 0 },
-	{ "ULPTX_CPL_ERR_MASK", 0x5a0, 0 },
-	{ "ULPTX_CPL_ERR_VALUE", 0x5a4, 0 },
-	{ "ULPTX_CPL_PACK_SIZE", 0x5a8, 0 },
-		{ "value", 24, 8 },
-		{ "Ch1Size2", 24, 8 },
-		{ "Ch1Size1", 16, 8 },
-		{ "Ch0Size2", 8, 8 },
-		{ "Ch0Size1", 0, 8 },
-	{ "ULPTX_DMA_WEIGHT", 0x5ac, 0 },
-		{ "D1_WEIGHT", 16, 16 },
-		{ "D0_WEIGHT", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_pm1_rx_regs[] = {
-	{ "PM1_RX_CFG", 0x5c0, 0 },
-	{ "PM1_RX_MODE", 0x5c4, 0 },
-		{ "stat_channel", 1, 1 },
-		{ "priority_ch", 0, 1 },
-	{ "PM1_RX_STAT_CONFIG", 0x5c8, 0 },
-	{ "PM1_RX_STAT_COUNT", 0x5cc, 0 },
-	{ "PM1_RX_STAT_MSB", 0x5d0, 0 },
-	{ "PM1_RX_STAT_LSB", 0x5d4, 0 },
-	{ "PM1_RX_INT_ENABLE", 0x5d8, 0 },
-		{ "zero_e_cmd_error", 18, 1 },
-		{ "iespi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "iespi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "iespi0_Rx_framing_error", 15, 1 },
-		{ "iespi1_Rx_framing_error", 14, 1 },
-		{ "iespi0_Tx_framing_error", 13, 1 },
-		{ "iespi1_Tx_framing_error", 12, 1 },
-		{ "ocspi0_Rx_framing_error", 11, 1 },
-		{ "ocspi1_Rx_framing_error", 10, 1 },
-		{ "ocspi0_Tx_framing_error", 9, 1 },
-		{ "ocspi1_Tx_framing_error", 8, 1 },
-		{ "ocspi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "iespi_par_error", 3, 3 },
-		{ "ocspi_par_error", 0, 3 },
-	{ "PM1_RX_INT_CAUSE", 0x5dc, 0 },
-		{ "zero_e_cmd_error", 18, 1 },
-		{ "iespi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "iespi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "iespi0_Rx_framing_error", 15, 1 },
-		{ "iespi1_Rx_framing_error", 14, 1 },
-		{ "iespi0_Tx_framing_error", 13, 1 },
-		{ "iespi1_Tx_framing_error", 12, 1 },
-		{ "ocspi0_Rx_framing_error", 11, 1 },
-		{ "ocspi1_Rx_framing_error", 10, 1 },
-		{ "ocspi0_Tx_framing_error", 9, 1 },
-		{ "ocspi1_Tx_framing_error", 8, 1 },
-		{ "ocspi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "iespi_par_error", 3, 3 },
-		{ "ocspi_par_error", 0, 3 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_pm1_tx_regs[] = {
-	{ "PM1_TX_CFG", 0x5e0, 0 },
-	{ "PM1_TX_MODE", 0x5e4, 0 },
-		{ "stat_channel", 1, 1 },
-		{ "priority_ch", 0, 1 },
-	{ "PM1_TX_STAT_CONFIG", 0x5e8, 0 },
-	{ "PM1_TX_STAT_COUNT", 0x5ec, 0 },
-	{ "PM1_TX_STAT_MSB", 0x5f0, 0 },
-	{ "PM1_TX_STAT_LSB", 0x5f4, 0 },
-	{ "PM1_TX_INT_ENABLE", 0x5f8, 0 },
-		{ "zero_c_cmd_error", 18, 1 },
-		{ "icspi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "icspi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "icspi0_Rx_framing_error", 15, 1 },
-		{ "icspi1_Rx_framing_error", 14, 1 },
-		{ "icspi0_Tx_framing_error", 13, 1 },
-		{ "icspi1_Tx_framing_error", 12, 1 },
-		{ "oespi0_Rx_framing_error", 11, 1 },
-		{ "oespi1_Rx_framing_error", 10, 1 },
-		{ "oespi0_Tx_framing_error", 9, 1 },
-		{ "oespi1_Tx_framing_error", 8, 1 },
-		{ "oespi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "icspi_par_error", 3, 3 },
-		{ "oespi_par_error", 0, 3 },
-	{ "PM1_TX_INT_CAUSE", 0x5fc, 0 },
-		{ "zero_c_cmd_error", 18, 1 },
-		{ "icspi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "icspi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "icspi0_Rx_framing_error", 15, 1 },
-		{ "icspi1_Rx_framing_error", 14, 1 },
-		{ "icspi0_Tx_framing_error", 13, 1 },
-		{ "icspi1_Tx_framing_error", 12, 1 },
-		{ "oespi0_Rx_framing_error", 11, 1 },
-		{ "oespi1_Rx_framing_error", 10, 1 },
-		{ "oespi0_Tx_framing_error", 9, 1 },
-		{ "oespi1_Tx_framing_error", 8, 1 },
-		{ "oespi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "icspi_par_error", 3, 3 },
-		{ "oespi_par_error", 0, 3 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_mps0_regs[] = {
-	{ "MPS_CFG", 0x600, 0 },
-		{ "EnForcePkt", 11, 1 },
-		{ "SGETPQid", 8, 3 },
-		{ "TPRxPortSize", 7, 1 },
-		{ "TPTxPort1Size", 6, 1 },
-		{ "TPTxPort0Size", 5, 1 },
-		{ "TPRxPortEn", 4, 1 },
-		{ "TPTxPort1En", 3, 1 },
-		{ "TPTxPort0En", 2, 1 },
-		{ "Port1Active", 1, 1 },
-		{ "Port0Active", 0, 1 },
-	{ "MPS_DRR_CFG1", 0x604, 0 },
-		{ "RldWtTPD1", 11, 11 },
-		{ "RldWtTPD0", 0, 11 },
-	{ "MPS_DRR_CFG2", 0x608, 0 },
-		{ "RldWtTotal", 0, 12 },
-	{ "MPS_MCA_STATUS", 0x60c, 0 },
-		{ "MCAPktCnt", 12, 20 },
-		{ "MCADepth", 0, 12 },
-	{ "MPS_TX0_TP_CNT", 0x610, 0 },
-		{ "TX0TPDisCnt", 24, 8 },
-		{ "TX0TPCnt", 0, 24 },
-	{ "MPS_TX1_TP_CNT", 0x614, 0 },
-		{ "TX1TPDisCnt", 24, 8 },
-		{ "TX1TPCnt", 0, 24 },
-	{ "MPS_RX_TP_CNT", 0x618, 0 },
-		{ "RXTPDisCnt", 24, 8 },
-		{ "RXTPCnt", 0, 24 },
-	{ "MPS_INT_ENABLE", 0x61c, 0 },
-		{ "MCAParErrEnb", 6, 3 },
-		{ "RXTpParErrEnb", 4, 2 },
-		{ "TX1TpParErrEnb", 2, 2 },
-		{ "TX0TpParErrEnb", 0, 2 },
-	{ "MPS_INT_CAUSE", 0x620, 0 },
-		{ "MCAParErr", 6, 3 },
-		{ "RXTpParErr", 4, 2 },
-		{ "TX1TpParErr", 2, 2 },
-		{ "TX0TpParErr", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_cpl_switch_regs[] = {
-	{ "CPL_SWITCH_CNTRL", 0x640, 0 },
-		{ "cpl_pkt_tid", 8, 24 },
-		{ "cpu_no_3F_CIM_enable", 3, 1 },
-		{ "switch_table_enable", 2, 1 },
-		{ "sge_enable", 1, 1 },
-		{ "cim_enable", 0, 1 },
-	{ "CPL_SWITCH_TBL_IDX", 0x644, 0 },
-		{ "switch_tbl_idx", 0, 4 },
-	{ "CPL_SWITCH_TBL_DATA", 0x648, 0 },
-	{ "CPL_SWITCH_ZERO_ERROR", 0x64c, 0 },
-		{ "zero_cmd", 0, 8 },
-	{ "CPL_INTR_ENABLE", 0x650, 0 },
-		{ "cim_ovfl_error", 4, 1 },
-		{ "tp_framing_error", 3, 1 },
-		{ "sge_framing_error", 2, 1 },
-		{ "cim_framing_error", 1, 1 },
-		{ "zero_switch_error", 0, 1 },
-	{ "CPL_INTR_CAUSE", 0x654, 0 },
-		{ "cim_ovfl_error", 4, 1 },
-		{ "tp_framing_error", 3, 1 },
-		{ "sge_framing_error", 2, 1 },
-		{ "cim_framing_error", 1, 1 },
-		{ "zero_switch_error", 0, 1 },
-	{ "CPL_MAP_TBL_IDX", 0x658, 0 },
-		{ "cpl_map_tbl_idx", 0, 8 },
-	{ "CPL_MAP_TBL_DATA", 0x65c, 0 },
-		{ "cpl_map_tbl_data", 0, 8 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_smb0_regs[] = {
-	{ "SMB_GLOBAL_TIME_CFG", 0x660, 0 },
-		{ "LADbgWrPtr", 24, 8 },
-		{ "LADbgRdPtr", 16, 8 },
-		{ "LADbgEn", 13, 1 },
-		{ "MacroCntCfg", 8, 5 },
-		{ "MicroCntCfg", 0, 8 },
-	{ "SMB_MST_TIMEOUT_CFG", 0x664, 0 },
-		{ "DebugSelH", 28, 4 },
-		{ "DebugSelL", 24, 4 },
-		{ "MstTimeOutCfg", 0, 24 },
-	{ "SMB_MST_CTL_CFG", 0x668, 0 },
-		{ "MstFifoDbg", 31, 1 },
-		{ "MstFifoDbgClr", 30, 1 },
-		{ "MstRxByteCfg", 12, 6 },
-		{ "MstTxByteCfg", 6, 6 },
-		{ "MstReset", 1, 1 },
-		{ "MstCtlEn", 0, 1 },
-	{ "SMB_MST_CTL_STS", 0x66c, 0 },
-		{ "MstRxByteCnt", 12, 6 },
-		{ "MstTxByteCnt", 6, 6 },
-		{ "MstBusySts", 0, 1 },
-	{ "SMB_MST_TX_FIFO_RDWR", 0x670, 0 },
-	{ "SMB_MST_RX_FIFO_RDWR", 0x674, 0 },
-	{ "SMB_SLV_TIMEOUT_CFG", 0x678, 0 },
-		{ "SlvTimeOutCfg", 0, 24 },
-	{ "SMB_SLV_CTL_CFG", 0x67c, 0 },
-		{ "SlvFifoDbg", 31, 1 },
-		{ "SlvFifoDbgClr", 30, 1 },
-		{ "SlvAddrCfg", 4, 7 },
-		{ "SlvAlrtSet", 2, 1 },
-		{ "SlvReset", 1, 1 },
-		{ "SlvCtlEn", 0, 1 },
-	{ "SMB_SLV_CTL_STS", 0x680, 0 },
-		{ "SlvFifoTxCnt", 12, 6 },
-		{ "SlvFifoCnt", 6, 6 },
-		{ "SlvAlrtSts", 2, 1 },
-		{ "SlvBusySts", 0, 1 },
-	{ "SMB_SLV_FIFO_RDWR", 0x684, 0 },
-	{ "SMB_SLV_CMD_FIFO_RDWR", 0x688, 0 },
-	{ "SMB_INT_ENABLE", 0x68c, 0 },
-		{ "SlvTimeOutIntEn", 7, 1 },
-		{ "SlvErrIntEn", 6, 1 },
-		{ "SlvDoneIntEn", 5, 1 },
-		{ "SlvRxRdyIntEn", 4, 1 },
-		{ "MstTimeOutIntEn", 3, 1 },
-		{ "MstNAckIntEn", 2, 1 },
-		{ "MstLostArbIntEn", 1, 1 },
-		{ "MstDoneIntEn", 0, 1 },
-	{ "SMB_INT_CAUSE", 0x690, 0 },
-		{ "SlvTimeOutInt", 7, 1 },
-		{ "SlvErrInt", 6, 1 },
-		{ "SlvDoneInt", 5, 1 },
-		{ "SlvRxRdyInt", 4, 1 },
-		{ "MstTimeOutInt", 3, 1 },
-		{ "MstNAckInt", 2, 1 },
-		{ "MstLostArbInt", 1, 1 },
-		{ "MstDoneInt", 0, 1 },
-	{ "SMB_DEBUG_DATA", 0x694, 0 },
-		{ "DebugDataH", 16, 16 },
-		{ "DebugDataL", 0, 16 },
-	{ "SMB_DEBUG_LA", 0x69c, 0 },
-		{ "DebugLAReqAddr", 0, 10 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_i2cm0_regs[] = {
-	{ "I2C_CFG", 0x6a0, 0 },
-		{ "ClkDiv", 0, 12 },
-	{ "I2C_DATA", 0x6a4, 0 },
-		{ "Data", 0, 8 },
-	{ "I2C_OP", 0x6a8, 0 },
-		{ "Busy", 31, 1 },
-		{ "Ack", 30, 1 },
-		{ "Cont", 1, 1 },
-		{ "Op", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_mi1_regs[] = {
-	{ "MI1_CFG", 0x6b0, 0 },
-		{ "ClkDiv", 5, 8 },
-		{ "St", 3, 2 },
-		{ "PreEn", 2, 1 },
-		{ "MDIInv", 1, 1 },
-		{ "MDIEn", 0, 1 },
-	{ "MI1_ADDR", 0x6b4, 0 },
-		{ "PhyAddr", 5, 5 },
-		{ "RegAddr", 0, 5 },
-	{ "MI1_DATA", 0x6b8, 0 },
-		{ "Data", 0, 16 },
-	{ "MI1_OP", 0x6bc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Inc", 2, 1 },
-		{ "Op", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_jm1_regs[] = {
-	{ "JM_CFG", 0x6c0, 0 },
-		{ "ClkDiv", 2, 8 },
-		{ "TRst", 1, 1 },
-		{ "En", 0, 1 },
-	{ "JM_MODE", 0x6c4, 0 },
-	{ "JM_DATA", 0x6c8, 0 },
-	{ "JM_OP", 0x6cc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Cnt", 0, 5 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_sf1_regs[] = {
-	{ "SF_DATA", 0x6d8, 0 },
-	{ "SF_OP", 0x6dc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Cont", 3, 1 },
-		{ "ByteCnt", 1, 2 },
-		{ "Op", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_pl3_regs[] = {
-	{ "PL_INT_ENABLE0", 0x6e0, 0 },
-		{ "SW", 25, 1 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_CAUSE0", 0x6e4, 0 },
-		{ "SW", 25, 1 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_ENABLE1", 0x6e8, 0 },
-		{ "SW", 25, 1 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_CAUSE1", 0x6ec, 0 },
-		{ "SW", 25, 1 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_RST", 0x6f0, 0 },
-		{ "SWInt1", 3, 1 },
-		{ "SWInt0", 2, 1 },
-		{ "CRstWrm", 1, 1 },
-		{ "CRstWrmMode", 0, 1 },
-	{ "PL_REV", 0x6f4, 0 },
-		{ "Rev", 0, 4 },
-	{ "PL_CLI", 0x6f8, 0 },
-	{ "PL_LCK", 0x6fc, 0 },
-		{ "Lck", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_mc5a_regs[] = {
-	{ "MC5_BUF_CONFIG", 0x700, 0 },
-		{ "term300_240", 31, 1 },
-		{ "term150", 30, 1 },
-		{ "term60", 29, 1 },
-		{ "gddriii", 28, 1 },
-		{ "gddrii", 27, 1 },
-		{ "gddri", 26, 1 },
-		{ "read", 25, 1 },
-		{ "imp_set_update", 24, 1 },
-		{ "cal_update", 23, 1 },
-		{ "cal_busy", 22, 1 },
-		{ "cal_error", 21, 1 },
-		{ "sgl_cal_en", 20, 1 },
-		{ "imp_upd_mode", 19, 1 },
-		{ "imp_sel", 18, 1 },
-		{ "man_pu", 15, 3 },
-		{ "man_pd", 12, 3 },
-		{ "cal_pu", 9, 3 },
-		{ "cal_pd", 6, 3 },
-		{ "set_pu", 3, 3 },
-		{ "set_pd", 0, 3 },
-	{ "MC5_DB_CONFIG", 0x704, 0 },
-		{ "TMCfgWrLock", 31, 1 },
-		{ "TMTypeHi", 30, 1 },
-		{ "TMPartSize", 28, 2 },
-		{ "TMType", 26, 2 },
-		{ "TMPartCount", 24, 2 },
-		{ "nLIP", 18, 6 },
-		{ "COMPEN", 17, 1 },
-		{ "BUILD", 16, 1 },
-		{ "FilterEn", 11, 1 },
-		{ "CLIPUpdate", 10, 1 },
-		{ "TM_IO_PDOWN", 9, 1 },
-		{ "SYNMode", 7, 2 },
-		{ "PRTYEN", 6, 1 },
-		{ "MBUSEN", 5, 1 },
-		{ "DBGIEN", 4, 1 },
-		{ "TcmCfgOvr", 3, 1 },
-		{ "TMRDY", 2, 1 },
-		{ "TMRST", 1, 1 },
-		{ "TMMode", 0, 1 },
-	{ "MC5_MISC", 0x708, 0 },
-		{ "LIP_Cmp_Unavailable", 0, 4 },
-	{ "MC5_DB_ROUTING_TABLE_INDEX", 0x70c, 0 },
-		{ "RTINDX", 0, 22 },
-	{ "MC5_DB_FILTER_TABLE", 0x710, 0 },
-		{ "SRINDX", 0, 22 },
-	{ "MC5_DB_SERVER_INDEX", 0x714, 0 },
-		{ "SRINDX", 0, 22 },
-	{ "MC5_DB_LIP_RAM_ADDR", 0x718, 0 },
-		{ "RAMWR", 8, 1 },
-		{ "RAMADDR", 0, 6 },
-	{ "MC5_DB_LIP_RAM_DATA", 0x71c, 0 },
-	{ "MC5_DB_RSP_LATENCY", 0x720, 0 },
-		{ "RDLAT", 16, 5 },
-		{ "LRNLAT", 8, 5 },
-		{ "SRCHLAT", 0, 5 },
-	{ "MC5_DB_PARITY_LATENCY", 0x724, 0 },
-		{ "PARLAT", 0, 4 },
-	{ "MC5_DB_WR_LRN_VERIFY", 0x728, 0 },
-		{ "VWVEREN", 2, 1 },
-		{ "LRNVEREN", 1, 1 },
-		{ "POVEREN", 0, 1 },
-	{ "MC5_DB_PART_ID_INDEX", 0x72c, 0 },
-		{ "IDINDEX", 0, 4 },
-	{ "MC5_DB_RESET_MAX", 0x730, 0 },
-		{ "RSTMAX", 0, 4 },
-	{ "MC5_DB_ACT_CNT", 0x734, 0 },
-		{ "ACTCNT", 0, 20 },
-	{ "MC5_DB_CLIP_MAP", 0x738, 0 },
-		{ "CLIPMapOp", 31, 1 },
-		{ "CLIPMapVal", 16, 6 },
-		{ "CLIPMapAddr", 0, 6 },
-	{ "MC5_DB_INT_ENABLE", 0x740, 0 },
-		{ "MsgSel", 28, 4 },
-		{ "DelActEmpty", 18, 1 },
-		{ "DispQParErr", 17, 1 },
-		{ "ReqQParErr", 16, 1 },
-		{ "UnknownCmd", 15, 1 },
-		{ "SYNCookieOff", 11, 1 },
-		{ "SYNCookieBad", 10, 1 },
-		{ "SYNCookie", 9, 1 },
-		{ "NFASrchFail", 8, 1 },
-		{ "ActRgnFull", 7, 1 },
-		{ "ParityErr", 6, 1 },
-		{ "LIPMiss", 5, 1 },
-		{ "LIP0", 4, 1 },
-		{ "Miss", 3, 1 },
-		{ "RoutingHit", 2, 1 },
-		{ "ActiveHit", 1, 1 },
-		{ "ActiveOutHit", 0, 1 },
-	{ "MC5_DB_INT_CAUSE", 0x744, 0 },
-		{ "DelActEmpty", 18, 1 },
-		{ "DispQParErr", 17, 1 },
-		{ "ReqQParErr", 16, 1 },
-		{ "UnknownCmd", 15, 1 },
-		{ "SYNCookieOff", 11, 1 },
-		{ "SYNCookieBad", 10, 1 },
-		{ "SYNCookie", 9, 1 },
-		{ "NFASrchFail", 8, 1 },
-		{ "ActRgnFull", 7, 1 },
-		{ "ParityErr", 6, 1 },
-		{ "LIPMiss", 5, 1 },
-		{ "LIP0", 4, 1 },
-		{ "Miss", 3, 1 },
-		{ "RoutingHit", 2, 1 },
-		{ "ActiveHit", 1, 1 },
-		{ "ActiveOutHit", 0, 1 },
-	{ "MC5_DB_INT_TID", 0x748, 0 },
-		{ "INTTID", 0, 20 },
-	{ "MC5_DB_INT_PTID", 0x74c, 0 },
-		{ "INTPTID", 0, 20 },
-	{ "MC5_DB_DBGI_CONFIG", 0x774, 0 },
-		{ "WRReqSize", 22, 10 },
-		{ "SADRSel", 4, 1 },
-		{ "CMDMode", 0, 3 },
-	{ "MC5_DB_DBGI_REQ_CMD", 0x778, 0 },
-		{ "MBusCmd", 0, 4 },
-		{ "IDTCmdHi", 11, 3 },
-		{ "IDTCmdLo", 0, 4 },
-		{ "IDTCmd", 0, 20 },
-		{ "LCMDB", 16, 11 },
-		{ "LCMDA", 0, 11 },
-	{ "MC5_DB_DBGI_REQ_ADDR0", 0x77c, 0 },
-	{ "MC5_DB_DBGI_REQ_ADDR1", 0x780, 0 },
-	{ "MC5_DB_DBGI_REQ_ADDR2", 0x784, 0 },
-		{ "DBGIReqAdrHi", 0, 8 },
-	{ "MC5_DB_DBGI_REQ_DATA0", 0x788, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA1", 0x78c, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA2", 0x790, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA3", 0x794, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA4", 0x798, 0 },
-		{ "DBGIReqData4", 0, 16 },
-	{ "MC5_DB_DBGI_REQ_MASK0", 0x79c, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK1", 0x7a0, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK2", 0x7a4, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK3", 0x7a8, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK4", 0x7ac, 0 },
-		{ "DBGIReqMsk4", 0, 16 },
-	{ "MC5_DB_DBGI_RSP_STATUS", 0x7b0, 0 },
-		{ "DBGIRspMsg", 8, 4 },
-		{ "DBGIRspMsgVld", 2, 1 },
-		{ "DBGIRspHit", 1, 1 },
-		{ "DBGIRspValid", 0, 1 },
-	{ "MC5_DB_DBGI_RSP_DATA0", 0x7b4, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA1", 0x7b8, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA2", 0x7bc, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA3", 0x7c0, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA4", 0x7c4, 0 },
-		{ "DBGIRspData3", 0, 16 },
-	{ "MC5_DB_DBGI_RSP_LAST_CMD", 0x7c8, 0 },
-		{ "LastCmdB", 16, 11 },
-		{ "LastCmdA", 0, 11 },
-	{ "MC5_DB_POPEN_DATA_WR_CMD", 0x7cc, 0 },
-		{ "PO_DWR", 0, 20 },
-	{ "MC5_DB_POPEN_MASK_WR_CMD", 0x7d0, 0 },
-		{ "PO_MWR", 0, 20 },
-	{ "MC5_DB_AOPEN_SRCH_CMD", 0x7d4, 0 },
-		{ "AO_SRCH", 0, 20 },
-	{ "MC5_DB_AOPEN_LRN_CMD", 0x7d8, 0 },
-		{ "AO_LRN", 0, 20 },
-	{ "MC5_DB_SYN_SRCH_CMD", 0x7dc, 0 },
-		{ "SYN_SRCH", 0, 20 },
-	{ "MC5_DB_SYN_LRN_CMD", 0x7e0, 0 },
-		{ "SYN_LRN", 0, 20 },
-	{ "MC5_DB_ACK_SRCH_CMD", 0x7e4, 0 },
-		{ "ACK_SRCH", 0, 20 },
-	{ "MC5_DB_ACK_LRN_CMD", 0x7e8, 0 },
-		{ "ACK_LRN", 0, 20 },
-	{ "MC5_DB_ILOOKUP_CMD", 0x7ec, 0 },
-		{ "I_SRCH", 0, 20 },
-	{ "MC5_DB_ELOOKUP_CMD", 0x7f0, 0 },
-		{ "E_SRCH", 0, 20 },
-	{ "MC5_DB_DATA_WRITE_CMD", 0x7f4, 0 },
-		{ "Write", 0, 20 },
-	{ "MC5_DB_DATA_READ_CMD", 0x7f8, 0 },
-		{ "ReadCmd", 0, 20 },
-	{ "MC5_DB_MASK_WRITE_CMD", 0x7fc, 0 },
-		{ "MaskWr", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_xgmac0_0_regs[] = {
-	{ "XGM_TX_CTRL", 0x800, 0 },
-		{ "SendPause", 2, 1 },
-		{ "SendZeroPause", 1, 1 },
-		{ "TxEn", 0, 1 },
-	{ "XGM_TX_CFG", 0x804, 0 },
-		{ "CfgClkSpeed", 2, 3 },
-		{ "StretchMode", 1, 1 },
-		{ "TxPauseEn", 0, 1 },
-	{ "XGM_TX_PAUSE_QUANTA", 0x808, 0 },
-		{ "TxPauseQuanta", 0, 16 },
-	{ "XGM_RX_CTRL", 0x80c, 0 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_RX_CFG", 0x810, 0 },
-		{ "Con802_3Preamble", 12, 1 },
-		{ "EnNon802_3Preamble", 11, 1 },
-		{ "CopyPreamble", 10, 1 },
-		{ "DisPauseFrames", 9, 1 },
-		{ "En1536BFrames", 8, 1 },
-		{ "EnJumbo", 7, 1 },
-		{ "RmFCS", 6, 1 },
-		{ "DisNonVlan", 5, 1 },
-		{ "EnExtMatch", 4, 1 },
-		{ "EnHashUcast", 3, 1 },
-		{ "EnHashMcast", 2, 1 },
-		{ "DisBCast", 1, 1 },
-		{ "CopyAllFrames", 0, 1 },
-	{ "XGM_RX_HASH_LOW", 0x814, 0 },
-	{ "XGM_RX_HASH_HIGH", 0x818, 0 },
-	{ "XGM_RX_EXACT_MATCH_LOW_1", 0x81c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_1", 0x820, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_2", 0x824, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_2", 0x828, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_3", 0x82c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_3", 0x830, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_4", 0x834, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_4", 0x838, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_5", 0x83c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_5", 0x840, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_6", 0x844, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_6", 0x848, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_7", 0x84c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_7", 0x850, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_8", 0x854, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_8", 0x858, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_1", 0x85c, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_2", 0x860, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_3", 0x864, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_4", 0x868, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_INT_STATUS", 0x86c, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_MASK", 0x870, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_ENABLE", 0x874, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_DISABLE", 0x878, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_TX_PAUSE_TIMER", 0x87c, 0 },
-		{ "CurPauseTimer", 0, 16 },
-	{ "XGM_STAT_CTRL", 0x880, 0 },
-		{ "ReadSnpShot", 4, 1 },
-		{ "TakeSnpShot", 3, 1 },
-		{ "ClrStats", 2, 1 },
-		{ "IncrStats", 1, 1 },
-		{ "EnTestModeWr", 0, 1 },
-	{ "XGM_RXFIFO_CFG", 0x884, 0 },
-		{ "RxFIFOPauseHWM", 17, 12 },
-		{ "RxFIFOPauseLWM", 5, 12 },
-		{ "ForcedPause", 4, 1 },
-		{ "ExternLoopback", 3, 1 },
-		{ "RxByteSwap", 2, 1 },
-		{ "RxStrFrwrd", 1, 1 },
-		{ "DisErrFrames", 0, 1 },
-	{ "XGM_TXFIFO_CFG", 0x888, 0 },
-		{ "EnDropPkt", 21, 1 },
-		{ "TxIPG", 13, 8 },
-		{ "TxFIFOThresh", 4, 9 },
-		{ "InternLoopback", 3, 1 },
-		{ "TxByteSwap", 2, 1 },
-		{ "DisCRC", 1, 1 },
-		{ "DisPreAmble", 0, 1 },
-	{ "XGM_SLOW_TIMER", 0x88c, 0 },
-		{ "PauseSlowTimerEn", 31, 1 },
-		{ "PauseSlowTimer", 0, 20 },
-	{ "XGM_PAUSE_TIMER", 0x890, 0 },
-		{ "PauseTimer", 0, 20 },
-	{ "XGM_XAUI_PCS_TEST", 0x894, 0 },
-		{ "TestPattern", 1, 2 },
-		{ "EnTest", 0, 1 },
-	{ "XGM_RGMII_CTRL", 0x898, 0 },
-		{ "PhAlignFIFOThresh", 1, 2 },
-		{ "TxClk90Shift", 0, 1 },
-	{ "XGM_RGMII_IMP", 0x89c, 0 },
-		{ "CalReset", 8, 1 },
-		{ "CalUpdate", 7, 1 },
-		{ "ImpSetUpdate", 6, 1 },
-		{ "RGMIIImpPD", 3, 3 },
-		{ "RGMIIImpPU", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE", 0x8a8, 0 },
-		{ "RxMaxPktSize", 0, 14 },
-	{ "XGM_RESET_CTRL", 0x8ac, 0 },
-		{ "XG2G_Reset_", 3, 1 },
-		{ "RGMII_Reset_", 2, 1 },
-		{ "PCS_Reset_", 1, 1 },
-		{ "MAC_Reset_", 0, 1 },
-	{ "XGM_XAUI1G_CTRL", 0x8b0, 0 },
-		{ "XAUI1GLinkId", 0, 2 },
-	{ "XGM_SERDES_LANE_CTRL", 0x8b4, 0 },
-		{ "LaneReversal", 8, 1 },
-		{ "TxPolarity", 4, 4 },
-		{ "RxPolarity", 0, 4 },
-	{ "XGM_PORT_CFG", 0x8b8, 0 },
-		{ "SafeSpeedChange", 4, 1 },
-		{ "ClkDivReset_", 3, 1 },
-		{ "PortSpeed", 1, 2 },
-		{ "EnRGMII", 0, 1 },
-	{ "XGM_EPIO_DATA0", 0x8c0, 0 },
-	{ "XGM_EPIO_DATA1", 0x8c4, 0 },
-	{ "XGM_EPIO_DATA2", 0x8c8, 0 },
-	{ "XGM_EPIO_DATA3", 0x8cc, 0 },
-	{ "XGM_EPIO_OP", 0x8d0, 0 },
-		{ "PIO_Ready", 31, 1 },
-		{ "PIO_WrRd", 24, 1 },
-		{ "PIO_Address", 0, 8 },
-	{ "XGM_INT_ENABLE", 0x8d4, 0 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBISTErr", 8, 4 },
-		{ "SERDESLowSigChange", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_INT_CAUSE", 0x8d8, 0 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBISTErr", 8, 4 },
-		{ "SERDESLowSigChange", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_XAUI_ACT_CTRL", 0x8dc, 0 },
-		{ "TxEn", 1, 1 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_SERDES_CTRL0", 0x8e0, 0 },
-		{ "IntSerLPBK3", 27, 1 },
-		{ "IntSerLPBK2", 26, 1 },
-		{ "IntSerLPBK1", 25, 1 },
-		{ "IntSerLPBK0", 24, 1 },
-		{ "Reset3", 23, 1 },
-		{ "Reset2", 22, 1 },
-		{ "Reset1", 21, 1 },
-		{ "Reset0", 20, 1 },
-		{ "Pwrdn3", 19, 1 },
-		{ "Pwrdn2", 18, 1 },
-		{ "Pwrdn1", 17, 1 },
-		{ "Pwrdn0", 16, 1 },
-		{ "ResetPLL23", 15, 1 },
-		{ "ResetPLL01", 14, 1 },
-		{ "PW23", 12, 2 },
-		{ "PW01", 10, 2 },
-		{ "Deq", 6, 4 },
-		{ "Dtx", 2, 4 },
-		{ "LoDrv", 1, 1 },
-		{ "HiDrv", 0, 1 },
-	{ "XGM_SERDES_CTRL1", 0x8e4, 0 },
-		{ "FmOffset3", 19, 5 },
-		{ "FmOffsetEn3", 18, 1 },
-		{ "FmOffset2", 13, 5 },
-		{ "FmOffsetEn2", 12, 1 },
-		{ "FmOffset1", 7, 5 },
-		{ "FmOffsetEn1", 6, 1 },
-		{ "FmOffset0", 1, 5 },
-		{ "FmOffsetEn0", 0, 1 },
-	{ "XGM_SERDES_CTRL2", 0x8e8, 0 },
-		{ "DnIn3", 11, 1 },
-		{ "UpIn3", 10, 1 },
-		{ "RxSlave3", 9, 1 },
-		{ "DnIn2", 8, 1 },
-		{ "UpIn2", 7, 1 },
-		{ "RxSlave2", 6, 1 },
-		{ "DnIn1", 5, 1 },
-		{ "UpIn1", 4, 1 },
-		{ "RxSlave1", 3, 1 },
-		{ "DnIn0", 2, 1 },
-		{ "UpIn0", 1, 1 },
-		{ "RxSlave0", 0, 1 },
-	{ "XGM_SERDES_CTRL3", 0x8ec, 0 },
-		{ "ExtBISTChkErrClr3", 31, 1 },
-		{ "ExtBISTChkEn3", 30, 1 },
-		{ "ExtBISTGenEn3", 29, 1 },
-		{ "ExtBISTPat3", 26, 3 },
-		{ "ExtParReset3", 25, 1 },
-		{ "ExtParLPBK3", 24, 1 },
-		{ "ExtBISTChkErrClr2", 23, 1 },
-		{ "ExtBISTChkEn2", 22, 1 },
-		{ "ExtBISTGenEn2", 21, 1 },
-		{ "ExtBISTPat2", 18, 3 },
-		{ "ExtParReset2", 17, 1 },
-		{ "ExtParLPBK2", 16, 1 },
-		{ "ExtBISTChkErrClr1", 15, 1 },
-		{ "ExtBISTChkEn1", 14, 1 },
-		{ "ExtBISTGenEn1", 13, 1 },
-		{ "ExtBISTPat1", 10, 3 },
-		{ "ExtParReset1", 9, 1 },
-		{ "ExtParLPBK1", 8, 1 },
-		{ "ExtBISTChkErrClr0", 7, 1 },
-		{ "ExtBISTChkEn0", 6, 1 },
-		{ "ExtBISTGenEn0", 5, 1 },
-		{ "ExtBISTPat0", 2, 3 },
-		{ "ExtParReset0", 1, 1 },
-		{ "ExtParLPBK0", 0, 1 },
-	{ "XGM_SERDES_STAT0", 0x8f0, 0 },
-		{ "ExtBISTChkErrCnt0", 4, 24 },
-		{ "ExtBISTChkFmd0", 3, 1 },
-		{ "LowSig0", 0, 1 },
-	{ "XGM_SERDES_STAT1", 0x8f4, 0 },
-		{ "ExtBISTChkErrCnt1", 4, 24 },
-		{ "ExtBISTChkFmd1", 3, 1 },
-		{ "LowSig1", 0, 1 },
-	{ "XGM_SERDES_STAT2", 0x8f8, 0 },
-		{ "ExtBISTChkErrCnt2", 4, 24 },
-		{ "ExtBISTChkFmd2", 3, 1 },
-		{ "LowSig2", 0, 1 },
-	{ "XGM_SERDES_STAT3", 0x8fc, 0 },
-		{ "ExtBISTChkErrCnt3", 4, 24 },
-		{ "ExtBISTChkFmd3", 3, 1 },
-		{ "LowSig3", 0, 1 },
-	{ "XGM_STAT_TX_BYTE_LOW", 0x900, 0 },
-	{ "XGM_STAT_TX_BYTE_HIGH", 0x904, 0 },
-		{ "TxBytes_high", 0, 13 },
-	{ "XGM_STAT_TX_FRAME_LOW", 0x908, 0 },
-	{ "XGM_STAT_TX_FRAME_HIGH", 0x90c, 0 },
-		{ "TxFrames_high", 0, 4 },
-	{ "XGM_STAT_TX_BCAST", 0x910, 0 },
-	{ "XGM_STAT_TX_MCAST", 0x914, 0 },
-	{ "XGM_STAT_TX_PAUSE", 0x918, 0 },
-	{ "XGM_STAT_TX_64B_FRAMES", 0x91c, 0 },
-	{ "XGM_STAT_TX_65_127B_FRAMES", 0x920, 0 },
-	{ "XGM_STAT_TX_128_255B_FRAMES", 0x924, 0 },
-	{ "XGM_STAT_TX_256_511B_FRAMES", 0x928, 0 },
-	{ "XGM_STAT_TX_512_1023B_FRAMES", 0x92c, 0 },
-	{ "XGM_STAT_TX_1024_1518B_FRAMES", 0x930, 0 },
-	{ "XGM_STAT_TX_1519_MAXB_FRAMES", 0x934, 0 },
-	{ "XGM_STAT_TX_ERR_FRAMES", 0x938, 0 },
-	{ "XGM_STAT_RX_BYTES_LOW", 0x93c, 0 },
-	{ "XGM_STAT_RX_BYTES_HIGH", 0x940, 0 },
-		{ "RxBytes_high", 0, 13 },
-	{ "XGM_STAT_RX_FRAMES_LOW", 0x944, 0 },
-	{ "XGM_STAT_RX_FRAMES_HIGH", 0x948, 0 },
-		{ "RxFrames_high", 0, 4 },
-	{ "XGM_STAT_RX_BCAST_FRAMES", 0x94c, 0 },
-	{ "XGM_STAT_RX_MCAST_FRAMES", 0x950, 0 },
-	{ "XGM_STAT_RX_PAUSE_FRAMES", 0x954, 0 },
-		{ "RxPauseFrames", 0, 16 },
-	{ "XGM_STAT_RX_64B_FRAMES", 0x958, 0 },
-	{ "XGM_STAT_RX_65_127B_FRAMES", 0x95c, 0 },
-	{ "XGM_STAT_RX_128_255B_FRAMES", 0x960, 0 },
-	{ "XGM_STAT_RX_256_511B_FRAMES", 0x964, 0 },
-	{ "XGM_STAT_RX_512_1023B_FRAMES", 0x968, 0 },
-	{ "XGM_STAT_RX_1024_1518B_FRAMES", 0x96c, 0 },
-	{ "XGM_STAT_RX_1519_MAXB_FRAMES", 0x970, 0 },
-	{ "XGM_STAT_RX_SHORT_FRAMES", 0x974, 0 },
-		{ "RxShortFrames", 0, 16 },
-	{ "XGM_STAT_RX_OVERSIZE_FRAMES", 0x978, 0 },
-		{ "RxOversizeFrames", 0, 16 },
-	{ "XGM_STAT_RX_JABBER_FRAMES", 0x97c, 0 },
-		{ "RxJabberFrames", 0, 16 },
-	{ "XGM_STAT_RX_CRC_ERR_FRAMES", 0x980, 0 },
-		{ "RxCRCErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x984, 0 },
-		{ "RxLengthErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x988, 0 },
-		{ "RxSymCodeErrFrames", 0, 16 },
-	{ "XGM_XAUI_PCS_ERR", 0x998, 0 },
-		{ "PCS_SyncStatus", 5, 4 },
-		{ "PCS_CTCFIFOErr", 1, 4 },
-		{ "PCS_NotAligned", 0, 1 },
-	{ "XGM_RGMII_STATUS", 0x99c, 0 },
-		{ "GMIIDuplex", 3, 1 },
-		{ "GMIISpeed", 1, 2 },
-		{ "GMIILinkStatus", 0, 1 },
-	{ "XGM_WOL_STATUS", 0x9a0, 0 },
-		{ "PatDetected", 31, 1 },
-		{ "MatchedFilter", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0x9a4, 0 },
-	{ "XGM_TX_SPI4_SOP_EOP_CNT", 0x9a8, 0 },
-		{ "TxSPI4SopCnt", 16, 16 },
-		{ "TxSPI4EopCnt", 0, 16 },
-	{ "XGM_RX_SPI4_SOP_EOP_CNT", 0x9ac, 0 },
-		{ "RxSPI4SopCnt", 16, 16 },
-		{ "RxSPI4EopCnt", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3b_xgmac0_1_regs[] = {
-	{ "XGM_TX_CTRL", 0xa00, 0 },
-		{ "SendPause", 2, 1 },
-		{ "SendZeroPause", 1, 1 },
-		{ "TxEn", 0, 1 },
-	{ "XGM_TX_CFG", 0xa04, 0 },
-		{ "CfgClkSpeed", 2, 3 },
-		{ "StretchMode", 1, 1 },
-		{ "TxPauseEn", 0, 1 },
-	{ "XGM_TX_PAUSE_QUANTA", 0xa08, 0 },
-		{ "TxPauseQuanta", 0, 16 },
-	{ "XGM_RX_CTRL", 0xa0c, 0 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_RX_CFG", 0xa10, 0 },
-		{ "Con802_3Preamble", 12, 1 },
-		{ "EnNon802_3Preamble", 11, 1 },
-		{ "CopyPreamble", 10, 1 },
-		{ "DisPauseFrames", 9, 1 },
-		{ "En1536BFrames", 8, 1 },
-		{ "EnJumbo", 7, 1 },
-		{ "RmFCS", 6, 1 },
-		{ "DisNonVlan", 5, 1 },
-		{ "EnExtMatch", 4, 1 },
-		{ "EnHashUcast", 3, 1 },
-		{ "EnHashMcast", 2, 1 },
-		{ "DisBCast", 1, 1 },
-		{ "CopyAllFrames", 0, 1 },
-	{ "XGM_RX_HASH_LOW", 0xa14, 0 },
-	{ "XGM_RX_HASH_HIGH", 0xa18, 0 },
-	{ "XGM_RX_EXACT_MATCH_LOW_1", 0xa1c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_1", 0xa20, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_2", 0xa24, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_2", 0xa28, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_3", 0xa2c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_3", 0xa30, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_4", 0xa34, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_4", 0xa38, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_5", 0xa3c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_5", 0xa40, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_6", 0xa44, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_6", 0xa48, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_7", 0xa4c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_7", 0xa50, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_8", 0xa54, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_8", 0xa58, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_1", 0xa5c, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_2", 0xa60, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_3", 0xa64, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_4", 0xa68, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_INT_STATUS", 0xa6c, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_MASK", 0xa70, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_ENABLE", 0xa74, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_DISABLE", 0xa78, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_TX_PAUSE_TIMER", 0xa7c, 0 },
-		{ "CurPauseTimer", 0, 16 },
-	{ "XGM_STAT_CTRL", 0xa80, 0 },
-		{ "ReadSnpShot", 4, 1 },
-		{ "TakeSnpShot", 3, 1 },
-		{ "ClrStats", 2, 1 },
-		{ "IncrStats", 1, 1 },
-		{ "EnTestModeWr", 0, 1 },
-	{ "XGM_RXFIFO_CFG", 0xa84, 0 },
-		{ "RxFIFOPauseHWM", 17, 12 },
-		{ "RxFIFOPauseLWM", 5, 12 },
-		{ "ForcedPause", 4, 1 },
-		{ "ExternLoopback", 3, 1 },
-		{ "RxByteSwap", 2, 1 },
-		{ "RxStrFrwrd", 1, 1 },
-		{ "DisErrFrames", 0, 1 },
-	{ "XGM_TXFIFO_CFG", 0xa88, 0 },
-		{ "EnDropPkt", 21, 1 },
-		{ "TxIPG", 13, 8 },
-		{ "TxFIFOThresh", 4, 9 },
-		{ "InternLoopback", 3, 1 },
-		{ "TxByteSwap", 2, 1 },
-		{ "DisCRC", 1, 1 },
-		{ "DisPreAmble", 0, 1 },
-	{ "XGM_SLOW_TIMER", 0xa8c, 0 },
-		{ "PauseSlowTimerEn", 31, 1 },
-		{ "PauseSlowTimer", 0, 20 },
-	{ "XGM_PAUSE_TIMER", 0xa90, 0 },
-		{ "PauseTimer", 0, 20 },
-	{ "XGM_XAUI_PCS_TEST", 0xa94, 0 },
-		{ "TestPattern", 1, 2 },
-		{ "EnTest", 0, 1 },
-	{ "XGM_RGMII_CTRL", 0xa98, 0 },
-		{ "PhAlignFIFOThresh", 1, 2 },
-		{ "TxClk90Shift", 0, 1 },
-	{ "XGM_RGMII_IMP", 0xa9c, 0 },
-		{ "CalReset", 8, 1 },
-		{ "CalUpdate", 7, 1 },
-		{ "ImpSetUpdate", 6, 1 },
-		{ "RGMIIImpPD", 3, 3 },
-		{ "RGMIIImpPU", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE", 0xaa8, 0 },
-		{ "RxMaxPktSize", 0, 14 },
-	{ "XGM_RESET_CTRL", 0xaac, 0 },
-		{ "XG2G_Reset_", 3, 1 },
-		{ "RGMII_Reset_", 2, 1 },
-		{ "PCS_Reset_", 1, 1 },
-		{ "MAC_Reset_", 0, 1 },
-	{ "XGM_XAUI1G_CTRL", 0xab0, 0 },
-		{ "XAUI1GLinkId", 0, 2 },
-	{ "XGM_SERDES_LANE_CTRL", 0xab4, 0 },
-		{ "LaneReversal", 8, 1 },
-		{ "TxPolarity", 4, 4 },
-		{ "RxPolarity", 0, 4 },
-	{ "XGM_PORT_CFG", 0xab8, 0 },
-		{ "SafeSpeedChange", 4, 1 },
-		{ "ClkDivReset_", 3, 1 },
-		{ "PortSpeed", 1, 2 },
-		{ "EnRGMII", 0, 1 },
-	{ "XGM_EPIO_DATA0", 0xac0, 0 },
-	{ "XGM_EPIO_DATA1", 0xac4, 0 },
-	{ "XGM_EPIO_DATA2", 0xac8, 0 },
-	{ "XGM_EPIO_DATA3", 0xacc, 0 },
-	{ "XGM_EPIO_OP", 0xad0, 0 },
-		{ "PIO_Ready", 31, 1 },
-		{ "PIO_WrRd", 24, 1 },
-		{ "PIO_Address", 0, 8 },
-	{ "XGM_INT_ENABLE", 0xad4, 0 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBISTErr", 8, 4 },
-		{ "SERDESLowSigChange", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_INT_CAUSE", 0xad8, 0 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBISTErr", 8, 4 },
-		{ "SERDESLowSigChange", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_XAUI_ACT_CTRL", 0xadc, 0 },
-		{ "TxEn", 1, 1 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_SERDES_CTRL0", 0xae0, 0 },
-		{ "IntSerLPBK3", 27, 1 },
-		{ "IntSerLPBK2", 26, 1 },
-		{ "IntSerLPBK1", 25, 1 },
-		{ "IntSerLPBK0", 24, 1 },
-		{ "Reset3", 23, 1 },
-		{ "Reset2", 22, 1 },
-		{ "Reset1", 21, 1 },
-		{ "Reset0", 20, 1 },
-		{ "Pwrdn3", 19, 1 },
-		{ "Pwrdn2", 18, 1 },
-		{ "Pwrdn1", 17, 1 },
-		{ "Pwrdn0", 16, 1 },
-		{ "ResetPLL23", 15, 1 },
-		{ "ResetPLL01", 14, 1 },
-		{ "PW23", 12, 2 },
-		{ "PW01", 10, 2 },
-		{ "Deq", 6, 4 },
-		{ "Dtx", 2, 4 },
-		{ "LoDrv", 1, 1 },
-		{ "HiDrv", 0, 1 },
-	{ "XGM_SERDES_CTRL1", 0xae4, 0 },
-		{ "FmOffset3", 19, 5 },
-		{ "FmOffsetEn3", 18, 1 },
-		{ "FmOffset2", 13, 5 },
-		{ "FmOffsetEn2", 12, 1 },
-		{ "FmOffset1", 7, 5 },
-		{ "FmOffsetEn1", 6, 1 },
-		{ "FmOffset0", 1, 5 },
-		{ "FmOffsetEn0", 0, 1 },
-	{ "XGM_SERDES_CTRL2", 0xae8, 0 },
-		{ "DnIn3", 11, 1 },
-		{ "UpIn3", 10, 1 },
-		{ "RxSlave3", 9, 1 },
-		{ "DnIn2", 8, 1 },
-		{ "UpIn2", 7, 1 },
-		{ "RxSlave2", 6, 1 },
-		{ "DnIn1", 5, 1 },
-		{ "UpIn1", 4, 1 },
-		{ "RxSlave1", 3, 1 },
-		{ "DnIn0", 2, 1 },
-		{ "UpIn0", 1, 1 },
-		{ "RxSlave0", 0, 1 },
-	{ "XGM_SERDES_CTRL3", 0xaec, 0 },
-		{ "ExtBISTChkErrClr3", 31, 1 },
-		{ "ExtBISTChkEn3", 30, 1 },
-		{ "ExtBISTGenEn3", 29, 1 },
-		{ "ExtBISTPat3", 26, 3 },
-		{ "ExtParReset3", 25, 1 },
-		{ "ExtParLPBK3", 24, 1 },
-		{ "ExtBISTChkErrClr2", 23, 1 },
-		{ "ExtBISTChkEn2", 22, 1 },
-		{ "ExtBISTGenEn2", 21, 1 },
-		{ "ExtBISTPat2", 18, 3 },
-		{ "ExtParReset2", 17, 1 },
-		{ "ExtParLPBK2", 16, 1 },
-		{ "ExtBISTChkErrClr1", 15, 1 },
-		{ "ExtBISTChkEn1", 14, 1 },
-		{ "ExtBISTGenEn1", 13, 1 },
-		{ "ExtBISTPat1", 10, 3 },
-		{ "ExtParReset1", 9, 1 },
-		{ "ExtParLPBK1", 8, 1 },
-		{ "ExtBISTChkErrClr0", 7, 1 },
-		{ "ExtBISTChkEn0", 6, 1 },
-		{ "ExtBISTGenEn0", 5, 1 },
-		{ "ExtBISTPat0", 2, 3 },
-		{ "ExtParReset0", 1, 1 },
-		{ "ExtParLPBK0", 0, 1 },
-	{ "XGM_SERDES_STAT0", 0xaf0, 0 },
-		{ "ExtBISTChkErrCnt0", 4, 24 },
-		{ "ExtBISTChkFmd0", 3, 1 },
-		{ "LowSig0", 0, 1 },
-	{ "XGM_SERDES_STAT1", 0xaf4, 0 },
-		{ "ExtBISTChkErrCnt1", 4, 24 },
-		{ "ExtBISTChkFmd1", 3, 1 },
-		{ "LowSig1", 0, 1 },
-	{ "XGM_SERDES_STAT2", 0xaf8, 0 },
-		{ "ExtBISTChkErrCnt2", 4, 24 },
-		{ "ExtBISTChkFmd2", 3, 1 },
-		{ "LowSig2", 0, 1 },
-	{ "XGM_SERDES_STAT3", 0xafc, 0 },
-		{ "ExtBISTChkErrCnt3", 4, 24 },
-		{ "ExtBISTChkFmd3", 3, 1 },
-		{ "LowSig3", 0, 1 },
-	{ "XGM_STAT_TX_BYTE_LOW", 0xb00, 0 },
-	{ "XGM_STAT_TX_BYTE_HIGH", 0xb04, 0 },
-		{ "TxBytes_high", 0, 13 },
-	{ "XGM_STAT_TX_FRAME_LOW", 0xb08, 0 },
-	{ "XGM_STAT_TX_FRAME_HIGH", 0xb0c, 0 },
-		{ "TxFrames_high", 0, 4 },
-	{ "XGM_STAT_TX_BCAST", 0xb10, 0 },
-	{ "XGM_STAT_TX_MCAST", 0xb14, 0 },
-	{ "XGM_STAT_TX_PAUSE", 0xb18, 0 },
-	{ "XGM_STAT_TX_64B_FRAMES", 0xb1c, 0 },
-	{ "XGM_STAT_TX_65_127B_FRAMES", 0xb20, 0 },
-	{ "XGM_STAT_TX_128_255B_FRAMES", 0xb24, 0 },
-	{ "XGM_STAT_TX_256_511B_FRAMES", 0xb28, 0 },
-	{ "XGM_STAT_TX_512_1023B_FRAMES", 0xb2c, 0 },
-	{ "XGM_STAT_TX_1024_1518B_FRAMES", 0xb30, 0 },
-	{ "XGM_STAT_TX_1519_MAXB_FRAMES", 0xb34, 0 },
-	{ "XGM_STAT_TX_ERR_FRAMES", 0xb38, 0 },
-	{ "XGM_STAT_RX_BYTES_LOW", 0xb3c, 0 },
-	{ "XGM_STAT_RX_BYTES_HIGH", 0xb40, 0 },
-		{ "RxBytes_high", 0, 13 },
-	{ "XGM_STAT_RX_FRAMES_LOW", 0xb44, 0 },
-	{ "XGM_STAT_RX_FRAMES_HIGH", 0xb48, 0 },
-		{ "RxFrames_high", 0, 4 },
-	{ "XGM_STAT_RX_BCAST_FRAMES", 0xb4c, 0 },
-	{ "XGM_STAT_RX_MCAST_FRAMES", 0xb50, 0 },
-	{ "XGM_STAT_RX_PAUSE_FRAMES", 0xb54, 0 },
-		{ "RxPauseFrames", 0, 16 },
-	{ "XGM_STAT_RX_64B_FRAMES", 0xb58, 0 },
-	{ "XGM_STAT_RX_65_127B_FRAMES", 0xb5c, 0 },
-	{ "XGM_STAT_RX_128_255B_FRAMES", 0xb60, 0 },
-	{ "XGM_STAT_RX_256_511B_FRAMES", 0xb64, 0 },
-	{ "XGM_STAT_RX_512_1023B_FRAMES", 0xb68, 0 },
-	{ "XGM_STAT_RX_1024_1518B_FRAMES", 0xb6c, 0 },
-	{ "XGM_STAT_RX_1519_MAXB_FRAMES", 0xb70, 0 },
-	{ "XGM_STAT_RX_SHORT_FRAMES", 0xb74, 0 },
-		{ "RxShortFrames", 0, 16 },
-	{ "XGM_STAT_RX_OVERSIZE_FRAMES", 0xb78, 0 },
-		{ "RxOversizeFrames", 0, 16 },
-	{ "XGM_STAT_RX_JABBER_FRAMES", 0xb7c, 0 },
-		{ "RxJabberFrames", 0, 16 },
-	{ "XGM_STAT_RX_CRC_ERR_FRAMES", 0xb80, 0 },
-		{ "RxCRCErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0xb84, 0 },
-		{ "RxLengthErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0xb88, 0 },
-		{ "RxSymCodeErrFrames", 0, 16 },
-	{ "XGM_XAUI_PCS_ERR", 0xb98, 0 },
-		{ "PCS_SyncStatus", 5, 4 },
-		{ "PCS_CTCFIFOErr", 1, 4 },
-		{ "PCS_NotAligned", 0, 1 },
-	{ "XGM_RGMII_STATUS", 0xb9c, 0 },
-		{ "GMIIDuplex", 3, 1 },
-		{ "GMIISpeed", 1, 2 },
-		{ "GMIILinkStatus", 0, 1 },
-	{ "XGM_WOL_STATUS", 0xba0, 0 },
-		{ "PatDetected", 31, 1 },
-		{ "MatchedFilter", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0xba4, 0 },
-	{ "XGM_TX_SPI4_SOP_EOP_CNT", 0xba8, 0 },
-		{ "TxSPI4SopCnt", 16, 16 },
-		{ "TxSPI4EopCnt", 0, 16 },
-	{ "XGM_RX_SPI4_SOP_EOP_CNT", 0xbac, 0 },
-		{ "RxSPI4SopCnt", 16, 16 },
-		{ "RxSPI4EopCnt", 0, 16 },
-	{ NULL, 0, 0 }
-};
diff --git a/usr.sbin/cxgbtool/reg_defs_t3c.c b/usr.sbin/cxgbtool/reg_defs_t3c.c
deleted file mode 100644
index b9181b6..0000000
--- a/usr.sbin/cxgbtool/reg_defs_t3c.c
+++ /dev/null
@@ -1,3119 +0,0 @@
-/*
- * $FreeBSD$
- */
-
-/* This file is automatically generated --- do not edit */
-
-struct reg_info t3c_sge3_regs[] = {
-	{ "SG_CONTROL", 0x0, 0 },
-		{ "CongMode", 29, 1 },
-		{ "TnlFLMode", 28, 1 },
-		{ "FatlPerrEn", 27, 1 },
-		{ "UrgTnl", 26, 1 },
-		{ "NewNotify", 25, 1 },
-		{ "AvoidCqOvfl", 24, 1 },
-		{ "OptOneIntMultQ", 23, 1 },
-		{ "CQCrdtCtrl", 22, 1 },
-		{ "EgrEnUpBp", 21, 1 },
-		{ "DropPkt", 20, 1 },
-		{ "EgrGenCtrl", 19, 1 },
-		{ "UserSpaceSize", 14, 5 },
-		{ "HostPageSize", 11, 3 },
-		{ "PCIRelax", 10, 1 },
-		{ "FLMode", 9, 1 },
-		{ "PktShift", 6, 3 },
-		{ "OneIntMultQ", 5, 1 },
-		{ "FLPickAvail", 4, 1 },
-		{ "BigEndianEgress", 3, 1 },
-		{ "BigEndianIngress", 2, 1 },
-		{ "IscsiCoalescing", 1, 1 },
-		{ "GlobalEnable", 0, 1 },
-	{ "SG_KDOORBELL", 0x4, 0 },
-		{ "SelEgrCntx", 31, 1 },
-		{ "EgrCntx", 0, 16 },
-	{ "SG_GTS", 0x8, 0 },
-		{ "RspQ", 29, 3 },
-		{ "NewTimer", 16, 13 },
-		{ "NewIndex", 0, 16 },
-	{ "SG_CONTEXT_CMD", 0xc, 0 },
-		{ "Opcode", 28, 4 },
-		{ "Busy", 27, 1 },
-		{ "CQ_credit", 20, 7 },
-		{ "CQ", 19, 1 },
-		{ "RspQ", 18, 1 },
-		{ "Egress", 17, 1 },
-		{ "FreeList", 16, 1 },
-		{ "Context", 0, 16 },
-	{ "SG_CONTEXT_DATA0", 0x10, 0 },
-	{ "SG_CONTEXT_DATA1", 0x14, 0 },
-	{ "SG_CONTEXT_DATA2", 0x18, 0 },
-	{ "SG_CONTEXT_DATA3", 0x1c, 0 },
-	{ "SG_CONTEXT_MASK0", 0x20, 0 },
-	{ "SG_CONTEXT_MASK1", 0x24, 0 },
-	{ "SG_CONTEXT_MASK2", 0x28, 0 },
-	{ "SG_CONTEXT_MASK3", 0x2c, 0 },
-	{ "SG_RSPQ_CREDIT_RETURN", 0x30, 0 },
-		{ "RspQ", 29, 3 },
-		{ "Data", 0, 16 },
-	{ "SG_DATA_INTR", 0x34, 0 },
-		{ "ErrIntr", 31, 1 },
-		{ "DataIntr", 0, 8 },
-	{ "SG_HI_DRB_HI_THRSH", 0x38, 0 },
-		{ "HiDrbHiThrsh", 0, 10 },
-	{ "SG_HI_DRB_LO_THRSH", 0x3c, 0 },
-		{ "HiDrbLoThrsh", 0, 10 },
-	{ "SG_LO_DRB_HI_THRSH", 0x40, 0 },
-		{ "LoDrbHiThrsh", 0, 10 },
-	{ "SG_LO_DRB_LO_THRSH", 0x44, 0 },
-		{ "LoDrbLoThrsh", 0, 10 },
-	{ "SG_ONE_INT_MULT_Q_COALESCING_TIMER", 0x48, 0 },
-	{ "SG_RSPQ_FL_STATUS", 0x4c, 0 },
-		{ "RspQ0Starved", 0, 1 },
-		{ "RspQ1Starved", 1, 1 },
-		{ "RspQ2Starved", 2, 1 },
-		{ "RspQ3Starved", 3, 1 },
-		{ "RspQ4Starved", 4, 1 },
-		{ "RspQ5Starved", 5, 1 },
-		{ "RspQ6Starved", 6, 1 },
-		{ "RspQ7Starved", 7, 1 },
-		{ "RspQ0Disabled", 8, 1 },
-		{ "RspQ1Disabled", 9, 1 },
-		{ "RspQ2Disabled", 10, 1 },
-		{ "RspQ3Disabled", 11, 1 },
-		{ "RspQ4Disabled", 12, 1 },
-		{ "RspQ5Disabled", 13, 1 },
-		{ "RspQ6Disabled", 14, 1 },
-		{ "RspQ7Disabled", 15, 1 },
-		{ "FL0Empty", 16, 1 },
-		{ "FL1Empty", 17, 1 },
-		{ "FL2Empty", 18, 1 },
-		{ "FL3Empty", 19, 1 },
-		{ "FL4Empty", 20, 1 },
-		{ "FL5Empty", 21, 1 },
-		{ "FL6Empty", 22, 1 },
-		{ "FL7Empty", 23, 1 },
-		{ "FL8Empty", 24, 1 },
-		{ "FL9Empty", 25, 1 },
-		{ "FL10Empty", 26, 1 },
-		{ "FL11Empty", 27, 1 },
-		{ "FL12Empty", 28, 1 },
-		{ "FL13Empty", 29, 1 },
-		{ "FL14Empty", 30, 1 },
-		{ "FL15Empty", 31, 1 },
-	{ "SG_EGR_PRI_CNT", 0x50, 0 },
-		{ "EgrErrOpCode", 24, 8 },
-		{ "EgrHiOpCode", 16, 8 },
-		{ "EgrLoOpCode", 8, 8 },
-		{ "EgrPriCnt", 0, 5 },
-	{ "SG_EGR_RCQ_DRB_THRSH", 0x54, 0 },
-		{ "HiRcqDrbThrsh", 16, 11 },
-		{ "LoRcqDrbThrsh", 0, 11 },
-	{ "SG_EGR_CNTX_BADDR", 0x58, 0 },
-		{ "EgrCntxBAddr", 5, 27 },
-	{ "SG_INT_CAUSE", 0x5c, 0 },
-		{ "HiRcqParityError", 31, 1 },
-		{ "LoRcqParityError", 30, 1 },
-		{ "HiDrbParityError", 29, 1 },
-		{ "LoDrbParityError", 28, 1 },
-		{ "FlParityError", 22, 6 },
-		{ "ItParityError", 20, 2 },
-		{ "IrParityError", 19, 1 },
-		{ "RcParityError", 18, 1 },
-		{ "OcParityError", 17, 1 },
-		{ "CpParityError", 16, 1 },
-		{ "R_Req_FramingError", 15, 1 },
-		{ "UC_Req_FramingError", 14, 1 },
-		{ "HiCtlDrbDropErr", 13, 1 },
-		{ "LoCtlDrbDropErr", 12, 1 },
-		{ "HiPioDrbDropErr", 11, 1 },
-		{ "LoPioDrbDropErr", 10, 1 },
-		{ "HiCrdtUndFlowErr", 9, 1 },
-		{ "LoCrdtUndFlowErr", 8, 1 },
-		{ "HiPriorityDBFull", 7, 1 },
-		{ "HiPriorityDBEmpty", 6, 1 },
-		{ "LoPriorityDBFull", 5, 1 },
-		{ "LoPriorityDBEmpty", 4, 1 },
-		{ "RspQDisabled", 3, 1 },
-		{ "RspQCreditOverfow", 2, 1 },
-		{ "FlEmpty", 1, 1 },
-		{ "RspQStarve", 0, 1 },
-	{ "SG_INT_ENABLE", 0x60, 0 },
-		{ "HiRcqParityError", 31, 1 },
-		{ "LoRcqParityError", 30, 1 },
-		{ "HiDrbParityError", 29, 1 },
-		{ "LoDrbParityError", 28, 1 },
-		{ "FlParityError", 22, 6 },
-		{ "ItParityError", 20, 2 },
-		{ "IrParityError", 19, 1 },
-		{ "RcParityError", 18, 1 },
-		{ "OcParityError", 17, 1 },
-		{ "CpParityError", 16, 1 },
-		{ "R_Req_FramingError", 15, 1 },
-		{ "UC_Req_FramingError", 14, 1 },
-		{ "HiCtlDrbDropErr", 13, 1 },
-		{ "LoCtlDrbDropErr", 12, 1 },
-		{ "HiPioDrbDropErr", 11, 1 },
-		{ "LoPioDrbDropErr", 10, 1 },
-		{ "HiCrdtUndFlowErr", 9, 1 },
-		{ "LoCrdtUndFlowErr", 8, 1 },
-		{ "HiPriorityDBFull", 7, 1 },
-		{ "HiPriorityDBEmpty", 6, 1 },
-		{ "LoPriorityDBFull", 5, 1 },
-		{ "LoPriorityDBEmpty", 4, 1 },
-		{ "RspQDisabled", 3, 1 },
-		{ "RspQCreditOverfow", 2, 1 },
-		{ "FlEmpty", 1, 1 },
-		{ "RspQStarve", 0, 1 },
-	{ "SG_CMDQ_CREDIT_TH", 0x64, 0 },
-		{ "Timeout", 8, 24 },
-		{ "Threshold", 0, 8 },
-	{ "SG_TIMER_TICK", 0x68, 0 },
-	{ "SG_CQ_CONTEXT_BADDR", 0x6c, 0 },
-		{ "baseAddr", 5, 27 },
-	{ "SG_OCO_BASE", 0x70, 0 },
-		{ "Base1", 16, 16 },
-		{ "Base0", 0, 16 },
-	{ "SG_DRB_PRI_THRESH", 0x74, 0 },
-		{ "DrbPriThrsh", 0, 16 },
-	{ "SG_DEBUG_INDEX", 0x78, 0 },
-	{ "SG_DEBUG_DATA", 0x7c, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_pcix1_regs[] = {
-	{ "PCIX_INT_ENABLE", 0x80, 0 },
-		{ "MSIXParErr", 22, 3 },
-		{ "CFParErr", 18, 4 },
-		{ "RFParErr", 14, 4 },
-		{ "WFParErr", 12, 2 },
-		{ "PIOParErr", 11, 1 },
-		{ "DetUncECCErr", 10, 1 },
-		{ "DetCorECCErr", 9, 1 },
-		{ "RcvSplCmpErr", 8, 1 },
-		{ "UnxSplCmp", 7, 1 },
-		{ "SplCmpDis", 6, 1 },
-		{ "DetParErr", 5, 1 },
-		{ "SigSysErr", 4, 1 },
-		{ "RcvMstAbt", 3, 1 },
-		{ "RcvTarAbt", 2, 1 },
-		{ "SigTarAbt", 1, 1 },
-		{ "MstDetParErr", 0, 1 },
-	{ "PCIX_INT_CAUSE", 0x84, 0 },
-		{ "MSIXParErr", 22, 3 },
-		{ "CFParErr", 18, 4 },
-		{ "RFParErr", 14, 4 },
-		{ "WFParErr", 12, 2 },
-		{ "PIOParErr", 11, 1 },
-		{ "DetUncECCErr", 10, 1 },
-		{ "DetCorECCErr", 9, 1 },
-		{ "RcvSplCmpErr", 8, 1 },
-		{ "UnxSplCmp", 7, 1 },
-		{ "SplCmpDis", 6, 1 },
-		{ "DetParErr", 5, 1 },
-		{ "SigSysErr", 4, 1 },
-		{ "RcvMstAbt", 3, 1 },
-		{ "RcvTarAbt", 2, 1 },
-		{ "SigTarAbt", 1, 1 },
-		{ "MstDetParErr", 0, 1 },
-	{ "PCIX_CFG", 0x88, 0 },
-		{ "DMAStopEn", 19, 1 },
-		{ "CLIDecEn", 18, 1 },
-		{ "LatTmrDis", 17, 1 },
-		{ "LowPwrEn", 16, 1 },
-		{ "AsyncIntVec", 11, 5 },
-		{ "MaxSplTrnC", 8, 3 },
-		{ "MaxSplTrnR", 5, 3 },
-		{ "MaxWrByteCnt", 3, 2 },
-		{ "WrReqAtomicEn", 2, 1 },
-		{ "CRstWrmMode", 1, 1 },
-		{ "PIOAck64En", 0, 1 },
-	{ "PCIX_MODE", 0x8c, 0 },
-		{ "PClkRange", 6, 2 },
-		{ "PCIXInitPat", 2, 4 },
-		{ "66MHz", 1, 1 },
-		{ "64Bit", 0, 1 },
-	{ "PCIX_CAL", 0x90, 0 },
-		{ "Busy", 31, 1 },
-		{ "PerCalDiv", 22, 8 },
-		{ "PerCalEn", 21, 1 },
-		{ "SglCalEn", 20, 1 },
-		{ "ZInUpdMode", 19, 1 },
-		{ "ZInSel", 18, 1 },
-		{ "ZPDMan", 15, 3 },
-		{ "ZPUMan", 12, 3 },
-		{ "ZPDOut", 9, 3 },
-		{ "ZPUOut", 6, 3 },
-		{ "ZPDIn", 3, 3 },
-		{ "ZPUIn", 0, 3 },
-	{ "PCIX_WOL", 0x94, 0 },
-		{ "WakeUp1", 3, 1 },
-		{ "WakeUp0", 2, 1 },
-		{ "SleepMode1", 1, 1 },
-		{ "SleepMode0", 0, 1 },
-	{ "PCIX_STAT0", 0x98, 0 },
-		{ "PIOReqFifoLevel", 26, 6 },
-		{ "RFIniSt", 24, 2 },
-		{ "RFRespRdSt", 22, 2 },
-		{ "TarCSt", 19, 3 },
-		{ "TarXSt", 16, 3 },
-		{ "WFReqWrSt", 13, 3 },
-		{ "WFRespFifoEmpty", 12, 1 },
-		{ "WFReqFifoEmpty", 11, 1 },
-		{ "RFRespFifoEmpty", 10, 1 },
-		{ "RFReqFifoEmpty", 9, 1 },
-		{ "PIORespFifoLevel", 7, 2 },
-		{ "CFRespFifoEmpty", 6, 1 },
-		{ "CFReqFifoEmpty", 5, 1 },
-		{ "VPDRespFifoEmpty", 4, 1 },
-		{ "VPDReqFifoEmpty", 3, 1 },
-		{ "PIO_RspPnd", 2, 1 },
-		{ "DlyTrnPnd", 1, 1 },
-		{ "SplTrnPnd", 0, 1 },
-	{ "PCIX_STAT1", 0x9c, 0 },
-		{ "WFIniSt", 26, 4 },
-		{ "ArbSt", 23, 3 },
-		{ "PMISt", 21, 2 },
-		{ "CalSt", 19, 2 },
-		{ "CFReqRdSt", 17, 2 },
-		{ "CFIniSt", 15, 2 },
-		{ "CFRespRdSt", 13, 2 },
-		{ "IniCSt", 10, 3 },
-		{ "IniXSt", 7, 3 },
-		{ "IntSt", 4, 3 },
-		{ "PIOSt", 2, 2 },
-		{ "RFReqRdSt", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_pcie0_regs[] = {
-	{ "PCIE_INT_ENABLE", 0x80, 0 },
-		{ "BISTErr", 19, 8 },
-		{ "TxParErr", 18, 1 },
-		{ "RxParErr", 17, 1 },
-		{ "RetryLUTParErr", 16, 1 },
-		{ "RetryBUFParErr", 15, 1 },
-		{ "MSIXParErr", 12, 3 },
-		{ "CFParErr", 11, 1 },
-		{ "RFParErr", 10, 1 },
-		{ "WFParErr", 9, 1 },
-		{ "PIOParErr", 8, 1 },
-		{ "UnxSplCplErrC", 7, 1 },
-		{ "UnxSplCplErrR", 6, 1 },
-		{ "VPDAddrChng", 5, 1 },
-		{ "BusMstrEn", 4, 1 },
-		{ "PMStChng", 3, 1 },
-		{ "PEXMsg", 2, 1 },
-		{ "ZeroLenRd", 1, 1 },
-		{ "PEXErr", 0, 1 },
-	{ "PCIE_INT_CAUSE", 0x84, 0 },
-		{ "BISTErr", 19, 8 },
-		{ "TxParErr", 18, 1 },
-		{ "RxParErr", 17, 1 },
-		{ "RetryLUTParErr", 16, 1 },
-		{ "RetryBUFParErr", 15, 1 },
-		{ "MSIXParErr", 12, 3 },
-		{ "CFParErr", 11, 1 },
-		{ "RFParErr", 10, 1 },
-		{ "WFParErr", 9, 1 },
-		{ "PIOParErr", 8, 1 },
-		{ "UnxSplCplErrC", 7, 1 },
-		{ "UnxSplCplErrR", 6, 1 },
-		{ "VPDAddrChng", 5, 1 },
-		{ "BusMstrEn", 4, 1 },
-		{ "PMStChng", 3, 1 },
-		{ "PEXMsg", 2, 1 },
-		{ "ZeroLenRd", 1, 1 },
-		{ "PEXErr", 0, 1 },
-	{ "PCIE_CFG", 0x88, 0 },
-		{ "DMAStopEn", 24, 1 },
-		{ "PriorityINTA", 23, 1 },
-		{ "IniFullPkt", 22, 1 },
-		{ "EnableLinkDwnDRst", 21, 1 },
-		{ "EnableLinkDownRst", 20, 1 },
-		{ "EnableHotRst", 19, 1 },
-		{ "IniWaitForGnt", 18, 1 },
-		{ "IniBEDis", 17, 1 },
-		{ "CLIDecEn", 16, 1 },
-		{ "AsyncIntVec", 11, 5 },
-		{ "MaxSplTrnC", 7, 4 },
-		{ "MaxSplTrnR", 1, 6 },
-		{ "CRstWrmMode", 0, 1 },
-	{ "PCIE_MODE", 0x8c, 0 },
-		{ "TAR_State", 29, 3 },
-		{ "RF_StateIni", 26, 3 },
-		{ "CF_StateIni", 23, 3 },
-		{ "PIO_StatePL", 20, 3 },
-		{ "PIO_StateISC", 18, 2 },
-		{ "NumFstTrnSeqRx", 10, 8 },
-		{ "LnkCntlState", 2, 8 },
-		{ "VC0Up", 1, 1 },
-		{ "LnkInitial", 0, 1 },
-	{ "PCIE_STAT", 0x90, 0 },
-		{ "INI_State", 28, 4 },
-		{ "WF_StateIni", 24, 4 },
-		{ "PLM_ReqFIFOCnt", 22, 2 },
-		{ "ER_ReqFIFOEmpty", 21, 1 },
-		{ "WF_RspFIFOEmpty", 20, 1 },
-		{ "WF_ReqFIFOEmpty", 19, 1 },
-		{ "RF_RspFIFOEmpty", 18, 1 },
-		{ "RF_ReqFIFOEmpty", 17, 1 },
-		{ "RF_ActEmpty", 16, 1 },
-		{ "PIO_RspFIFOCnt", 11, 5 },
-		{ "PIO_ReqFIFOCnt", 5, 6 },
-		{ "CF_RspFIFOEmpty", 4, 1 },
-		{ "CF_ReqFIFOEmpty", 3, 1 },
-		{ "CF_ActEmpty", 2, 1 },
-		{ "VPD_RspFIFOEmpty", 1, 1 },
-		{ "VPD_ReqFIFOEmpty", 0, 1 },
-	{ "PCIE_WOL", 0x94, 0 },
-		{ "CF_RspState", 12, 2 },
-		{ "RF_RspState", 10, 2 },
-		{ "PME_State", 7, 3 },
-		{ "INT_State", 4, 3 },
-		{ "WakeUp1", 3, 1 },
-		{ "WakeUp0", 2, 1 },
-		{ "SleepMode1", 1, 1 },
-		{ "SleepMode0", 0, 1 },
-	{ "PCIE_PEX_CTRL0", 0x98, 0 },
-		{ "CplTimeoutRetry", 31, 1 },
-		{ "StrictTSMN", 30, 1 },
-		{ "NumFstTrnSeq", 22, 8 },
-		{ "ReplayLmt", 2, 20 },
-		{ "TxPndChkEn", 1, 1 },
-		{ "CplPndChkEn", 0, 1 },
-	{ "PCIE_PEX_CTRL1", 0x9c, 0 },
-		{ "RxPhyErrEn", 31, 1 },
-		{ "DLLPTimeoutLmt", 13, 18 },
-		{ "AckLat", 0, 13 },
-	{ "PCIE_PEX_CTRL2", 0xa0, 0 },
-		{ "LnkCntlDetDir", 30, 1 },
-		{ "EnterL1rEn", 29, 1 },
-		{ "PMExitL1Req", 28, 1 },
-		{ "PMTxIdle", 27, 1 },
-		{ "PCIModeLoop", 26, 1 },
-		{ "L1ASPMTxRxL0sTime", 14, 12 },
-		{ "L0sIdleTime", 3, 11 },
-		{ "EnterL1ASPMEn", 2, 1 },
-		{ "EnterL1En", 1, 1 },
-		{ "EnterL0sEn", 0, 1 },
-	{ "PCIE_PEX_ERR", 0xa4, 0 },
-		{ "CplTimeoutID", 18, 7 },
-		{ "FlowCtlOFlowErr", 17, 1 },
-		{ "ReplayTimeout", 16, 1 },
-		{ "ReplayRollover", 15, 1 },
-		{ "BadDLLP", 14, 1 },
-		{ "DLLPErr", 13, 1 },
-		{ "FlowCtlProtErr", 12, 1 },
-		{ "CplTimeout", 11, 1 },
-		{ "PHYRcvErr", 10, 1 },
-		{ "DisTLP", 9, 1 },
-		{ "BadECRC", 8, 1 },
-		{ "BadTLP", 7, 1 },
-		{ "MalTLP", 6, 1 },
-		{ "UnxCpl", 5, 1 },
-		{ "UnsReq", 4, 1 },
-		{ "PsnReq", 3, 1 },
-		{ "UnsCpl", 2, 1 },
-		{ "CplAbt", 1, 1 },
-		{ "PsnCpl", 0, 1 },
-	{ "PCIE_SERDES_CTRL", 0xa8, 0 },
-		{ "PMASel", 3, 1 },
-		{ "Lane", 0, 3 },
-	{ "PCIE_SERDES_QUAD_CTRL0", 0xac, 0 },
-		{ "TestSig", 10, 19 },
-		{ "Offset", 2, 8 },
-		{ "OffsetEn", 1, 1 },
-		{ "IDDQb", 0, 1 },
-	{ "PCIE_SERDES_QUAD_CTRL1", 0xb0, 0 },
-		{ "FastInit", 28, 1 },
-		{ "CTCDisable", 27, 1 },
-		{ "ManResetPLL", 26, 1 },
-		{ "ManL2Pwrdn", 25, 1 },
-		{ "ManQuadEn", 24, 1 },
-		{ "RxEqCtl", 22, 2 },
-		{ "HiVMode", 21, 1 },
-		{ "RefSel", 19, 2 },
-		{ "RxTermAdj", 17, 2 },
-		{ "TxTermAdj", 15, 2 },
-		{ "Deq", 11, 4 },
-		{ "Dtx", 7, 4 },
-		{ "LoDrv", 6, 1 },
-		{ "HiDrv", 5, 1 },
-		{ "IntParReset", 4, 1 },
-		{ "IntParLPBK", 3, 1 },
-		{ "IntSerLPBKwDrv", 2, 1 },
-		{ "PW", 1, 1 },
-		{ "PClkDetect", 0, 1 },
-	{ "PCIE_SERDES_LANE_CTRL", 0xb4, 0 },
-		{ "ExtBISTChkErrClr", 22, 1 },
-		{ "ExtBISTChkEn", 21, 1 },
-		{ "ExtBISTGenEn", 20, 1 },
-		{ "ExtBISTPat", 17, 3 },
-		{ "ExtParReset", 16, 1 },
-		{ "ExtParLPBK", 15, 1 },
-		{ "ManRxTermEn", 14, 1 },
-		{ "ManBeaconTxEn", 13, 1 },
-		{ "ManRxDetectEn", 12, 1 },
-		{ "ManTxIdleEn", 11, 1 },
-		{ "ManRxIdleEn", 10, 1 },
-		{ "ManL1Pwrdn", 9, 1 },
-		{ "ManReset", 8, 1 },
-		{ "ManFmOffset", 3, 5 },
-		{ "ManFmOffsetEn", 2, 1 },
-		{ "ManLaneEn", 1, 1 },
-		{ "IntSerLPBK", 0, 1 },
-	{ "PCIE_SERDES_LANE_STAT", 0xb8, 0 },
-		{ "ExtBISTChkErrCnt", 8, 24 },
-		{ "ExtBISTChkFmd", 7, 1 },
-		{ "BeaconDetectChg", 6, 1 },
-		{ "RxDetectChg", 5, 1 },
-		{ "TxIdleDetectChg", 4, 1 },
-		{ "BeaconDetect", 2, 1 },
-		{ "RxDetect", 1, 1 },
-		{ "TxIdleDetect", 0, 1 },
-	{ "PCIE_PEX_WMARK", 0xbc, 0 },
-		{ "P_WMark", 18, 11 },
-		{ "NP_WMark", 11, 7 },
-		{ "CPL_WMark", 0, 11 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_t3dbg_regs[] = {
-	{ "T3DBG_DBG0_CFG", 0xc0, 0 },
-		{ "RegSelect", 9, 8 },
-		{ "ModuleSelect", 4, 5 },
-		{ "ClkSelect", 0, 4 },
-	{ "T3DBG_DBG0_EN", 0xc4, 0 },
-		{ "SDRByte0", 8, 1 },
-		{ "DDREn", 4, 1 },
-		{ "PortEn", 0, 1 },
-	{ "T3DBG_DBG1_CFG", 0xc8, 0 },
-		{ "RegSelect", 9, 8 },
-		{ "ModuleSelect", 4, 5 },
-		{ "ClkSelect", 0, 4 },
-	{ "T3DBG_DBG1_EN", 0xcc, 0 },
-		{ "SDRByte0", 8, 1 },
-		{ "DDREn", 4, 1 },
-		{ "PortEn", 0, 1 },
-	{ "T3DBG_GPIO_EN", 0xd0, 0 },
-		{ "GPIO11_OEn", 27, 1 },
-		{ "GPIO10_OEn", 26, 1 },
-		{ "GPIO9_OEn", 25, 1 },
-		{ "GPIO8_OEn", 24, 1 },
-		{ "GPIO7_OEn", 23, 1 },
-		{ "GPIO6_OEn", 22, 1 },
-		{ "GPIO5_OEn", 21, 1 },
-		{ "GPIO4_OEn", 20, 1 },
-		{ "GPIO3_OEn", 19, 1 },
-		{ "GPIO2_OEn", 18, 1 },
-		{ "GPIO1_OEn", 17, 1 },
-		{ "GPIO0_OEn", 16, 1 },
-		{ "GPIO11_Out_Val", 11, 1 },
-		{ "GPIO10_Out_Val", 10, 1 },
-		{ "GPIO9_Out_Val", 9, 1 },
-		{ "GPIO8_Out_Val", 8, 1 },
-		{ "GPIO7_Out_Val", 7, 1 },
-		{ "GPIO6_Out_Val", 6, 1 },
-		{ "GPIO5_Out_Val", 5, 1 },
-		{ "GPIO4_Out_Val", 4, 1 },
-		{ "GPIO3_Out_Val", 3, 1 },
-		{ "GPIO2_Out_Val", 2, 1 },
-		{ "GPIO1_Out_Val", 1, 1 },
-		{ "GPIO0_Out_Val", 0, 1 },
-	{ "T3DBG_GPIO_IN", 0xd4, 0 },
-		{ "GPIO11_CHG_DET", 27, 1 },
-		{ "GPIO10_CHG_DET", 26, 1 },
-		{ "GPIO9_CHG_DET", 25, 1 },
-		{ "GPIO8_CHG_DET", 24, 1 },
-		{ "GPIO7_CHG_DET", 23, 1 },
-		{ "GPIO6_CHG_DET", 22, 1 },
-		{ "GPIO5_CHG_DET", 21, 1 },
-		{ "GPIO4_CHG_DET", 20, 1 },
-		{ "GPIO3_CHG_DET", 19, 1 },
-		{ "GPIO2_CHG_DET", 18, 1 },
-		{ "GPIO1_CHG_DET", 17, 1 },
-		{ "GPIO0_CHG_DET", 16, 1 },
-		{ "GPIO11_IN", 11, 1 },
-		{ "GPIO10_IN", 10, 1 },
-		{ "GPIO9_IN", 9, 1 },
-		{ "GPIO8_IN", 8, 1 },
-		{ "GPIO7_IN", 7, 1 },
-		{ "GPIO6_IN", 6, 1 },
-		{ "GPIO5_IN", 5, 1 },
-		{ "GPIO4_IN", 4, 1 },
-		{ "GPIO3_IN", 3, 1 },
-		{ "GPIO2_IN", 2, 1 },
-		{ "GPIO1_IN", 1, 1 },
-		{ "GPIO0_IN", 0, 1 },
-	{ "T3DBG_INT_ENABLE", 0xd8, 0 },
-		{ "C_LOCK", 21, 1 },
-		{ "M_LOCK", 20, 1 },
-		{ "U_LOCK", 19, 1 },
-		{ "R_LOCK", 18, 1 },
-		{ "PX_LOCK", 17, 1 },
-		{ "GPIO11", 11, 1 },
-		{ "GPIO10", 10, 1 },
-		{ "GPIO9", 9, 1 },
-		{ "GPIO8", 8, 1 },
-		{ "GPIO7", 7, 1 },
-		{ "GPIO6", 6, 1 },
-		{ "GPIO5", 5, 1 },
-		{ "GPIO4", 4, 1 },
-		{ "GPIO3", 3, 1 },
-		{ "GPIO2", 2, 1 },
-		{ "GPIO1", 1, 1 },
-		{ "GPIO0", 0, 1 },
-	{ "T3DBG_INT_CAUSE", 0xdc, 0 },
-		{ "C_LOCK", 21, 1 },
-		{ "M_LOCK", 20, 1 },
-		{ "U_LOCK", 19, 1 },
-		{ "R_LOCK", 18, 1 },
-		{ "PX_LOCK", 17, 1 },
-		{ "GPIO11", 11, 1 },
-		{ "GPIO10", 10, 1 },
-		{ "GPIO9", 9, 1 },
-		{ "GPIO8", 8, 1 },
-		{ "GPIO7", 7, 1 },
-		{ "GPIO6", 6, 1 },
-		{ "GPIO5", 5, 1 },
-		{ "GPIO4", 4, 1 },
-		{ "GPIO3", 3, 1 },
-		{ "GPIO2", 2, 1 },
-		{ "GPIO1", 1, 1 },
-		{ "GPIO0", 0, 1 },
-	{ "T3DBG_DBG0_RST_VALUE", 0xe0, 0 },
-		{ "DebugData", 0, 8 },
-	{ "T3DBG_PLL_OCLK_PAD_EN", 0xe4, 0 },
-		{ "PCIE_OCLK_En", 20, 1 },
-		{ "PClkTree_DBG_En", 17, 1 },
-		{ "PCIX_OCLK_En", 16, 1 },
-		{ "U_OCLK_En", 12, 1 },
-		{ "R_OCLK_En", 8, 1 },
-		{ "M_OCLK_En", 4, 1 },
-		{ "C_OCLK_En", 0, 1 },
-	{ "T3DBG_PLL_LOCK", 0xe8, 0 },
-		{ "PCIX_LOCK", 16, 1 },
-		{ "U_LOCK", 12, 1 },
-		{ "R_LOCK", 8, 1 },
-		{ "M_LOCK", 4, 1 },
-		{ "C_LOCK", 0, 1 },
-	{ "T3DBG_SERDES_RBC_CFG", 0xec, 0 },
-		{ "X_RBC_Lane_Sel", 16, 2 },
-		{ "X_RBC_Dbg_En", 12, 1 },
-		{ "X_Serdes_Sel", 8, 1 },
-		{ "PE_RBC_Lane_Sel", 4, 3 },
-		{ "PE_RBC_Dbg_En", 0, 1 },
-	{ "T3DBG_GPIO_ACT_LOW", 0xf0, 0 },
-		{ "C_LOCK_ACT_LOW", 21, 1 },
-		{ "M_LOCK_ACT_LOW", 20, 1 },
-		{ "U_LOCK_ACT_LOW", 19, 1 },
-		{ "R_LOCK_ACT_LOW", 18, 1 },
-		{ "PX_LOCK_ACT_LOW", 17, 1 },
-		{ "GPIO11_ACT_LOW", 11, 1 },
-		{ "GPIO10_ACT_LOW", 10, 1 },
-		{ "GPIO9_ACT_LOW", 9, 1 },
-		{ "GPIO8_ACT_LOW", 8, 1 },
-		{ "GPIO7_ACT_LOW", 7, 1 },
-		{ "GPIO6_ACT_LOW", 6, 1 },
-		{ "GPIO5_ACT_LOW", 5, 1 },
-		{ "GPIO4_ACT_LOW", 4, 1 },
-		{ "GPIO3_ACT_LOW", 3, 1 },
-		{ "GPIO2_ACT_LOW", 2, 1 },
-		{ "GPIO1_ACT_LOW", 1, 1 },
-		{ "GPIO0_ACT_LOW", 0, 1 },
-	{ "T3DBG_PMON_CFG", 0xf4, 0 },
-		{ "PMON_DONE", 29, 1 },
-		{ "PMON_FAIL", 28, 1 },
-		{ "PMON_FDEL_AUTO", 22, 6 },
-		{ "PMON_CDEL_AUTO", 16, 6 },
-		{ "PMON_FDEL_MANUAL", 10, 6 },
-		{ "PMON_CDEL_MANUAL", 4, 6 },
-		{ "PMON_MANUAL", 1, 1 },
-		{ "PMON_AUTO", 0, 1 },
-	{ "T3DBG_SERDES_REFCLK_CFG", 0xf8, 0 },
-		{ "PE_REFCLK_DBG_EN", 12, 1 },
-		{ "X_REFCLK_DBG_EN", 8, 1 },
-		{ "PE_REFCLK_TERMADJ", 5, 2 },
-		{ "PE_REFCLK_PD", 4, 1 },
-		{ "X_REFCLK_TERMADJ", 1, 2 },
-		{ "X_REFCLK_PD", 0, 1 },
-	{ "T3DBG_PCIE_PMA_BSPIN_CFG", 0xfc, 0 },
-		{ "BSModeQuad1", 31, 1 },
-		{ "BSInSelLane7", 29, 2 },
-		{ "BSEnLane7", 28, 1 },
-		{ "BSInSelLane6", 25, 2 },
-		{ "BSEnLane6", 24, 1 },
-		{ "BSInSelLane5", 21, 2 },
-		{ "BSEnLane5", 20, 1 },
-		{ "BSInSelLane4", 17, 2 },
-		{ "BSEnLane4", 16, 1 },
-		{ "BSModeQuad0", 15, 1 },
-		{ "BSInSelLane3", 13, 2 },
-		{ "BSEnLane3", 12, 1 },
-		{ "BSInSelLane2", 9, 2 },
-		{ "BSEnLane2", 8, 1 },
-		{ "BSInSelLane1", 5, 2 },
-		{ "BSEnLane1", 4, 1 },
-		{ "BSInSelLane0", 1, 2 },
-		{ "BSEnLane0", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_mc7_pmrx_regs[] = {
-	{ "MC7_CFG", 0x100, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x104, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x108, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x10c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x110, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x114, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x118, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x11c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x120, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x124, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x128, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ERR_ADDR", 0x12c, 0 },
-		{ "ErrAddress", 3, 29 },
-		{ "ErrAgent", 1, 2 },
-		{ "ErrOp", 0, 1 },
-	{ "MC7_ECC", 0x130, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x134, 0 },
-	{ "MC7_CE_DATA0", 0x138, 0 },
-	{ "MC7_CE_DATA1", 0x13c, 0 },
-	{ "MC7_CE_DATA2", 0x140, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x144, 0 },
-	{ "MC7_UE_DATA0", 0x148, 0 },
-	{ "MC7_UE_DATA1", 0x14c, 0 },
-	{ "MC7_UE_DATA2", 0x150, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x154, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x158, 0 },
-	{ "MC7_BD_DATA1", 0x15c, 0 },
-	{ "MC7_BD_DATA2", 0x160, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x164, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x168, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x16c, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x170, 0 },
-	{ "MC7_BIST_OP", 0x174, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x178, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x17c, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_mc7_pmtx_regs[] = {
-	{ "MC7_CFG", 0x180, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x184, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x188, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x18c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x190, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x194, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x198, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x19c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x1a0, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x1a4, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x1a8, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ERR_ADDR", 0x1ac, 0 },
-		{ "ErrAddress", 3, 29 },
-		{ "ErrAgent", 1, 2 },
-		{ "ErrOp", 0, 1 },
-	{ "MC7_ECC", 0x1b0, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x1b4, 0 },
-	{ "MC7_CE_DATA0", 0x1b8, 0 },
-	{ "MC7_CE_DATA1", 0x1bc, 0 },
-	{ "MC7_CE_DATA2", 0x1c0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x1c4, 0 },
-	{ "MC7_UE_DATA0", 0x1c8, 0 },
-	{ "MC7_UE_DATA1", 0x1cc, 0 },
-	{ "MC7_UE_DATA2", 0x1d0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x1d4, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x1d8, 0 },
-	{ "MC7_BD_DATA1", 0x1dc, 0 },
-	{ "MC7_BD_DATA2", 0x1e0, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x1e4, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x1e8, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x1ec, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x1f0, 0 },
-	{ "MC7_BIST_OP", 0x1f4, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x1f8, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x1fc, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_mc7_cm_regs[] = {
-	{ "MC7_CFG", 0x200, 0 },
-		{ "ImpSetUpdate", 14, 1 },
-		{ "IFEn", 13, 1 },
-		{ "TERM300", 12, 1 },
-		{ "TERM150", 11, 1 },
-		{ "Slow", 10, 1 },
-		{ "Width", 8, 2 },
-		{ "ODTEn", 7, 1 },
-		{ "Bks", 6, 1 },
-		{ "Org", 5, 1 },
-		{ "Den", 2, 3 },
-		{ "Rdy", 1, 1 },
-		{ "ClkEn", 0, 1 },
-	{ "MC7_MODE", 0x204, 0 },
-		{ "Busy", 31, 1 },
-		{ "Mode", 0, 16 },
-	{ "MC7_EXT_MODE1", 0x208, 0 },
-		{ "Busy", 31, 1 },
-		{ "OCDAdjustMode", 20, 1 },
-		{ "OCDCode", 16, 4 },
-		{ "ExtMode1", 0, 16 },
-	{ "MC7_EXT_MODE2", 0x20c, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode2", 0, 16 },
-	{ "MC7_EXT_MODE3", 0x210, 0 },
-		{ "Busy", 31, 1 },
-		{ "ExtMode3", 0, 16 },
-	{ "MC7_PRE", 0x214, 0 },
-		{ "Busy", 31, 1 },
-	{ "MC7_REF", 0x218, 0 },
-		{ "Busy", 31, 1 },
-		{ "PreRefDiv", 1, 14 },
-		{ "PerRefEn", 0, 1 },
-	{ "MC7_DLL", 0x21c, 0 },
-		{ "DLLLock", 31, 1 },
-		{ "DLLDelta", 24, 7 },
-		{ "ManDelta", 3, 7 },
-		{ "DLLDeltaSel", 2, 1 },
-		{ "DLLEnb", 1, 1 },
-		{ "DLLRst", 0, 1 },
-	{ "MC7_PARM", 0x220, 0 },
-		{ "ActToPreDly", 26, 4 },
-		{ "ActToRdWrDly", 23, 3 },
-		{ "PreCyc", 20, 3 },
-		{ "RefCyc", 13, 7 },
-		{ "BkCyc", 8, 5 },
-		{ "WrToRdDly", 4, 4 },
-		{ "RdToWrDly", 0, 4 },
-	{ "MC7_HWM_WRR", 0x224, 0 },
-		{ "MEM_HWM", 26, 6 },
-		{ "ULP_HWM", 22, 4 },
-		{ "TOT_RLD_WT", 14, 8 },
-		{ "MEM_RLD_WT", 7, 7 },
-		{ "ULP_RLD_WT", 0, 7 },
-	{ "MC7_CAL", 0x228, 0 },
-		{ "BUSY", 31, 1 },
-		{ "CAL_FAULT", 30, 1 },
-		{ "PER_CAL_DIV", 22, 8 },
-		{ "PER_CAL_EN", 21, 1 },
-		{ "SGL_CAL_EN", 20, 1 },
-		{ "IMP_UPD_MODE", 19, 1 },
-		{ "IMP_SEL", 18, 1 },
-		{ "IMP_MAN_PD", 15, 3 },
-		{ "IMP_MAN_PU", 12, 3 },
-		{ "IMP_CAL_PD", 9, 3 },
-		{ "IMP_CAL_PU", 6, 3 },
-		{ "IMP_SET_PD", 3, 3 },
-		{ "IMP_SET_PU", 0, 3 },
-	{ "MC7_ERR_ADDR", 0x22c, 0 },
-		{ "ErrAddress", 3, 29 },
-		{ "ErrAgent", 1, 2 },
-		{ "ErrOp", 0, 1 },
-	{ "MC7_ECC", 0x230, 0 },
-		{ "UECnt", 10, 8 },
-		{ "CECnt", 2, 8 },
-		{ "ECCChkEn", 1, 1 },
-		{ "ECCGenEn", 0, 1 },
-	{ "MC7_CE_ADDR", 0x234, 0 },
-	{ "MC7_CE_DATA0", 0x238, 0 },
-	{ "MC7_CE_DATA1", 0x23c, 0 },
-	{ "MC7_CE_DATA2", 0x240, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_UE_ADDR", 0x244, 0 },
-	{ "MC7_UE_DATA0", 0x248, 0 },
-	{ "MC7_UE_DATA1", 0x24c, 0 },
-	{ "MC7_UE_DATA2", 0x250, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_ADDR", 0x254, 0 },
-		{ "Addr", 3, 29 },
-	{ "MC7_BD_DATA0", 0x258, 0 },
-	{ "MC7_BD_DATA1", 0x25c, 0 },
-	{ "MC7_BD_DATA2", 0x260, 0 },
-		{ "Data", 0, 8 },
-	{ "MC7_BD_OP", 0x264, 0 },
-		{ "Busy", 31, 1 },
-		{ "Op", 0, 1 },
-	{ "MC7_BIST_ADDR_BEG", 0x268, 0 },
-		{ "AddrBeg", 5, 27 },
-	{ "MC7_BIST_ADDR_END", 0x26c, 0 },
-		{ "AddrEnd", 5, 27 },
-	{ "MC7_BIST_DATA", 0x270, 0 },
-	{ "MC7_BIST_OP", 0x274, 0 },
-		{ "Busy", 31, 1 },
-		{ "Gap", 4, 5 },
-		{ "Cont", 3, 1 },
-		{ "DataPat", 1, 2 },
-		{ "Op", 0, 1 },
-	{ "MC7_INT_ENABLE", 0x278, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ "MC7_INT_CAUSE", 0x27c, 0 },
-		{ "AE", 17, 1 },
-		{ "PE", 2, 15 },
-		{ "UE", 1, 1 },
-		{ "CE", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_cim_regs[] = {
-	{ "CIM_BOOT_CFG", 0x280, 0 },
-		{ "BootAddr", 2, 30 },
-		{ "BootSdram", 1, 1 },
-		{ "uPCRst", 0, 1 },
-	{ "CIM_FLASH_BASE_ADDR", 0x284, 0 },
-		{ "FlashBaseAddr", 2, 22 },
-	{ "CIM_FLASH_ADDR_SIZE", 0x288, 0 },
-		{ "FlashAddrSize", 2, 22 },
-	{ "CIM_SDRAM_BASE_ADDR", 0x28c, 0 },
-		{ "SdramBaseAddr", 2, 30 },
-	{ "CIM_SDRAM_ADDR_SIZE", 0x290, 0 },
-		{ "SdramAddrSize", 2, 30 },
-	{ "CIM_UP_SPARE_INT", 0x294, 0 },
-		{ "uPSpareInt", 0, 3 },
-	{ "CIM_HOST_INT_ENABLE", 0x298, 0 },
-		{ "DTagParErr", 28, 1 },
-		{ "ITagParErr", 27, 1 },
-		{ "IBQTPParErr", 26, 1 },
-		{ "IBQULPParErr", 25, 1 },
-		{ "IBQSGEHIParErr", 24, 1 },
-		{ "IBQSGELOParErr", 23, 1 },
-		{ "OBQULPLOParErr", 22, 1 },
-		{ "OBQULPHIParErr", 21, 1 },
-		{ "OBQSGEParErr", 20, 1 },
-		{ "DCacheParErr", 19, 1 },
-		{ "ICacheParErr", 18, 1 },
-		{ "DRamParErr", 17, 1 },
-		{ "Timer1IntEn", 15, 1 },
-		{ "Timer0IntEn", 14, 1 },
-		{ "PrefDropIntEn", 13, 1 },
-		{ "BlkWrPlIntEn", 12, 1 },
-		{ "BlkRdPlIntEn", 11, 1 },
-		{ "BlkWrCtlIntEn", 10, 1 },
-		{ "BlkRdCtlIntEn", 9, 1 },
-		{ "BlkWrFlashIntEn", 8, 1 },
-		{ "BlkRdFlashIntEn", 7, 1 },
-		{ "SglWrFlashIntEn", 6, 1 },
-		{ "WrBlkFlashIntEn", 5, 1 },
-		{ "BlkWrBootIntEn", 4, 1 },
-		{ "BlkRdBootIntEn", 3, 1 },
-		{ "FlashRangeIntEn", 2, 1 },
-		{ "SdramRangeIntEn", 1, 1 },
-		{ "RsvdSpaceIntEn", 0, 1 },
-	{ "CIM_HOST_INT_CAUSE", 0x29c, 0 },
-		{ "DTagParErr", 28, 1 },
-		{ "ITagParErr", 27, 1 },
-		{ "IBQTPParErr", 26, 1 },
-		{ "IBQULPParErr", 25, 1 },
-		{ "IBQSGEHIParErr", 24, 1 },
-		{ "IBQSGELOParErr", 23, 1 },
-		{ "OBQULPLOParErr", 22, 1 },
-		{ "OBQULPHIParErr", 21, 1 },
-		{ "OBQSGEParErr", 20, 1 },
-		{ "DCacheParErr", 19, 1 },
-		{ "ICacheParErr", 18, 1 },
-		{ "DRamParErr", 17, 1 },
-		{ "Timer1Int", 15, 1 },
-		{ "Timer0Int", 14, 1 },
-		{ "PrefDropInt", 13, 1 },
-		{ "BlkWrPlInt", 12, 1 },
-		{ "BlkRdPlInt", 11, 1 },
-		{ "BlkWrCtlInt", 10, 1 },
-		{ "BlkRdCtlInt", 9, 1 },
-		{ "BlkWrFlashInt", 8, 1 },
-		{ "BlkRdFlashInt", 7, 1 },
-		{ "SglWrFlashInt", 6, 1 },
-		{ "WrBlkFlashInt", 5, 1 },
-		{ "BlkWrBootInt", 4, 1 },
-		{ "BlkRdBootInt", 3, 1 },
-		{ "FlashRangeInt", 2, 1 },
-		{ "SdramRangeInt", 1, 1 },
-		{ "RsvdSpaceInt", 0, 1 },
-	{ "CIM_UP_INT_ENABLE", 0x2a0, 0 },
-		{ "DTagParErr", 28, 1 },
-		{ "ITagParErr", 27, 1 },
-		{ "IBQTPParErr", 26, 1 },
-		{ "IBQULPParErr", 25, 1 },
-		{ "IBQSGEHIParErr", 24, 1 },
-		{ "IBQSGELOParErr", 23, 1 },
-		{ "OBQULPLOParErr", 22, 1 },
-		{ "OBQULPHIParErr", 21, 1 },
-		{ "OBQSGEParErr", 20, 1 },
-		{ "DCacheParErr", 19, 1 },
-		{ "ICacheParErr", 18, 1 },
-		{ "DRamParErr", 17, 1 },
-		{ "MstPlIntEn", 16, 1 },
-		{ "Timer1IntEn", 15, 1 },
-		{ "Timer0IntEn", 14, 1 },
-		{ "PrefDropIntEn", 13, 1 },
-		{ "BlkWrPlIntEn", 12, 1 },
-		{ "BlkRdPlIntEn", 11, 1 },
-		{ "BlkWrCtlIntEn", 10, 1 },
-		{ "BlkRdCtlIntEn", 9, 1 },
-		{ "BlkWrFlashIntEn", 8, 1 },
-		{ "BlkRdFlashIntEn", 7, 1 },
-		{ "SglWrFlashIntEn", 6, 1 },
-		{ "WrBlkFlashIntEn", 5, 1 },
-		{ "BlkWrBootIntEn", 4, 1 },
-		{ "BlkRdBootIntEn", 3, 1 },
-		{ "FlashRangeIntEn", 2, 1 },
-		{ "SdramRangeIntEn", 1, 1 },
-		{ "RsvdSpaceIntEn", 0, 1 },
-	{ "CIM_UP_INT_CAUSE", 0x2a4, 0 },
-		{ "DTagParErr", 28, 1 },
-		{ "ITagParErr", 27, 1 },
-		{ "IBQTPParErr", 26, 1 },
-		{ "IBQULPParErr", 25, 1 },
-		{ "IBQSGEHIParErr", 24, 1 },
-		{ "IBQSGELOParErr", 23, 1 },
-		{ "OBQULPLOParErr", 22, 1 },
-		{ "OBQULPHIParErr", 21, 1 },
-		{ "OBQSGEParErr", 20, 1 },
-		{ "DCacheParErr", 19, 1 },
-		{ "ICacheParErr", 18, 1 },
-		{ "DRamParErr", 17, 1 },
-		{ "MstPlInt", 16, 1 },
-		{ "Timer1Int", 15, 1 },
-		{ "Timer0Int", 14, 1 },
-		{ "PrefDropInt", 13, 1 },
-		{ "BlkWrPlInt", 12, 1 },
-		{ "BlkRdPlInt", 11, 1 },
-		{ "BlkWrCtlInt", 10, 1 },
-		{ "BlkRdCtlInt", 9, 1 },
-		{ "BlkWrFlashInt", 8, 1 },
-		{ "BlkRdFlashInt", 7, 1 },
-		{ "SglWrFlashInt", 6, 1 },
-		{ "WrBlkFlashInt", 5, 1 },
-		{ "BlkWrBootInt", 4, 1 },
-		{ "BlkRdBootInt", 3, 1 },
-		{ "FlashRangeInt", 2, 1 },
-		{ "SdramRangeInt", 1, 1 },
-		{ "RsvdSpaceInt", 0, 1 },
-	{ "CIM_IBQ_FULLA_THRSH", 0x2a8, 0 },
-		{ "Ibq0FullThrsh", 0, 9 },
-		{ "Ibq1FullThrsh", 16, 9 },
-	{ "CIM_IBQ_FULLB_THRSH", 0x2ac, 0 },
-		{ "Ibq2FullThrsh", 0, 9 },
-		{ "Ibq3FullThrsh", 16, 9 },
-	{ "CIM_HOST_ACC_CTRL", 0x2b0, 0 },
-		{ "HostBusy", 17, 1 },
-		{ "HostWrite", 16, 1 },
-		{ "HostAddr", 0, 16 },
-	{ "CIM_HOST_ACC_DATA", 0x2b4, 0 },
-	{ "CIM_IBQ_DBG_CFG", 0x2c0, 0 },
-		{ "IbqDbgAddr", 16, 9 },
-		{ "IbqDbgQID", 3, 2 },
-		{ "IbqDbgWr", 2, 1 },
-		{ "IbqDbgBusy", 1, 1 },
-		{ "IbqDbgEn", 0, 1 },
-	{ "CIM_OBQ_DBG_CFG", 0x2c4, 0 },
-		{ "ObqDbgAddr", 16, 9 },
-		{ "ObqDbgQID", 3, 2 },
-		{ "ObqDbgWr", 2, 1 },
-		{ "ObqDbgBusy", 1, 1 },
-		{ "ObqDbgEn", 0, 1 },
-	{ "CIM_IBQ_DBG_DATA", 0x2c8, 0 },
-	{ "CIM_OBQ_DBG_DATA", 0x2cc, 0 },
-	{ "CIM_CDEBUGDATA", 0x2d0, 0 },
-		{ "CDebugDataH", 16, 16 },
-		{ "CDebugDataL", 0, 16 },
-	{ "CIM_DEBUGCFG", 0x2e0, 0 },
-		{ "POLADbgRdPtr", 23, 9 },
-		{ "PILADbgRdPtr", 14, 9 },
-		{ "LADbgEn", 12, 1 },
-		{ "DebugSelH", 5, 5 },
-		{ "DebugSelL", 0, 5 },
-	{ "CIM_DEBUGSTS", 0x2e4, 0 },
-		{ "POLADbgWrPtr", 16, 9 },
-		{ "PILADbgWrPtr", 0, 9 },
-	{ "CIM_PO_LA_DEBUGDATA", 0x2e8, 0 },
-	{ "CIM_PI_LA_DEBUGDATA", 0x2ec, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_tp1_regs[] = {
-	{ "TP_IN_CONFIG", 0x300, 0 },
-		{ "RXFbArbPrio", 25, 1 },
-		{ "TXFbArbPrio", 24, 1 },
-		{ "DBMaxOpCnt", 16, 8 },
-		{ "IPv6Enable", 15, 1 },
-		{ "NICMode", 14, 1 },
-		{ "EChecksumCheckTCP", 13, 1 },
-		{ "EChecksumCheckIP", 12, 1 },
-		{ "ECPL", 10, 1 },
-		{ "EEthernet", 8, 1 },
-		{ "ETunnel", 7, 1 },
-		{ "CChecksumCheckTCP", 6, 1 },
-		{ "CChecksumCheckIP", 5, 1 },
-		{ "CCPL", 3, 1 },
-		{ "CEthernet", 1, 1 },
-		{ "CTunnel", 0, 1 },
-	{ "TP_OUT_CONFIG", 0x304, 0 },
-		{ "IPIDSplitMode", 16, 1 },
-		{ "VLANExtractionEnable2ndPort", 13, 1 },
-		{ "VLANExtractionEnable", 12, 1 },
-		{ "EChecksumGenerateTCP", 11, 1 },
-		{ "EChecksumGenerateIP", 10, 1 },
-		{ "ECPL", 8, 1 },
-		{ "EEthernet", 6, 1 },
-		{ "CChecksumGenerateTCP", 5, 1 },
-		{ "CChecksumGenerateIP", 4, 1 },
-		{ "CCPL", 2, 1 },
-		{ "CEthernet", 0, 1 },
-	{ "TP_GLOBAL_CONFIG", 0x308, 0 },
-		{ "SYNCookieParams", 26, 6 },
-		{ "RXFlowControlDisable", 25, 1 },
-		{ "TXPacingEnable", 24, 1 },
-		{ "AttackFilterEnable", 23, 1 },
-		{ "SYNCookieNoOptions", 22, 1 },
-		{ "ProtectedMode", 21, 1 },
-		{ "PingDrop", 20, 1 },
-		{ "FragmentDrop", 19, 1 },
-		{ "FiveTupleLookup", 17, 2 },
-		{ "PathMTU", 15, 1 },
-		{ "IPIdentSplit", 14, 1 },
-		{ "IPChecksumOffload", 13, 1 },
-		{ "UDPChecksumOffload", 12, 1 },
-		{ "TCPChecksumOffload", 11, 1 },
-		{ "QOSMapping", 10, 1 },
-		{ "TCAMServerUse", 8, 2 },
-		{ "IPTTL", 0, 8 },
-	{ "TP_GLOBAL_RX_CREDIT", 0x30c, 0 },
-	{ "TP_CMM_SIZE", 0x310, 0 },
-		{ "CMMemMgrSize", 0, 28 },
-	{ "TP_CMM_MM_BASE", 0x314, 0 },
-		{ "CMMemMgrBase", 0, 28 },
-	{ "TP_CMM_TIMER_BASE", 0x318, 0 },
-		{ "CMTimerMaxNum", 28, 2 },
-		{ "CMTimerBase", 0, 28 },
-	{ "TP_PMM_SIZE", 0x31c, 0 },
-		{ "PMSize", 0, 28 },
-	{ "TP_PMM_TX_BASE", 0x320, 0 },
-	{ "TP_PMM_DEFRAG_BASE", 0x324, 0 },
-	{ "TP_PMM_RX_BASE", 0x328, 0 },
-	{ "TP_PMM_RX_PAGE_SIZE", 0x32c, 0 },
-	{ "TP_PMM_RX_MAX_PAGE", 0x330, 0 },
-		{ "PMRxMaxPage", 0, 21 },
-	{ "TP_PMM_TX_PAGE_SIZE", 0x334, 0 },
-	{ "TP_PMM_TX_MAX_PAGE", 0x338, 0 },
-		{ "PMTxMaxPage", 0, 21 },
-	{ "TP_TCP_OPTIONS", 0x340, 0 },
-		{ "MTUDefault", 16, 16 },
-		{ "MTUEnable", 10, 1 },
-		{ "SACKTx", 9, 1 },
-		{ "SACKRx", 8, 1 },
-		{ "SACKMode", 4, 2 },
-		{ "WindowScaleMode", 2, 2 },
-		{ "TimestampsMode", 0, 2 },
-	{ "TP_DACK_CONFIG", 0x344, 0 },
-		{ "AutoState3", 30, 2 },
-		{ "AutoState2", 28, 2 },
-		{ "AutoState1", 26, 2 },
-		{ "ByteThreshold", 5, 20 },
-		{ "MSSThreshold", 3, 2 },
-		{ "AutoCareful", 2, 1 },
-		{ "AutoEnable", 1, 1 },
-		{ "Mode", 0, 1 },
-	{ "TP_PC_CONFIG", 0x348, 0 },
-		{ "CMCacheDisable", 31, 1 },
-		{ "EnableOcspiFull", 30, 1 },
-		{ "EnableFLMErrorDDP", 29, 1 },
-		{ "LockTid", 28, 1 },
-		{ "FixRcvWnd", 27, 1 },
-		{ "TxTosQueueMapMode", 26, 1 },
-		{ "RddpCongEn", 25, 1 },
-		{ "EnableOnFlyPDU", 24, 1 },
-		{ "EnableEPCMDAFull", 23, 1 },
-		{ "ModulateUnionMode", 22, 1 },
-		{ "TxDataAckRateEnable", 21, 1 },
-		{ "TxDeferEnable", 20, 1 },
-		{ "RxCongestionMode", 19, 1 },
-		{ "HearbeatOnceDACK", 18, 1 },
-		{ "HearbeatOnceHeap", 17, 1 },
-		{ "HearbeatDACK", 16, 1 },
-		{ "TxCongestionMode", 15, 1 },
-		{ "AcceptLatestRcvAdv", 14, 1 },
-		{ "DisableSYNData", 13, 1 },
-		{ "DisableWindowPSH", 12, 1 },
-		{ "DisableFINOldData", 11, 1 },
-		{ "EnableFLMError", 10, 1 },
-		{ "DisableNextMtu", 9, 1 },
-		{ "FilterPeerFIN", 8, 1 },
-		{ "EnableFeedbackSend", 7, 1 },
-		{ "EnableRDMAError", 6, 1 },
-		{ "EnableDDPFlowControl", 5, 1 },
-		{ "DisableHeldFIN", 4, 1 },
-		{ "TableLatencyDelta", 0, 4 },
-	{ "TP_PC_CONFIG2", 0x34c, 0 },
-		{ "DisbleDaParbit0", 15, 1 },
-		{ "EnableArpMiss", 13, 1 },
-		{ "EnableNonOfdTnlSyn", 12, 1 },
-		{ "EnableIPv6RSS", 11, 1 },
-		{ "EnableDropRQEmptyPkt", 10, 1 },
-		{ "EnableTxPortfromDA2", 9, 1 },
-		{ "EnableRxPktTmstpRss", 8, 1 },
-		{ "EnableSndUnaInRxData", 7, 1 },
-		{ "EnableRxPortFromAddr", 6, 1 },
-		{ "EnableTxPortfromDA", 5, 1 },
-		{ "EnableCHdrAFull", 4, 1 },
-		{ "EnableNonOfdScbBit", 3, 1 },
-		{ "EnableNonOfdTidRss", 2, 1 },
-		{ "EnableNonOfdTcbRss", 1, 1 },
-		{ "EnableOldRxForward", 0, 1 },
-	{ "TP_TCP_BACKOFF_REG0", 0x350, 0 },
-		{ "TimerBackoffIndex3", 24, 8 },
-		{ "TimerBackoffIndex2", 16, 8 },
-		{ "TimerBackoffIndex1", 8, 8 },
-		{ "TimerBackoffIndex0", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG1", 0x354, 0 },
-		{ "TimerBackoffIndex7", 24, 8 },
-		{ "TimerBackoffIndex6", 16, 8 },
-		{ "TimerBackoffIndex5", 8, 8 },
-		{ "TimerBackoffIndex4", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG2", 0x358, 0 },
-		{ "TimerBackoffIndex11", 24, 8 },
-		{ "TimerBackoffIndex10", 16, 8 },
-		{ "TimerBackoffIndex9", 8, 8 },
-		{ "TimerBackoffIndex8", 0, 8 },
-	{ "TP_TCP_BACKOFF_REG3", 0x35c, 0 },
-		{ "TimerBackoffIndex15", 24, 8 },
-		{ "TimerBackoffIndex14", 16, 8 },
-		{ "TimerBackoffIndex13", 8, 8 },
-		{ "TimerBackoffIndex12", 0, 8 },
-	{ "TP_PARA_REG0", 0x360, 0 },
-		{ "InitCwnd", 24, 3 },
-		{ "DupAckThresh", 20, 4 },
-	{ "TP_PARA_REG1", 0x364, 0 },
-		{ "InitRwnd", 16, 16 },
-		{ "InitialSSThresh", 0, 16 },
-	{ "TP_PARA_REG2", 0x368, 0 },
-		{ "MaxRxData", 16, 16 },
-		{ "RxCoalesceSize", 0, 16 },
-	{ "TP_PARA_REG3", 0x36c, 0 },
-		{ "TunnelCngDrop1", 21, 1 },
-		{ "TunnelCngDrop0", 20, 1 },
-		{ "TxDataAckIdx", 16, 4 },
-		{ "RxFragEnable", 12, 3 },
-		{ "TxPaceFixedStrict", 11, 1 },
-		{ "TxPaceAutoStrict", 10, 1 },
-		{ "TxPaceFixed", 9, 1 },
-		{ "TxPaceAuto", 8, 1 },
-		{ "RxUrgTunnel", 6, 1 },
-		{ "RxUrgMode", 5, 1 },
-		{ "TxUrgMode", 4, 1 },
-		{ "CngCtrlMode", 2, 2 },
-		{ "RxCoalesceEnable", 1, 1 },
-		{ "RxCoalescePshEn", 0, 1 },
-	{ "TP_PARA_REG4", 0x370, 0 },
-		{ "HighSpeedCfg", 24, 8 },
-		{ "NewRenoCfg", 16, 8 },
-		{ "TahoeCfg", 8, 8 },
-		{ "RenoCfg", 0, 8 },
-	{ "TP_PARA_REG5", 0x374, 0 },
-		{ "IndicateSize", 16, 16 },
-		{ "SchdEnable", 8, 1 },
-		{ "RxDdpOffInit", 3, 1 },
-		{ "OnFlyDDPEnable", 2, 1 },
-		{ "DackTimerSpin", 1, 1 },
-		{ "PushTimerEnable", 0, 1 },
-	{ "TP_PARA_REG6", 0x378, 0 },
-		{ "TxPDUSizeAdj", 16, 8 },
-		{ "EnableDeferACK", 12, 1 },
-		{ "EnableESnd", 11, 1 },
-		{ "EnableCSnd", 10, 1 },
-		{ "EnablePDUE", 9, 1 },
-		{ "EnablePDUC", 8, 1 },
-		{ "EnableBUFI", 7, 1 },
-		{ "EnableBUFE", 6, 1 },
-		{ "EnableDefer", 5, 1 },
-		{ "EnableClearRxmtOos", 4, 1 },
-		{ "DisablePDUCng", 3, 1 },
-		{ "DisablePDUTimeout", 2, 1 },
-		{ "DisablePDURxmt", 1, 1 },
-		{ "DisablePDUxmt", 0, 1 },
-	{ "TP_PARA_REG7", 0x37c, 0 },
-		{ "PMMaxXferLen1", 16, 16 },
-		{ "PMMaxXferLen0", 0, 16 },
-	{ "TP_TIMER_RESOLUTION", 0x390, 0 },
-		{ "TimerResolution", 16, 8 },
-		{ "TimestampResolution", 8, 8 },
-		{ "DelayedACKResolution", 0, 8 },
-	{ "TP_MSL", 0x394, 0 },
-		{ "MSL", 0, 30 },
-	{ "TP_RXT_MIN", 0x398, 0 },
-		{ "RxtMin", 0, 30 },
-	{ "TP_RXT_MAX", 0x39c, 0 },
-		{ "RxtMax", 0, 30 },
-	{ "TP_PERS_MIN", 0x3a0, 0 },
-		{ "PersMin", 0, 30 },
-	{ "TP_PERS_MAX", 0x3a4, 0 },
-		{ "PersMax", 0, 30 },
-	{ "TP_KEEP_IDLE", 0x3a8, 0 },
-		{ "KeepaliveIdle", 0, 30 },
-	{ "TP_KEEP_INTVL", 0x3ac, 0 },
-		{ "KeepaliveIntvl", 0, 30 },
-	{ "TP_INIT_SRTT", 0x3b0, 0 },
-		{ "InitSrtt", 0, 16 },
-	{ "TP_DACK_TIMER", 0x3b4, 0 },
-		{ "DackTime", 0, 12 },
-	{ "TP_FINWAIT2_TIMER", 0x3b8, 0 },
-		{ "Finwait2Time", 0, 30 },
-	{ "TP_FAST_FINWAIT2_TIMER", 0x3bc, 0 },
-		{ "FastFinwait2Time", 0, 30 },
-	{ "TP_SHIFT_CNT", 0x3c0, 0 },
-		{ "SynShiftMax", 24, 8 },
-		{ "RxtShiftMaxR1", 20, 4 },
-		{ "RxtShiftMaxR2", 16, 4 },
-		{ "PerShiftBackoffMax", 12, 4 },
-		{ "PerShiftMax", 8, 4 },
-		{ "KeepaliveMax", 0, 8 },
-	{ "TP_TIME_HI", 0x3c8, 0 },
-	{ "TP_TIME_LO", 0x3cc, 0 },
-	{ "TP_MTU_PORT_TABLE", 0x3d0, 0 },
-		{ "Port1MTUValue", 16, 16 },
-		{ "Port0MTUValue", 0, 16 },
-	{ "TP_ULP_TABLE", 0x3d4, 0 },
-		{ "ULPType7Field", 28, 4 },
-		{ "ULPType6Field", 24, 4 },
-		{ "ULPType5Field", 20, 4 },
-		{ "ULPType4Field", 16, 4 },
-		{ "ULPType3Field", 12, 4 },
-		{ "ULPType2Field", 8, 4 },
-		{ "ULPType1Field", 4, 4 },
-		{ "ULPType0Field", 0, 4 },
-	{ "TP_PACE_TABLE", 0x3d8, 0 },
-	{ "TP_CCTRL_TABLE", 0x3dc, 0 },
-	{ "TP_TOS_TABLE", 0x3e0, 0 },
-	{ "TP_MTU_TABLE", 0x3e4, 0 },
-	{ "TP_RSS_MAP_TABLE", 0x3e8, 0 },
-	{ "TP_RSS_LKP_TABLE", 0x3ec, 0 },
-	{ "TP_RSS_CONFIG", 0x3f0, 0 },
-		{ "TNL4tupEn", 29, 1 },
-		{ "TNL2tupEn", 28, 1 },
-		{ "TNLprtEn", 26, 1 },
-		{ "TNLMapEn", 25, 1 },
-		{ "TNLLkpEn", 24, 1 },
-		{ "OFD4tupEn", 21, 1 },
-		{ "OFD2tupEn", 20, 1 },
-		{ "OFDMapEn", 17, 1 },
-		{ "OFDLkpEn", 16, 1 },
-		{ "SYN4tupEn", 13, 1 },
-		{ "SYN2tupEn", 12, 1 },
-		{ "SYNMapEn", 9, 1 },
-		{ "SYNLkpEn", 8, 1 },
-		{ "RRCPLMapEn", 7, 1 },
-		{ "RRCPLCPUSIZE", 4, 3 },
-		{ "RQFeedbackEnable", 3, 1 },
-		{ "HashToeplitz", 2, 1 },
-		{ "HashSave", 1, 1 },
-		{ "Disable", 0, 1 },
-	{ "TP_RSS_CONFIG_TNL", 0x3f4, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_CONFIG_OFD", 0x3f8, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_CONFIG_SYN", 0x3fc, 0 },
-		{ "MaskSize", 28, 3 },
-		{ "DefaultCPUBase", 22, 6 },
-		{ "DefaultCPU", 16, 6 },
-		{ "DefaultQueue", 0, 16 },
-	{ "TP_RSS_SECRET_KEY0", 0x400, 0 },
-	{ "TP_RSS_SECRET_KEY1", 0x404, 0 },
-	{ "TP_RSS_SECRET_KEY2", 0x408, 0 },
-	{ "TP_RSS_SECRET_KEY3", 0x40c, 0 },
-	{ "TP_TM_PIO_ADDR", 0x418, 0 },
-	{ "TP_TM_PIO_DATA", 0x41c, 0 },
-	{ "TP_TX_MOD_QUE_TABLE", 0x420, 0 },
-	{ "TP_TX_RESOURCE_LIMIT", 0x424, 0 },
-		{ "TX_RESOURCE_LIMIT_CH1_PC", 24, 8 },
-		{ "TX_RESOURCE_LIMIT_CH1_NON_PC", 16, 8 },
-		{ "TX_RESOURCE_LIMIT_CH0_PC", 8, 8 },
-		{ "TX_RESOURCE_LIMIT_CH0_NON_PC", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_REQ_MAP", 0x428, 0 },
-		{ "RX_MOD_WEIGHT", 24, 8 },
-		{ "TX_MOD_WEIGHT", 16, 8 },
-		{ "TX_MOD_TIMER_MODE", 8, 8 },
-		{ "TX_MOD_QUEUE_REQ_MAP", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_WEIGHT1", 0x42c, 0 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT7", 24, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT6", 16, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT5", 8, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 },
-	{ "TP_TX_MOD_QUEUE_WEIGHT0", 0x430, 0 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT3", 24, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT2", 16, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT1", 8, 8 },
-		{ "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 },
-	{ "TP_MOD_CHANNEL_WEIGHT", 0x434, 0 },
-		{ "RX_MOD_CHANNEL_WEIGHT1", 24, 8 },
-		{ "RX_MOD_CHANNEL_WEIGHT0", 16, 8 },
-		{ "TX_MOD_CHANNEL_WEIGHT1", 8, 8 },
-		{ "TX_MOD_CHANNEL_WEIGHT0", 0, 8 },
-	{ "TP_MOD_RATE_LIMIT", 0x438, 0 },
-		{ "RX_MOD_RATE_LIMIT_INC", 24, 8 },
-		{ "RX_MOD_RATE_LIMIT_TICK", 16, 8 },
-		{ "TX_MOD_RATE_LIMIT_INC", 8, 8 },
-		{ "TX_MOD_RATE_LIMIT_TICK", 0, 8 },
-	{ "TP_PIO_ADDR", 0x440, 0 },
-	{ "TP_PIO_DATA", 0x444, 0 },
-	{ "TP_RESET", 0x44c, 0 },
-		{ "FlstInitEnable", 1, 1 },
-		{ "TPReset", 0, 1 },
-	{ "TP_MIB_INDEX", 0x450, 0 },
-	{ "TP_MIB_RDATA", 0x454, 0 },
-	{ "TP_SYNC_TIME_HI", 0x458, 0 },
-	{ "TP_SYNC_TIME_LO", 0x45c, 0 },
-	{ "TP_CMM_MM_RX_FLST_BASE", 0x460, 0 },
-		{ "CMRxFlstBase", 0, 28 },
-	{ "TP_CMM_MM_TX_FLST_BASE", 0x464, 0 },
-		{ "CMTxFlstBase", 0, 28 },
-	{ "TP_CMM_MM_PS_FLST_BASE", 0x468, 0 },
-		{ "CMPsFlstBase", 0, 28 },
-	{ "TP_CMM_MM_MAX_PSTRUCT", 0x46c, 0 },
-		{ "CMMaxPstruct", 0, 21 },
-	{ "TP_INT_ENABLE", 0x470, 0 },
-		{ "FlmTxFlstEmpty", 30, 1 },
-		{ "FlmRxFlstEmpty", 29, 1 },
-		{ "FlmPerrSet", 28, 1 },
-		{ "ProtocolSramPerr", 27, 1 },
-		{ "ArpLutPerr", 26, 1 },
-		{ "CmRcfOpPerr", 25, 1 },
-		{ "CmCachePerr", 24, 1 },
-		{ "CmRcfDataPerr", 23, 1 },
-		{ "DbL2tLutPerr", 22, 1 },
-		{ "DbTxTidPerr", 21, 1 },
-		{ "DbExtPerr", 20, 1 },
-		{ "DbOpPerr", 19, 1 },
-		{ "TmCachePerr", 18, 1 },
-		{ "ETpOutCplFifoPerr", 17, 1 },
-		{ "ETpOutTcpFifoPerr", 16, 1 },
-		{ "ETpOutIpFifoPerr", 15, 1 },
-		{ "ETpOutEthFifoPerr", 14, 1 },
-		{ "ETpInCplFifoPerr", 13, 1 },
-		{ "ETpInTcpOptFifoPerr", 12, 1 },
-		{ "ETpInTcpFifoPerr", 11, 1 },
-		{ "ETpInIpFifoPerr", 10, 1 },
-		{ "ETpInEthFifoPerr", 9, 1 },
-		{ "CTpOutCplFifoPerr", 8, 1 },
-		{ "CTpOutTcpFifoPerr", 7, 1 },
-		{ "CTpOutIpFifoPerr", 6, 1 },
-		{ "CTpOutEthFifoPerr", 5, 1 },
-		{ "CTpInCplFifoPerr", 4, 1 },
-		{ "CTpInTcpOpFifoPerr", 3, 1 },
-		{ "CTpInTcpFifoPerr", 2, 1 },
-		{ "CTpInIpFifoPerr", 1, 1 },
-		{ "CTpInEthFifoPerr", 0, 1 },
-	{ "TP_INT_CAUSE", 0x474, 0 },
-		{ "FlmTxFlstEmpty", 30, 1 },
-		{ "FlmRxFlstEmpty", 29, 1 },
-		{ "FlmPerrSet", 28, 1 },
-		{ "ProtocolSramPerr", 27, 1 },
-		{ "ArpLutPerr", 26, 1 },
-		{ "CmRcfOpPerr", 25, 1 },
-		{ "CmCachePerr", 24, 1 },
-		{ "CmRcfDataPerr", 23, 1 },
-		{ "DbL2tLutPerr", 22, 1 },
-		{ "DbTxTidPerr", 21, 1 },
-		{ "DbExtPerr", 20, 1 },
-		{ "DbOpPerr", 19, 1 },
-		{ "TmCachePerr", 18, 1 },
-		{ "ETpOutCplFifoPerr", 17, 1 },
-		{ "ETpOutTcpFifoPerr", 16, 1 },
-		{ "ETpOutIpFifoPerr", 15, 1 },
-		{ "ETpOutEthFifoPerr", 14, 1 },
-		{ "ETpInCplFifoPerr", 13, 1 },
-		{ "ETpInTcpOptFifoPerr", 12, 1 },
-		{ "ETpInTcpFifoPerr", 11, 1 },
-		{ "ETpInIpFifoPerr", 10, 1 },
-		{ "ETpInEthFifoPerr", 9, 1 },
-		{ "CTpOutCplFifoPerr", 8, 1 },
-		{ "CTpOutTcpFifoPerr", 7, 1 },
-		{ "CTpOutIpFifoPerr", 6, 1 },
-		{ "CTpOutEthFifoPerr", 5, 1 },
-		{ "CTpInCplFifoPerr", 4, 1 },
-		{ "CTpInTcpOpFifoPerr", 3, 1 },
-		{ "CTpInTcpFifoPerr", 2, 1 },
-		{ "CTpInIpFifoPerr", 1, 1 },
-		{ "CTpInEthFifoPerr", 0, 1 },
-	{ "TP_FLM_FREE_PS_CNT", 0x480, 0 },
-		{ "FreePstructCount", 0, 21 },
-	{ "TP_FLM_FREE_RX_CNT", 0x484, 0 },
-		{ "FreeRxPageCount", 0, 21 },
-	{ "TP_FLM_FREE_TX_CNT", 0x488, 0 },
-		{ "FreeTxPageCount", 0, 21 },
-	{ "TP_TM_HEAP_PUSH_CNT", 0x48c, 0 },
-	{ "TP_TM_HEAP_POP_CNT", 0x490, 0 },
-	{ "TP_TM_DACK_PUSH_CNT", 0x494, 0 },
-	{ "TP_TM_DACK_POP_CNT", 0x498, 0 },
-	{ "TP_TM_MOD_PUSH_CNT", 0x49c, 0 },
-	{ "TP_MOD_POP_CNT", 0x4a0, 0 },
-	{ "TP_TIMER_SEPARATOR", 0x4a4, 0 },
-	{ "TP_DEBUG_SEL", 0x4a8, 0 },
-	{ "TP_DEBUG_FLAGS", 0x4ac, 0 },
-		{ "RxTimerDackFirst", 26, 1 },
-		{ "RxTimerDack", 25, 1 },
-		{ "RxTimerHeartbeat", 24, 1 },
-		{ "RxPawsDrop", 23, 1 },
-		{ "RxUrgDataDrop", 22, 1 },
-		{ "RxFutureData", 21, 1 },
-		{ "RxRcvRxmData", 20, 1 },
-		{ "RxRcvOooDataFin", 19, 1 },
-		{ "RxRcvOooData", 18, 1 },
-		{ "RxRcvWndZero", 17, 1 },
-		{ "RxRcvWndLtMss", 16, 1 },
-		{ "TxDupAckInc", 11, 1 },
-		{ "TxRxmUrg", 10, 1 },
-		{ "TxRxmFin", 9, 1 },
-		{ "TxRxmSyn", 8, 1 },
-		{ "TxRxmNewReno", 7, 1 },
-		{ "TxRxmFast", 6, 1 },
-		{ "TxRxmTimer", 5, 1 },
-		{ "TxRxmTimerKeepalive", 4, 1 },
-		{ "TxRxmTimerPersist", 3, 1 },
-		{ "TxRcvAdvShrunk", 2, 1 },
-		{ "TxRcvAdvZero", 1, 1 },
-		{ "TxRcvAdvLtMss", 0, 1 },
-	{ "TP_PROXY_FLOW_CNTL", 0x4b0, 0 },
-	{ "TP_PC_CONGESTION_CNTL", 0x4b4, 0 },
-		{ "EDropTunnel", 19, 1 },
-		{ "CDropTunnel", 18, 1 },
-		{ "EThreshold", 12, 6 },
-		{ "CThreshold", 6, 6 },
-		{ "TxThreshold", 0, 6 },
-	{ "TP_TX_DROP_COUNT", 0x4bc, 0 },
-	{ "TP_CLEAR_DEBUG", 0x4c0, 0 },
-		{ "ClrDebug", 0, 1 },
-	{ "TP_DEBUG_VEC", 0x4c4, 0 },
-	{ "TP_DEBUG_VEC2", 0x4c8, 0 },
-	{ "TP_DEBUG_REG_SEL", 0x4cc, 0 },
-	{ "TP_DEBUG", 0x4d0, 0 },
-	{ "TP_DBG_LA_CONFIG", 0x4d4, 0 },
-	{ "TP_DBG_LA_DATAH", 0x4d8, 0 },
-	{ "TP_DBG_LA_DATAL", 0x4dc, 0 },
-	{ "TP_EMBED_OP_FIELD0", 0x4e8, 0 },
-	{ "TP_EMBED_OP_FIELD1", 0x4ec, 0 },
-	{ "TP_EMBED_OP_FIELD2", 0x4f0, 0 },
-	{ "TP_EMBED_OP_FIELD3", 0x4f4, 0 },
-	{ "TP_EMBED_OP_FIELD4", 0x4f8, 0 },
-	{ "TP_EMBED_OP_FIELD5", 0x4fc, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_ulp2_rx_regs[] = {
-	{ "ULPRX_CTL", 0x500, 0 },
-		{ "PCMD1Threshold", 24, 8 },
-		{ "PCMD0Threshold", 16, 8 },
-		{ "round_robin", 4, 1 },
-		{ "RDMA_permissive_mode", 3, 1 },
-		{ "PagePodME", 2, 1 },
-		{ "IscsiTagTcb", 1, 1 },
-		{ "TddpTagTcb", 0, 1 },
-	{ "ULPRX_INT_ENABLE", 0x504, 0 },
-		{ "DataSelFrameErr0", 7, 1 },
-		{ "DataSelFrameErr1", 6, 1 },
-		{ "PcmdMuxPerr", 5, 1 },
-		{ "ArbFPerr", 4, 1 },
-		{ "ArbPF0Perr", 3, 1 },
-		{ "ArbPF1Perr", 2, 1 },
-		{ "ParErrPcmd", 1, 1 },
-		{ "ParErrData", 0, 1 },
-	{ "ULPRX_INT_CAUSE", 0x508, 0 },
-		{ "DataSelFrameErr0", 7, 1 },
-		{ "DataSelFrameErr1", 6, 1 },
-		{ "PcmdMuxPerr", 5, 1 },
-		{ "ArbFPerr", 4, 1 },
-		{ "ArbPF0Perr", 3, 1 },
-		{ "ArbPF1Perr", 2, 1 },
-		{ "ParErrPcmd", 1, 1 },
-		{ "ParErrData", 0, 1 },
-	{ "ULPRX_ISCSI_LLIMIT", 0x50c, 0 },
-		{ "IscsiLlimit", 6, 26 },
-	{ "ULPRX_ISCSI_ULIMIT", 0x510, 0 },
-		{ "IscsiUlimit", 6, 26 },
-	{ "ULPRX_ISCSI_TAGMASK", 0x514, 0 },
-		{ "IscsiTagMask", 6, 26 },
-	{ "ULPRX_ISCSI_PSZ", 0x518, 0 },
-		{ "Hpz3", 24, 4 },
-		{ "Hpz2", 16, 4 },
-		{ "Hpz1", 8, 4 },
-		{ "Hpz0", 0, 4 },
-	{ "ULPRX_TDDP_LLIMIT", 0x51c, 0 },
-		{ "TddpLlimit", 6, 26 },
-	{ "ULPRX_TDDP_ULIMIT", 0x520, 0 },
-		{ "TddpUlimit", 6, 26 },
-	{ "ULPRX_TDDP_TAGMASK", 0x524, 0 },
-		{ "TddpTagMask", 6, 26 },
-	{ "ULPRX_TDDP_PSZ", 0x528, 0 },
-		{ "Hpz3", 24, 4 },
-		{ "Hpz2", 16, 4 },
-		{ "Hpz1", 8, 4 },
-		{ "Hpz0", 0, 4 },
-	{ "ULPRX_STAG_LLIMIT", 0x52c, 0 },
-	{ "ULPRX_STAG_ULIMIT", 0x530, 0 },
-	{ "ULPRX_RQ_LLIMIT", 0x534, 0 },
-	{ "ULPRX_RQ_ULIMIT", 0x538, 0 },
-	{ "ULPRX_PBL_LLIMIT", 0x53c, 0 },
-	{ "ULPRX_PBL_ULIMIT", 0x540, 0 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_ulp2_tx_regs[] = {
-	{ "ULPTX_CONFIG", 0x580, 0 },
-		{ "CFG_CQE_SOP_MASK", 1, 1 },
-		{ "CFG_RR_ARB", 0, 1 },
-	{ "ULPTX_INT_ENABLE", 0x584, 0 },
-		{ "cmd_fifo_perr_set1", 7, 1 },
-		{ "cmd_fifo_perr_set0", 6, 1 },
-		{ "lso_hdr_sram_perr_set1", 5, 1 },
-		{ "lso_hdr_sram_perr_set0", 4, 1 },
-		{ "imm_data_perr_set_ch1", 3, 1 },
-		{ "imm_data_perr_set_ch0", 2, 1 },
-		{ "Pbl_bound_err_ch1", 1, 1 },
-		{ "Pbl_bound_err_ch0", 0, 1 },
-	{ "ULPTX_INT_CAUSE", 0x588, 0 },
-		{ "cmd_fifo_perr_set1", 7, 1 },
-		{ "cmd_fifo_perr_set0", 6, 1 },
-		{ "lso_hdr_sram_perr_set1", 5, 1 },
-		{ "lso_hdr_sram_perr_set0", 4, 1 },
-		{ "imm_data_perr_set_ch1", 3, 1 },
-		{ "imm_data_perr_set_ch0", 2, 1 },
-		{ "Pbl_bound_err_ch1", 1, 1 },
-		{ "Pbl_bound_err_ch0", 0, 1 },
-	{ "ULPTX_TPT_LLIMIT", 0x58c, 0 },
-	{ "ULPTX_TPT_ULIMIT", 0x590, 0 },
-	{ "ULPTX_PBL_LLIMIT", 0x594, 0 },
-	{ "ULPTX_PBL_ULIMIT", 0x598, 0 },
-	{ "ULPTX_CPL_ERR_OFFSET", 0x59c, 0 },
-	{ "ULPTX_CPL_ERR_MASK", 0x5a0, 0 },
-	{ "ULPTX_CPL_ERR_VALUE", 0x5a4, 0 },
-	{ "ULPTX_CPL_PACK_SIZE", 0x5a8, 0 },
-		{ "value", 24, 8 },
-		{ "Ch1Size2", 24, 8 },
-		{ "Ch1Size1", 16, 8 },
-		{ "Ch0Size2", 8, 8 },
-		{ "Ch0Size1", 0, 8 },
-	{ "ULPTX_DMA_WEIGHT", 0x5ac, 0 },
-		{ "D1_WEIGHT", 16, 16 },
-		{ "D0_WEIGHT", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_pm1_rx_regs[] = {
-	{ "PM1_RX_CFG", 0x5c0, 0 },
-	{ "PM1_RX_MODE", 0x5c4, 0 },
-		{ "stat_channel", 1, 1 },
-		{ "priority_ch", 0, 1 },
-	{ "PM1_RX_STAT_CONFIG", 0x5c8, 0 },
-	{ "PM1_RX_STAT_COUNT", 0x5cc, 0 },
-	{ "PM1_RX_STAT_MSB", 0x5d0, 0 },
-	{ "PM1_RX_STAT_LSB", 0x5d4, 0 },
-	{ "PM1_RX_INT_ENABLE", 0x5d8, 0 },
-		{ "zero_e_cmd_error", 18, 1 },
-		{ "iespi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "iespi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "iespi0_Rx_framing_error", 15, 1 },
-		{ "iespi1_Rx_framing_error", 14, 1 },
-		{ "iespi0_Tx_framing_error", 13, 1 },
-		{ "iespi1_Tx_framing_error", 12, 1 },
-		{ "ocspi0_Rx_framing_error", 11, 1 },
-		{ "ocspi1_Rx_framing_error", 10, 1 },
-		{ "ocspi0_Tx_framing_error", 9, 1 },
-		{ "ocspi1_Tx_framing_error", 8, 1 },
-		{ "ocspi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "iespi_par_error", 3, 3 },
-		{ "ocspi_par_error", 0, 3 },
-	{ "PM1_RX_INT_CAUSE", 0x5dc, 0 },
-		{ "zero_e_cmd_error", 18, 1 },
-		{ "iespi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "iespi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "iespi0_Rx_framing_error", 15, 1 },
-		{ "iespi1_Rx_framing_error", 14, 1 },
-		{ "iespi0_Tx_framing_error", 13, 1 },
-		{ "iespi1_Tx_framing_error", 12, 1 },
-		{ "ocspi0_Rx_framing_error", 11, 1 },
-		{ "ocspi1_Rx_framing_error", 10, 1 },
-		{ "ocspi0_Tx_framing_error", 9, 1 },
-		{ "ocspi1_Tx_framing_error", 8, 1 },
-		{ "ocspi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "iespi_par_error", 3, 3 },
-		{ "ocspi_par_error", 0, 3 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_pm1_tx_regs[] = {
-	{ "PM1_TX_CFG", 0x5e0, 0 },
-	{ "PM1_TX_MODE", 0x5e4, 0 },
-		{ "stat_channel", 1, 1 },
-		{ "priority_ch", 0, 1 },
-	{ "PM1_TX_STAT_CONFIG", 0x5e8, 0 },
-	{ "PM1_TX_STAT_COUNT", 0x5ec, 0 },
-	{ "PM1_TX_STAT_MSB", 0x5f0, 0 },
-	{ "PM1_TX_STAT_LSB", 0x5f4, 0 },
-	{ "PM1_TX_INT_ENABLE", 0x5f8, 0 },
-		{ "zero_c_cmd_error", 18, 1 },
-		{ "icspi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "icspi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "icspi0_Rx_framing_error", 15, 1 },
-		{ "icspi1_Rx_framing_error", 14, 1 },
-		{ "icspi0_Tx_framing_error", 13, 1 },
-		{ "icspi1_Tx_framing_error", 12, 1 },
-		{ "oespi0_Rx_framing_error", 11, 1 },
-		{ "oespi1_Rx_framing_error", 10, 1 },
-		{ "oespi0_Tx_framing_error", 9, 1 },
-		{ "oespi1_Tx_framing_error", 8, 1 },
-		{ "oespi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "icspi_par_error", 3, 3 },
-		{ "oespi_par_error", 0, 3 },
-	{ "PM1_TX_INT_CAUSE", 0x5fc, 0 },
-		{ "zero_c_cmd_error", 18, 1 },
-		{ "icspi0_fifo2x_Rx_framing_error", 17, 1 },
-		{ "icspi1_fifo2x_Rx_framing_error", 16, 1 },
-		{ "icspi0_Rx_framing_error", 15, 1 },
-		{ "icspi1_Rx_framing_error", 14, 1 },
-		{ "icspi0_Tx_framing_error", 13, 1 },
-		{ "icspi1_Tx_framing_error", 12, 1 },
-		{ "oespi0_Rx_framing_error", 11, 1 },
-		{ "oespi1_Rx_framing_error", 10, 1 },
-		{ "oespi0_Tx_framing_error", 9, 1 },
-		{ "oespi1_Tx_framing_error", 8, 1 },
-		{ "oespi0_ofifo2x_Tx_framing_error", 7, 1 },
-		{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
-		{ "icspi_par_error", 3, 3 },
-		{ "oespi_par_error", 0, 3 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_mps0_regs[] = {
-	{ "MPS_CFG", 0x600, 0 },
-		{ "EnForcePkt", 11, 1 },
-		{ "SGETPQid", 8, 3 },
-		{ "TPRxPortSize", 7, 1 },
-		{ "TPTxPort1Size", 6, 1 },
-		{ "TPTxPort0Size", 5, 1 },
-		{ "TPRxPortEn", 4, 1 },
-		{ "TPTxPort1En", 3, 1 },
-		{ "TPTxPort0En", 2, 1 },
-		{ "Port1Active", 1, 1 },
-		{ "Port0Active", 0, 1 },
-	{ "MPS_DRR_CFG1", 0x604, 0 },
-		{ "RldWtTPD1", 11, 11 },
-		{ "RldWtTPD0", 0, 11 },
-	{ "MPS_DRR_CFG2", 0x608, 0 },
-		{ "RldWtTotal", 0, 12 },
-	{ "MPS_MCA_STATUS", 0x60c, 0 },
-		{ "MCAPktCnt", 12, 20 },
-		{ "MCADepth", 0, 12 },
-	{ "MPS_TX0_TP_CNT", 0x610, 0 },
-		{ "TX0TPDisCnt", 24, 8 },
-		{ "TX0TPCnt", 0, 24 },
-	{ "MPS_TX1_TP_CNT", 0x614, 0 },
-		{ "TX1TPDisCnt", 24, 8 },
-		{ "TX1TPCnt", 0, 24 },
-	{ "MPS_RX_TP_CNT", 0x618, 0 },
-		{ "RXTPDisCnt", 24, 8 },
-		{ "RXTPCnt", 0, 24 },
-	{ "MPS_INT_ENABLE", 0x61c, 0 },
-		{ "MCAParErrEnb", 6, 3 },
-		{ "RXTpParErrEnb", 4, 2 },
-		{ "TX1TpParErrEnb", 2, 2 },
-		{ "TX0TpParErrEnb", 0, 2 },
-	{ "MPS_INT_CAUSE", 0x620, 0 },
-		{ "MCAParErr", 6, 3 },
-		{ "RXTpParErr", 4, 2 },
-		{ "TX1TpParErr", 2, 2 },
-		{ "TX0TpParErr", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_cpl_switch_regs[] = {
-	{ "CPL_SWITCH_CNTRL", 0x640, 0 },
-		{ "cpl_pkt_tid", 8, 24 },
-		{ "cim_to_up_full_size", 4, 1 },
-		{ "cpu_no_3F_CIM_enable", 3, 1 },
-		{ "switch_table_enable", 2, 1 },
-		{ "sge_enable", 1, 1 },
-		{ "cim_enable", 0, 1 },
-	{ "CPL_SWITCH_TBL_IDX", 0x644, 0 },
-		{ "switch_tbl_idx", 0, 4 },
-	{ "CPL_SWITCH_TBL_DATA", 0x648, 0 },
-	{ "CPL_SWITCH_ZERO_ERROR", 0x64c, 0 },
-		{ "zero_cmd", 0, 8 },
-	{ "CPL_INTR_ENABLE", 0x650, 0 },
-		{ "cim_op_map_perr", 5, 1 },
-		{ "cim_ovfl_error", 4, 1 },
-		{ "tp_framing_error", 3, 1 },
-		{ "sge_framing_error", 2, 1 },
-		{ "cim_framing_error", 1, 1 },
-		{ "zero_switch_error", 0, 1 },
-	{ "CPL_INTR_CAUSE", 0x654, 0 },
-		{ "cim_op_map_perr", 5, 1 },
-		{ "cim_ovfl_error", 4, 1 },
-		{ "tp_framing_error", 3, 1 },
-		{ "sge_framing_error", 2, 1 },
-		{ "cim_framing_error", 1, 1 },
-		{ "zero_switch_error", 0, 1 },
-	{ "CPL_MAP_TBL_IDX", 0x658, 0 },
-		{ "cpl_map_tbl_idx", 0, 8 },
-	{ "CPL_MAP_TBL_DATA", 0x65c, 0 },
-		{ "cpl_map_tbl_data", 0, 8 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_smb0_regs[] = {
-	{ "SMB_GLOBAL_TIME_CFG", 0x660, 0 },
-		{ "LADbgWrPtr", 24, 8 },
-		{ "LADbgRdPtr", 16, 8 },
-		{ "LADbgEn", 13, 1 },
-		{ "MacroCntCfg", 8, 5 },
-		{ "MicroCntCfg", 0, 8 },
-	{ "SMB_MST_TIMEOUT_CFG", 0x664, 0 },
-		{ "DebugSelH", 28, 4 },
-		{ "DebugSelL", 24, 4 },
-		{ "MstTimeOutCfg", 0, 24 },
-	{ "SMB_MST_CTL_CFG", 0x668, 0 },
-		{ "MstFifoDbg", 31, 1 },
-		{ "MstFifoDbgClr", 30, 1 },
-		{ "MstRxByteCfg", 12, 6 },
-		{ "MstTxByteCfg", 6, 6 },
-		{ "MstReset", 1, 1 },
-		{ "MstCtlEn", 0, 1 },
-	{ "SMB_MST_CTL_STS", 0x66c, 0 },
-		{ "MstRxByteCnt", 12, 6 },
-		{ "MstTxByteCnt", 6, 6 },
-		{ "MstBusySts", 0, 1 },
-	{ "SMB_MST_TX_FIFO_RDWR", 0x670, 0 },
-	{ "SMB_MST_RX_FIFO_RDWR", 0x674, 0 },
-	{ "SMB_SLV_TIMEOUT_CFG", 0x678, 0 },
-		{ "SlvTimeOutCfg", 0, 24 },
-	{ "SMB_SLV_CTL_CFG", 0x67c, 0 },
-		{ "SlvFifoDbg", 31, 1 },
-		{ "SlvFifoDbgClr", 30, 1 },
-		{ "SlvAddrCfg", 4, 7 },
-		{ "SlvAlrtSet", 2, 1 },
-		{ "SlvReset", 1, 1 },
-		{ "SlvCtlEn", 0, 1 },
-	{ "SMB_SLV_CTL_STS", 0x680, 0 },
-		{ "SlvFifoTxCnt", 12, 6 },
-		{ "SlvFifoCnt", 6, 6 },
-		{ "SlvAlrtSts", 2, 1 },
-		{ "SlvBusySts", 0, 1 },
-	{ "SMB_SLV_FIFO_RDWR", 0x684, 0 },
-	{ "SMB_SLV_CMD_FIFO_RDWR", 0x688, 0 },
-	{ "SMB_INT_ENABLE", 0x68c, 0 },
-		{ "SlvTimeOutIntEn", 7, 1 },
-		{ "SlvErrIntEn", 6, 1 },
-		{ "SlvDoneIntEn", 5, 1 },
-		{ "SlvRxRdyIntEn", 4, 1 },
-		{ "MstTimeOutIntEn", 3, 1 },
-		{ "MstNAckIntEn", 2, 1 },
-		{ "MstLostArbIntEn", 1, 1 },
-		{ "MstDoneIntEn", 0, 1 },
-	{ "SMB_INT_CAUSE", 0x690, 0 },
-		{ "SlvTimeOutInt", 7, 1 },
-		{ "SlvErrInt", 6, 1 },
-		{ "SlvDoneInt", 5, 1 },
-		{ "SlvRxRdyInt", 4, 1 },
-		{ "MstTimeOutInt", 3, 1 },
-		{ "MstNAckInt", 2, 1 },
-		{ "MstLostArbInt", 1, 1 },
-		{ "MstDoneInt", 0, 1 },
-	{ "SMB_DEBUG_DATA", 0x694, 0 },
-		{ "DebugDataH", 16, 16 },
-		{ "DebugDataL", 0, 16 },
-	{ "SMB_DEBUG_LA", 0x69c, 0 },
-		{ "DebugLAReqAddr", 0, 10 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_i2cm0_regs[] = {
-	{ "I2C_CFG", 0x6a0, 0 },
-		{ "ClkDiv", 0, 12 },
-	{ "I2C_DATA", 0x6a4, 0 },
-		{ "Data", 0, 8 },
-	{ "I2C_OP", 0x6a8, 0 },
-		{ "Busy", 31, 1 },
-		{ "Ack", 30, 1 },
-		{ "Cont", 1, 1 },
-		{ "Op", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_mi1_regs[] = {
-	{ "MI1_CFG", 0x6b0, 0 },
-		{ "ClkDiv", 5, 8 },
-		{ "St", 3, 2 },
-		{ "PreEn", 2, 1 },
-		{ "MDIInv", 1, 1 },
-		{ "MDIEn", 0, 1 },
-	{ "MI1_ADDR", 0x6b4, 0 },
-		{ "PhyAddr", 5, 5 },
-		{ "RegAddr", 0, 5 },
-	{ "MI1_DATA", 0x6b8, 0 },
-		{ "Data", 0, 16 },
-	{ "MI1_OP", 0x6bc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Inc", 2, 1 },
-		{ "Op", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_jm1_regs[] = {
-	{ "JM_CFG", 0x6c0, 0 },
-		{ "ClkDiv", 2, 8 },
-		{ "TRst", 1, 1 },
-		{ "En", 0, 1 },
-	{ "JM_MODE", 0x6c4, 0 },
-	{ "JM_DATA", 0x6c8, 0 },
-	{ "JM_OP", 0x6cc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Cnt", 0, 5 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_sf1_regs[] = {
-	{ "SF_DATA", 0x6d8, 0 },
-	{ "SF_OP", 0x6dc, 0 },
-		{ "Busy", 31, 1 },
-		{ "Cont", 3, 1 },
-		{ "ByteCnt", 1, 2 },
-		{ "Op", 0, 1 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_pl3_regs[] = {
-	{ "PL_INT_ENABLE0", 0x6e0, 0 },
-		{ "SW", 25, 1 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_CAUSE0", 0x6e4, 0 },
-		{ "SW", 25, 1 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_ENABLE1", 0x6e8, 0 },
-		{ "SW", 25, 1 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_INT_CAUSE1", 0x6ec, 0 },
-		{ "SW", 25, 1 },
-		{ "EXT", 24, 1 },
-		{ "T3DBG", 23, 1 },
-		{ "XGMAC0_1", 20, 1 },
-		{ "XGMAC0_0", 19, 1 },
-		{ "MC5A", 18, 1 },
-		{ "SF1", 17, 1 },
-		{ "SMB0", 15, 1 },
-		{ "I2CM0", 14, 1 },
-		{ "MI1", 13, 1 },
-		{ "CPL_SWITCH", 12, 1 },
-		{ "MPS0", 11, 1 },
-		{ "PM1_TX", 10, 1 },
-		{ "PM1_RX", 9, 1 },
-		{ "ULP2_TX", 8, 1 },
-		{ "ULP2_RX", 7, 1 },
-		{ "TP1", 6, 1 },
-		{ "CIM", 5, 1 },
-		{ "MC7_CM", 4, 1 },
-		{ "MC7_PMTX", 3, 1 },
-		{ "MC7_PMRX", 2, 1 },
-		{ "PCIM0", 1, 1 },
-		{ "SGE3", 0, 1 },
-	{ "PL_RST", 0x6f0, 0 },
-		{ "FatalPerrEn", 4, 1 },
-		{ "SWInt1", 3, 1 },
-		{ "SWInt0", 2, 1 },
-		{ "CRstWrm", 1, 1 },
-		{ "CRstWrmMode", 0, 1 },
-	{ "PL_REV", 0x6f4, 0 },
-		{ "Rev", 0, 4 },
-	{ "PL_CLI", 0x6f8, 0 },
-	{ "PL_LCK", 0x6fc, 0 },
-		{ "Lck", 0, 2 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_mc5a_regs[] = {
-	{ "MC5_BUF_CONFIG", 0x700, 0 },
-		{ "term300_240", 31, 1 },
-		{ "term150", 30, 1 },
-		{ "term60", 29, 1 },
-		{ "gddriii", 28, 1 },
-		{ "gddrii", 27, 1 },
-		{ "gddri", 26, 1 },
-		{ "read", 25, 1 },
-		{ "imp_set_update", 24, 1 },
-		{ "cal_update", 23, 1 },
-		{ "cal_busy", 22, 1 },
-		{ "cal_error", 21, 1 },
-		{ "sgl_cal_en", 20, 1 },
-		{ "imp_upd_mode", 19, 1 },
-		{ "imp_sel", 18, 1 },
-		{ "man_pu", 15, 3 },
-		{ "man_pd", 12, 3 },
-		{ "cal_pu", 9, 3 },
-		{ "cal_pd", 6, 3 },
-		{ "set_pu", 3, 3 },
-		{ "set_pd", 0, 3 },
-	{ "MC5_DB_CONFIG", 0x704, 0 },
-		{ "TMCfgWrLock", 31, 1 },
-		{ "TMTypeHi", 30, 1 },
-		{ "TMPartSize", 28, 2 },
-		{ "TMType", 26, 2 },
-		{ "TMPartCount", 24, 2 },
-		{ "nLIP", 18, 6 },
-		{ "COMPEN", 17, 1 },
-		{ "BUILD", 16, 1 },
-		{ "FilterEn", 11, 1 },
-		{ "CLIPUpdate", 10, 1 },
-		{ "TM_IO_PDOWN", 9, 1 },
-		{ "SYNMode", 7, 2 },
-		{ "PRTYEN", 6, 1 },
-		{ "MBUSEN", 5, 1 },
-		{ "DBGIEN", 4, 1 },
-		{ "TcmCfgOvr", 3, 1 },
-		{ "TMRDY", 2, 1 },
-		{ "TMRST", 1, 1 },
-		{ "TMMode", 0, 1 },
-	{ "MC5_MISC", 0x708, 0 },
-		{ "LIP_Cmp_Unavailable", 0, 4 },
-	{ "MC5_DB_ROUTING_TABLE_INDEX", 0x70c, 0 },
-		{ "RTINDX", 0, 22 },
-	{ "MC5_DB_FILTER_TABLE", 0x710, 0 },
-		{ "SRINDX", 0, 22 },
-	{ "MC5_DB_SERVER_INDEX", 0x714, 0 },
-		{ "SRINDX", 0, 22 },
-	{ "MC5_DB_LIP_RAM_ADDR", 0x718, 0 },
-		{ "RAMWR", 8, 1 },
-		{ "RAMADDR", 0, 6 },
-	{ "MC5_DB_LIP_RAM_DATA", 0x71c, 0 },
-	{ "MC5_DB_RSP_LATENCY", 0x720, 0 },
-		{ "RDLAT", 16, 5 },
-		{ "LRNLAT", 8, 5 },
-		{ "SRCHLAT", 0, 5 },
-	{ "MC5_DB_PARITY_LATENCY", 0x724, 0 },
-		{ "PARLAT", 0, 4 },
-	{ "MC5_DB_WR_LRN_VERIFY", 0x728, 0 },
-		{ "VWVEREN", 2, 1 },
-		{ "LRNVEREN", 1, 1 },
-		{ "POVEREN", 0, 1 },
-	{ "MC5_DB_PART_ID_INDEX", 0x72c, 0 },
-		{ "IDINDEX", 0, 4 },
-	{ "MC5_DB_RESET_MAX", 0x730, 0 },
-		{ "RSTMAX", 0, 4 },
-	{ "MC5_DB_ACT_CNT", 0x734, 0 },
-		{ "ACTCNT", 0, 20 },
-	{ "MC5_DB_CLIP_MAP", 0x738, 0 },
-		{ "CLIPMapOp", 31, 1 },
-		{ "CLIPMapVal", 16, 6 },
-		{ "CLIPMapAddr", 0, 6 },
-	{ "MC5_DB_SIZE", 0x73c, 0 },
-	{ "MC5_DB_INT_ENABLE", 0x740, 0 },
-		{ "MsgSel", 28, 4 },
-		{ "DelActEmpty", 18, 1 },
-		{ "DispQParErr", 17, 1 },
-		{ "ReqQParErr", 16, 1 },
-		{ "UnknownCmd", 15, 1 },
-		{ "SYNCookieOff", 11, 1 },
-		{ "SYNCookieBad", 10, 1 },
-		{ "SYNCookie", 9, 1 },
-		{ "NFASrchFail", 8, 1 },
-		{ "ActRgnFull", 7, 1 },
-		{ "ParityErr", 6, 1 },
-		{ "LIPMiss", 5, 1 },
-		{ "LIP0", 4, 1 },
-		{ "Miss", 3, 1 },
-		{ "RoutingHit", 2, 1 },
-		{ "ActiveHit", 1, 1 },
-		{ "ActiveOutHit", 0, 1 },
-	{ "MC5_DB_INT_CAUSE", 0x744, 0 },
-		{ "DelActEmpty", 18, 1 },
-		{ "DispQParErr", 17, 1 },
-		{ "ReqQParErr", 16, 1 },
-		{ "UnknownCmd", 15, 1 },
-		{ "SYNCookieOff", 11, 1 },
-		{ "SYNCookieBad", 10, 1 },
-		{ "SYNCookie", 9, 1 },
-		{ "NFASrchFail", 8, 1 },
-		{ "ActRgnFull", 7, 1 },
-		{ "ParityErr", 6, 1 },
-		{ "LIPMiss", 5, 1 },
-		{ "LIP0", 4, 1 },
-		{ "Miss", 3, 1 },
-		{ "RoutingHit", 2, 1 },
-		{ "ActiveHit", 1, 1 },
-		{ "ActiveOutHit", 0, 1 },
-	{ "MC5_DB_INT_TID", 0x748, 0 },
-		{ "INTTID", 0, 20 },
-	{ "MC5_DB_INT_PTID", 0x74c, 0 },
-		{ "INTPTID", 0, 20 },
-	{ "MC5_DB_DBGI_CONFIG", 0x774, 0 },
-		{ "WRReqSize", 22, 10 },
-		{ "SADRSel", 4, 1 },
-		{ "CMDMode", 0, 3 },
-	{ "MC5_DB_DBGI_REQ_CMD", 0x778, 0 },
-		{ "MBusCmd", 0, 4 },
-		{ "IDTCmdHi", 11, 3 },
-		{ "IDTCmdLo", 0, 4 },
-		{ "IDTCmd", 0, 20 },
-		{ "LCMDB", 16, 11 },
-		{ "LCMDA", 0, 11 },
-	{ "MC5_DB_DBGI_REQ_ADDR0", 0x77c, 0 },
-	{ "MC5_DB_DBGI_REQ_ADDR1", 0x780, 0 },
-	{ "MC5_DB_DBGI_REQ_ADDR2", 0x784, 0 },
-		{ "DBGIReqAdrHi", 0, 8 },
-	{ "MC5_DB_DBGI_REQ_DATA0", 0x788, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA1", 0x78c, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA2", 0x790, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA3", 0x794, 0 },
-	{ "MC5_DB_DBGI_REQ_DATA4", 0x798, 0 },
-		{ "DBGIReqData4", 0, 16 },
-	{ "MC5_DB_DBGI_REQ_MASK0", 0x79c, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK1", 0x7a0, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK2", 0x7a4, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK3", 0x7a8, 0 },
-	{ "MC5_DB_DBGI_REQ_MASK4", 0x7ac, 0 },
-		{ "DBGIReqMsk4", 0, 16 },
-	{ "MC5_DB_DBGI_RSP_STATUS", 0x7b0, 0 },
-		{ "DBGIRspMsg", 8, 4 },
-		{ "DBGIRspMsgVld", 2, 1 },
-		{ "DBGIRspHit", 1, 1 },
-		{ "DBGIRspValid", 0, 1 },
-	{ "MC5_DB_DBGI_RSP_DATA0", 0x7b4, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA1", 0x7b8, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA2", 0x7bc, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA3", 0x7c0, 0 },
-	{ "MC5_DB_DBGI_RSP_DATA4", 0x7c4, 0 },
-		{ "DBGIRspData3", 0, 16 },
-	{ "MC5_DB_DBGI_RSP_LAST_CMD", 0x7c8, 0 },
-		{ "LastCmdB", 16, 11 },
-		{ "LastCmdA", 0, 11 },
-	{ "MC5_DB_POPEN_DATA_WR_CMD", 0x7cc, 0 },
-		{ "PO_DWR", 0, 20 },
-	{ "MC5_DB_POPEN_MASK_WR_CMD", 0x7d0, 0 },
-		{ "PO_MWR", 0, 20 },
-	{ "MC5_DB_AOPEN_SRCH_CMD", 0x7d4, 0 },
-		{ "AO_SRCH", 0, 20 },
-	{ "MC5_DB_AOPEN_LRN_CMD", 0x7d8, 0 },
-		{ "AO_LRN", 0, 20 },
-	{ "MC5_DB_SYN_SRCH_CMD", 0x7dc, 0 },
-		{ "SYN_SRCH", 0, 20 },
-	{ "MC5_DB_SYN_LRN_CMD", 0x7e0, 0 },
-		{ "SYN_LRN", 0, 20 },
-	{ "MC5_DB_ACK_SRCH_CMD", 0x7e4, 0 },
-		{ "ACK_SRCH", 0, 20 },
-	{ "MC5_DB_ACK_LRN_CMD", 0x7e8, 0 },
-		{ "ACK_LRN", 0, 20 },
-	{ "MC5_DB_ILOOKUP_CMD", 0x7ec, 0 },
-		{ "I_SRCH", 0, 20 },
-	{ "MC5_DB_ELOOKUP_CMD", 0x7f0, 0 },
-		{ "E_SRCH", 0, 20 },
-	{ "MC5_DB_DATA_WRITE_CMD", 0x7f4, 0 },
-		{ "Write", 0, 20 },
-	{ "MC5_DB_DATA_READ_CMD", 0x7f8, 0 },
-		{ "ReadCmd", 0, 20 },
-	{ "MC5_DB_MASK_WRITE_CMD", 0x7fc, 0 },
-		{ "MaskWr", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_xgmac0_0_regs[] = {
-	{ "XGM_TX_CTRL", 0x800, 0 },
-		{ "SendPause", 2, 1 },
-		{ "SendZeroPause", 1, 1 },
-		{ "TxEn", 0, 1 },
-	{ "XGM_TX_CFG", 0x804, 0 },
-		{ "CfgClkSpeed", 2, 3 },
-		{ "StretchMode", 1, 1 },
-		{ "TxPauseEn", 0, 1 },
-	{ "XGM_TX_PAUSE_QUANTA", 0x808, 0 },
-		{ "TxPauseQuanta", 0, 16 },
-	{ "XGM_RX_CTRL", 0x80c, 0 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_RX_CFG", 0x810, 0 },
-		{ "Con802_3Preamble", 12, 1 },
-		{ "EnNon802_3Preamble", 11, 1 },
-		{ "CopyPreamble", 10, 1 },
-		{ "DisPauseFrames", 9, 1 },
-		{ "En1536BFrames", 8, 1 },
-		{ "EnJumbo", 7, 1 },
-		{ "RmFCS", 6, 1 },
-		{ "DisNonVlan", 5, 1 },
-		{ "EnExtMatch", 4, 1 },
-		{ "EnHashUcast", 3, 1 },
-		{ "EnHashMcast", 2, 1 },
-		{ "DisBCast", 1, 1 },
-		{ "CopyAllFrames", 0, 1 },
-	{ "XGM_RX_HASH_LOW", 0x814, 0 },
-	{ "XGM_RX_HASH_HIGH", 0x818, 0 },
-	{ "XGM_RX_EXACT_MATCH_LOW_1", 0x81c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_1", 0x820, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_2", 0x824, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_2", 0x828, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_3", 0x82c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_3", 0x830, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_4", 0x834, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_4", 0x838, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_5", 0x83c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_5", 0x840, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_6", 0x844, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_6", 0x848, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_7", 0x84c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_7", 0x850, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_8", 0x854, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_8", 0x858, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_1", 0x85c, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_2", 0x860, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_3", 0x864, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_4", 0x868, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_INT_STATUS", 0x86c, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_MASK", 0x870, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_ENABLE", 0x874, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_DISABLE", 0x878, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_TX_PAUSE_TIMER", 0x87c, 0 },
-		{ "CurPauseTimer", 0, 16 },
-	{ "XGM_STAT_CTRL", 0x880, 0 },
-		{ "ReadSnpShot", 4, 1 },
-		{ "TakeSnpShot", 3, 1 },
-		{ "ClrStats", 2, 1 },
-		{ "IncrStats", 1, 1 },
-		{ "EnTestModeWr", 0, 1 },
-	{ "XGM_RXFIFO_CFG", 0x884, 0 },
-		{ "RxFIFO_empty", 31, 1 },
-		{ "RxFIFO_full", 30, 1 },
-		{ "RxFIFOPauseHWM", 17, 12 },
-		{ "RxFIFOPauseLWM", 5, 12 },
-		{ "ForcedPause", 4, 1 },
-		{ "ExternLoopback", 3, 1 },
-		{ "RxByteSwap", 2, 1 },
-		{ "RxStrFrwrd", 1, 1 },
-		{ "DisErrFrames", 0, 1 },
-	{ "XGM_TXFIFO_CFG", 0x888, 0 },
-		{ "TxFIFO_empty", 31, 1 },
-		{ "TxFIFO_full", 30, 1 },
-		{ "UnderunFix", 22, 1 },
-		{ "EnDropPkt", 21, 1 },
-		{ "TxIPG", 13, 8 },
-		{ "TxFIFOThresh", 4, 9 },
-		{ "InternLoopback", 3, 1 },
-		{ "TxByteSwap", 2, 1 },
-		{ "DisCRC", 1, 1 },
-		{ "DisPreAmble", 0, 1 },
-	{ "XGM_SLOW_TIMER", 0x88c, 0 },
-		{ "PauseSlowTimerEn", 31, 1 },
-		{ "PauseSlowTimer", 0, 20 },
-	{ "XGM_PAUSE_TIMER", 0x890, 0 },
-		{ "PauseTimer", 0, 20 },
-	{ "XGM_XAUI_PCS_TEST", 0x894, 0 },
-		{ "TestPattern", 1, 2 },
-		{ "EnTest", 0, 1 },
-	{ "XGM_RGMII_CTRL", 0x898, 0 },
-		{ "PhAlignFIFOThresh", 1, 2 },
-		{ "TxClk90Shift", 0, 1 },
-	{ "XGM_RGMII_IMP", 0x89c, 0 },
-		{ "CalReset", 8, 1 },
-		{ "CalUpdate", 7, 1 },
-		{ "ImpSetUpdate", 6, 1 },
-		{ "RGMIIImpPD", 3, 3 },
-		{ "RGMIIImpPU", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE", 0x8a8, 0 },
-		{ "RxMaxFramerSize", 17, 14 },
-		{ "RxEnErrorGather", 16, 1 },
-		{ "RxEnSingleFlit", 15, 1 },
-		{ "RxEnFramer", 14, 1 },
-		{ "RxMaxPktSize", 0, 14 },
-	{ "XGM_RESET_CTRL", 0x8ac, 0 },
-		{ "XGMAC_STOP_EN", 4, 1 },
-		{ "XG2G_Reset_", 3, 1 },
-		{ "RGMII_Reset_", 2, 1 },
-		{ "PCS_Reset_", 1, 1 },
-		{ "MAC_Reset_", 0, 1 },
-	{ "XGM_XAUI1G_CTRL", 0x8b0, 0 },
-		{ "XAUI1GLinkId", 0, 2 },
-	{ "XGM_SERDES_LANE_CTRL", 0x8b4, 0 },
-		{ "LaneReversal", 8, 1 },
-		{ "TxPolarity", 4, 4 },
-		{ "RxPolarity", 0, 4 },
-	{ "XGM_PORT_CFG", 0x8b8, 0 },
-		{ "SafeSpeedChange", 4, 1 },
-		{ "ClkDivReset_", 3, 1 },
-		{ "PortSpeed", 1, 2 },
-		{ "EnRGMII", 0, 1 },
-	{ "XGM_EPIO_DATA0", 0x8c0, 0 },
-	{ "XGM_EPIO_DATA1", 0x8c4, 0 },
-	{ "XGM_EPIO_DATA2", 0x8c8, 0 },
-	{ "XGM_EPIO_DATA3", 0x8cc, 0 },
-	{ "XGM_EPIO_OP", 0x8d0, 0 },
-		{ "PIO_Ready", 31, 1 },
-		{ "PIO_WrRd", 24, 1 },
-		{ "PIO_Address", 0, 8 },
-	{ "XGM_INT_ENABLE", 0x8d4, 0 },
-		{ "XAUIPCSDECErr", 24, 1 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBISTErr", 8, 4 },
-		{ "SERDESLowSigChange", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_INT_CAUSE", 0x8d8, 0 },
-		{ "XAUIPCSDECErr", 24, 1 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBISTErr", 8, 4 },
-		{ "SERDESLowSigChange", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_XAUI_ACT_CTRL", 0x8dc, 0 },
-		{ "TxEn", 1, 1 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_SERDES_CTRL0", 0x8e0, 0 },
-		{ "IntSerLPBK3", 27, 1 },
-		{ "IntSerLPBK2", 26, 1 },
-		{ "IntSerLPBK1", 25, 1 },
-		{ "IntSerLPBK0", 24, 1 },
-		{ "Reset3", 23, 1 },
-		{ "Reset2", 22, 1 },
-		{ "Reset1", 21, 1 },
-		{ "Reset0", 20, 1 },
-		{ "Pwrdn3", 19, 1 },
-		{ "Pwrdn2", 18, 1 },
-		{ "Pwrdn1", 17, 1 },
-		{ "Pwrdn0", 16, 1 },
-		{ "ResetPLL23", 15, 1 },
-		{ "ResetPLL01", 14, 1 },
-		{ "PW23", 12, 2 },
-		{ "PW01", 10, 2 },
-		{ "Deq", 6, 4 },
-		{ "Dtx", 2, 4 },
-		{ "LoDrv", 1, 1 },
-		{ "HiDrv", 0, 1 },
-	{ "XGM_SERDES_CTRL1", 0x8e4, 0 },
-		{ "FmOffset3", 19, 5 },
-		{ "FmOffsetEn3", 18, 1 },
-		{ "FmOffset2", 13, 5 },
-		{ "FmOffsetEn2", 12, 1 },
-		{ "FmOffset1", 7, 5 },
-		{ "FmOffsetEn1", 6, 1 },
-		{ "FmOffset0", 1, 5 },
-		{ "FmOffsetEn0", 0, 1 },
-	{ "XGM_SERDES_CTRL2", 0x8e8, 0 },
-		{ "DnIn3", 11, 1 },
-		{ "UpIn3", 10, 1 },
-		{ "RxSlave3", 9, 1 },
-		{ "DnIn2", 8, 1 },
-		{ "UpIn2", 7, 1 },
-		{ "RxSlave2", 6, 1 },
-		{ "DnIn1", 5, 1 },
-		{ "UpIn1", 4, 1 },
-		{ "RxSlave1", 3, 1 },
-		{ "DnIn0", 2, 1 },
-		{ "UpIn0", 1, 1 },
-		{ "RxSlave0", 0, 1 },
-	{ "XGM_SERDES_CTRL3", 0x8ec, 0 },
-		{ "ExtBISTChkErrClr3", 31, 1 },
-		{ "ExtBISTChkEn3", 30, 1 },
-		{ "ExtBISTGenEn3", 29, 1 },
-		{ "ExtBISTPat3", 26, 3 },
-		{ "ExtParReset3", 25, 1 },
-		{ "ExtParLPBK3", 24, 1 },
-		{ "ExtBISTChkErrClr2", 23, 1 },
-		{ "ExtBISTChkEn2", 22, 1 },
-		{ "ExtBISTGenEn2", 21, 1 },
-		{ "ExtBISTPat2", 18, 3 },
-		{ "ExtParReset2", 17, 1 },
-		{ "ExtParLPBK2", 16, 1 },
-		{ "ExtBISTChkErrClr1", 15, 1 },
-		{ "ExtBISTChkEn1", 14, 1 },
-		{ "ExtBISTGenEn1", 13, 1 },
-		{ "ExtBISTPat1", 10, 3 },
-		{ "ExtParReset1", 9, 1 },
-		{ "ExtParLPBK1", 8, 1 },
-		{ "ExtBISTChkErrClr0", 7, 1 },
-		{ "ExtBISTChkEn0", 6, 1 },
-		{ "ExtBISTGenEn0", 5, 1 },
-		{ "ExtBISTPat0", 2, 3 },
-		{ "ExtParReset0", 1, 1 },
-		{ "ExtParLPBK0", 0, 1 },
-	{ "XGM_SERDES_STAT0", 0x8f0, 0 },
-		{ "ExtBISTChkErrCnt0", 4, 24 },
-		{ "ExtBISTChkFmd0", 3, 1 },
-		{ "LowSigForceEn0", 2, 1 },
-		{ "LowSigForceValue0", 1, 1 },
-		{ "LowSig0", 0, 1 },
-	{ "XGM_SERDES_STAT1", 0x8f4, 0 },
-		{ "ExtBISTChkErrCnt1", 4, 24 },
-		{ "ExtBISTChkFmd1", 3, 1 },
-		{ "LowSigForceEn1", 2, 1 },
-		{ "LowSigForceValue1", 1, 1 },
-		{ "LowSig1", 0, 1 },
-	{ "XGM_SERDES_STAT2", 0x8f8, 0 },
-		{ "ExtBISTChkErrCnt2", 4, 24 },
-		{ "ExtBISTChkFmd2", 3, 1 },
-		{ "LowSigForceEn2", 2, 1 },
-		{ "LowSigForceValue2", 1, 1 },
-		{ "LowSig2", 0, 1 },
-	{ "XGM_SERDES_STAT3", 0x8fc, 0 },
-		{ "ExtBISTChkErrCnt3", 4, 24 },
-		{ "ExtBISTChkFmd3", 3, 1 },
-		{ "LowSigForceEn3", 2, 1 },
-		{ "LowSigForceValue3", 1, 1 },
-		{ "LowSig3", 0, 1 },
-	{ "XGM_STAT_TX_BYTE_LOW", 0x900, 0 },
-	{ "XGM_STAT_TX_BYTE_HIGH", 0x904, 0 },
-		{ "TxBytes_high", 0, 13 },
-	{ "XGM_STAT_TX_FRAME_LOW", 0x908, 0 },
-	{ "XGM_STAT_TX_FRAME_HIGH", 0x90c, 0 },
-		{ "TxFrames_high", 0, 4 },
-	{ "XGM_STAT_TX_BCAST", 0x910, 0 },
-	{ "XGM_STAT_TX_MCAST", 0x914, 0 },
-	{ "XGM_STAT_TX_PAUSE", 0x918, 0 },
-	{ "XGM_STAT_TX_64B_FRAMES", 0x91c, 0 },
-	{ "XGM_STAT_TX_65_127B_FRAMES", 0x920, 0 },
-	{ "XGM_STAT_TX_128_255B_FRAMES", 0x924, 0 },
-	{ "XGM_STAT_TX_256_511B_FRAMES", 0x928, 0 },
-	{ "XGM_STAT_TX_512_1023B_FRAMES", 0x92c, 0 },
-	{ "XGM_STAT_TX_1024_1518B_FRAMES", 0x930, 0 },
-	{ "XGM_STAT_TX_1519_MAXB_FRAMES", 0x934, 0 },
-	{ "XGM_STAT_TX_ERR_FRAMES", 0x938, 0 },
-	{ "XGM_STAT_RX_BYTES_LOW", 0x93c, 0 },
-	{ "XGM_STAT_RX_BYTES_HIGH", 0x940, 0 },
-		{ "RxBytes_high", 0, 13 },
-	{ "XGM_STAT_RX_FRAMES_LOW", 0x944, 0 },
-	{ "XGM_STAT_RX_FRAMES_HIGH", 0x948, 0 },
-		{ "RxFrames_high", 0, 4 },
-	{ "XGM_STAT_RX_BCAST_FRAMES", 0x94c, 0 },
-	{ "XGM_STAT_RX_MCAST_FRAMES", 0x950, 0 },
-	{ "XGM_STAT_RX_PAUSE_FRAMES", 0x954, 0 },
-		{ "RxPauseFrames", 0, 16 },
-	{ "XGM_STAT_RX_64B_FRAMES", 0x958, 0 },
-	{ "XGM_STAT_RX_65_127B_FRAMES", 0x95c, 0 },
-	{ "XGM_STAT_RX_128_255B_FRAMES", 0x960, 0 },
-	{ "XGM_STAT_RX_256_511B_FRAMES", 0x964, 0 },
-	{ "XGM_STAT_RX_512_1023B_FRAMES", 0x968, 0 },
-	{ "XGM_STAT_RX_1024_1518B_FRAMES", 0x96c, 0 },
-	{ "XGM_STAT_RX_1519_MAXB_FRAMES", 0x970, 0 },
-	{ "XGM_STAT_RX_SHORT_FRAMES", 0x974, 0 },
-		{ "RxShortFrames", 0, 16 },
-	{ "XGM_STAT_RX_OVERSIZE_FRAMES", 0x978, 0 },
-		{ "RxOversizeFrames", 0, 16 },
-	{ "XGM_STAT_RX_JABBER_FRAMES", 0x97c, 0 },
-		{ "RxJabberFrames", 0, 16 },
-	{ "XGM_STAT_RX_CRC_ERR_FRAMES", 0x980, 0 },
-		{ "RxCRCErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x984, 0 },
-		{ "RxLengthErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x988, 0 },
-		{ "RxSymCodeErrFrames", 0, 16 },
-	{ "XGM_XAUI_PCS_ERR", 0x998, 0 },
-		{ "PCS_SyncStatus", 5, 4 },
-		{ "PCS_CTCFIFOErr", 1, 4 },
-		{ "PCS_NotAligned", 0, 1 },
-	{ "XGM_RGMII_STATUS", 0x99c, 0 },
-		{ "GMIIDuplex", 3, 1 },
-		{ "GMIISpeed", 1, 2 },
-		{ "GMIILinkStatus", 0, 1 },
-	{ "XGM_WOL_STATUS", 0x9a0, 0 },
-		{ "PatDetected", 31, 1 },
-		{ "MatchedFilter", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0x9a4, 0 },
-	{ "XGM_TX_SPI4_SOP_EOP_CNT", 0x9a8, 0 },
-		{ "TxSPI4SopCnt", 16, 16 },
-		{ "TxSPI4EopCnt", 0, 16 },
-	{ "XGM_RX_SPI4_SOP_EOP_CNT", 0x9ac, 0 },
-		{ "RxSPI4SopCnt", 16, 16 },
-		{ "RxSPI4EopCnt", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
-struct reg_info t3c_xgmac0_1_regs[] = {
-	{ "XGM_TX_CTRL", 0xa00, 0 },
-		{ "SendPause", 2, 1 },
-		{ "SendZeroPause", 1, 1 },
-		{ "TxEn", 0, 1 },
-	{ "XGM_TX_CFG", 0xa04, 0 },
-		{ "CfgClkSpeed", 2, 3 },
-		{ "StretchMode", 1, 1 },
-		{ "TxPauseEn", 0, 1 },
-	{ "XGM_TX_PAUSE_QUANTA", 0xa08, 0 },
-		{ "TxPauseQuanta", 0, 16 },
-	{ "XGM_RX_CTRL", 0xa0c, 0 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_RX_CFG", 0xa10, 0 },
-		{ "Con802_3Preamble", 12, 1 },
-		{ "EnNon802_3Preamble", 11, 1 },
-		{ "CopyPreamble", 10, 1 },
-		{ "DisPauseFrames", 9, 1 },
-		{ "En1536BFrames", 8, 1 },
-		{ "EnJumbo", 7, 1 },
-		{ "RmFCS", 6, 1 },
-		{ "DisNonVlan", 5, 1 },
-		{ "EnExtMatch", 4, 1 },
-		{ "EnHashUcast", 3, 1 },
-		{ "EnHashMcast", 2, 1 },
-		{ "DisBCast", 1, 1 },
-		{ "CopyAllFrames", 0, 1 },
-	{ "XGM_RX_HASH_LOW", 0xa14, 0 },
-	{ "XGM_RX_HASH_HIGH", 0xa18, 0 },
-	{ "XGM_RX_EXACT_MATCH_LOW_1", 0xa1c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_1", 0xa20, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_2", 0xa24, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_2", 0xa28, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_3", 0xa2c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_3", 0xa30, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_4", 0xa34, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_4", 0xa38, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_5", 0xa3c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_5", 0xa40, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_6", 0xa44, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_6", 0xa48, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_7", 0xa4c, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_7", 0xa50, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_EXACT_MATCH_LOW_8", 0xa54, 0 },
-	{ "XGM_RX_EXACT_MATCH_HIGH_8", 0xa58, 0 },
-		{ "address_high", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_1", 0xa5c, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_2", 0xa60, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_3", 0xa64, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_RX_TYPE_MATCH_4", 0xa68, 0 },
-		{ "EnTypeMatch", 31, 1 },
-		{ "type", 0, 16 },
-	{ "XGM_INT_STATUS", 0xa6c, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_MASK", 0xa70, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_ENABLE", 0xa74, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_XGM_INT_DISABLE", 0xa78, 0 },
-		{ "XGMIIExtInt", 10, 1 },
-		{ "LinkFaultChange", 9, 1 },
-		{ "PhyFrameComplete", 8, 1 },
-		{ "PauseFrameTxmt", 7, 1 },
-		{ "PauseCntrTimeOut", 6, 1 },
-		{ "Non0PauseRcvd", 5, 1 },
-		{ "StatOFlow", 4, 1 },
-		{ "TxErrFIFO", 3, 1 },
-		{ "TxUFlow", 2, 1 },
-		{ "FrameTxmt", 1, 1 },
-		{ "FrameRcvd", 0, 1 },
-	{ "XGM_TX_PAUSE_TIMER", 0xa7c, 0 },
-		{ "CurPauseTimer", 0, 16 },
-	{ "XGM_STAT_CTRL", 0xa80, 0 },
-		{ "ReadSnpShot", 4, 1 },
-		{ "TakeSnpShot", 3, 1 },
-		{ "ClrStats", 2, 1 },
-		{ "IncrStats", 1, 1 },
-		{ "EnTestModeWr", 0, 1 },
-	{ "XGM_RXFIFO_CFG", 0xa84, 0 },
-		{ "RxFIFO_empty", 31, 1 },
-		{ "RxFIFO_full", 30, 1 },
-		{ "RxFIFOPauseHWM", 17, 12 },
-		{ "RxFIFOPauseLWM", 5, 12 },
-		{ "ForcedPause", 4, 1 },
-		{ "ExternLoopback", 3, 1 },
-		{ "RxByteSwap", 2, 1 },
-		{ "RxStrFrwrd", 1, 1 },
-		{ "DisErrFrames", 0, 1 },
-	{ "XGM_TXFIFO_CFG", 0xa88, 0 },
-		{ "TxFIFO_empty", 31, 1 },
-		{ "TxFIFO_full", 30, 1 },
-		{ "UnderunFix", 22, 1 },
-		{ "EnDropPkt", 21, 1 },
-		{ "TxIPG", 13, 8 },
-		{ "TxFIFOThresh", 4, 9 },
-		{ "InternLoopback", 3, 1 },
-		{ "TxByteSwap", 2, 1 },
-		{ "DisCRC", 1, 1 },
-		{ "DisPreAmble", 0, 1 },
-	{ "XGM_SLOW_TIMER", 0xa8c, 0 },
-		{ "PauseSlowTimerEn", 31, 1 },
-		{ "PauseSlowTimer", 0, 20 },
-	{ "XGM_PAUSE_TIMER", 0xa90, 0 },
-		{ "PauseTimer", 0, 20 },
-	{ "XGM_XAUI_PCS_TEST", 0xa94, 0 },
-		{ "TestPattern", 1, 2 },
-		{ "EnTest", 0, 1 },
-	{ "XGM_RGMII_CTRL", 0xa98, 0 },
-		{ "PhAlignFIFOThresh", 1, 2 },
-		{ "TxClk90Shift", 0, 1 },
-	{ "XGM_RGMII_IMP", 0xa9c, 0 },
-		{ "CalReset", 8, 1 },
-		{ "CalUpdate", 7, 1 },
-		{ "ImpSetUpdate", 6, 1 },
-		{ "RGMIIImpPD", 3, 3 },
-		{ "RGMIIImpPU", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE", 0xaa8, 0 },
-		{ "RxMaxFramerSize", 17, 14 },
-		{ "RxEnErrorGather", 16, 1 },
-		{ "RxEnSingleFlit", 15, 1 },
-		{ "RxEnFramer", 14, 1 },
-		{ "RxMaxPktSize", 0, 14 },
-	{ "XGM_RESET_CTRL", 0xaac, 0 },
-		{ "XGMAC_STOP_EN", 4, 1 },
-		{ "XG2G_Reset_", 3, 1 },
-		{ "RGMII_Reset_", 2, 1 },
-		{ "PCS_Reset_", 1, 1 },
-		{ "MAC_Reset_", 0, 1 },
-	{ "XGM_XAUI1G_CTRL", 0xab0, 0 },
-		{ "XAUI1GLinkId", 0, 2 },
-	{ "XGM_SERDES_LANE_CTRL", 0xab4, 0 },
-		{ "LaneReversal", 8, 1 },
-		{ "TxPolarity", 4, 4 },
-		{ "RxPolarity", 0, 4 },
-	{ "XGM_PORT_CFG", 0xab8, 0 },
-		{ "SafeSpeedChange", 4, 1 },
-		{ "ClkDivReset_", 3, 1 },
-		{ "PortSpeed", 1, 2 },
-		{ "EnRGMII", 0, 1 },
-	{ "XGM_EPIO_DATA0", 0xac0, 0 },
-	{ "XGM_EPIO_DATA1", 0xac4, 0 },
-	{ "XGM_EPIO_DATA2", 0xac8, 0 },
-	{ "XGM_EPIO_DATA3", 0xacc, 0 },
-	{ "XGM_EPIO_OP", 0xad0, 0 },
-		{ "PIO_Ready", 31, 1 },
-		{ "PIO_WrRd", 24, 1 },
-		{ "PIO_Address", 0, 8 },
-	{ "XGM_INT_ENABLE", 0xad4, 0 },
-		{ "XAUIPCSDECErr", 24, 1 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBISTErr", 8, 4 },
-		{ "SERDESLowSigChange", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_INT_CAUSE", 0xad8, 0 },
-		{ "XAUIPCSDECErr", 24, 1 },
-		{ "RGMIIRxFIFOOverflow", 23, 1 },
-		{ "RGMIIRxFIFOUnderflow", 22, 1 },
-		{ "RxPktSizeError", 21, 1 },
-		{ "WOLPatDetected", 20, 1 },
-		{ "TXFIFO_prty_err", 17, 3 },
-		{ "RXFIFO_prty_err", 14, 3 },
-		{ "TXFIFO_underrun", 13, 1 },
-		{ "RXFIFO_overflow", 12, 1 },
-		{ "SERDESBISTErr", 8, 4 },
-		{ "SERDESLowSigChange", 4, 4 },
-		{ "XAUIPCSCTCErr", 3, 1 },
-		{ "XAUIPCSAlignChange", 2, 1 },
-		{ "RGMIILinkStsChange", 1, 1 },
-		{ "xgm_int", 0, 1 },
-	{ "XGM_XAUI_ACT_CTRL", 0xadc, 0 },
-		{ "TxEn", 1, 1 },
-		{ "RxEn", 0, 1 },
-	{ "XGM_SERDES_CTRL0", 0xae0, 0 },
-		{ "IntSerLPBK3", 27, 1 },
-		{ "IntSerLPBK2", 26, 1 },
-		{ "IntSerLPBK1", 25, 1 },
-		{ "IntSerLPBK0", 24, 1 },
-		{ "Reset3", 23, 1 },
-		{ "Reset2", 22, 1 },
-		{ "Reset1", 21, 1 },
-		{ "Reset0", 20, 1 },
-		{ "Pwrdn3", 19, 1 },
-		{ "Pwrdn2", 18, 1 },
-		{ "Pwrdn1", 17, 1 },
-		{ "Pwrdn0", 16, 1 },
-		{ "ResetPLL23", 15, 1 },
-		{ "ResetPLL01", 14, 1 },
-		{ "PW23", 12, 2 },
-		{ "PW01", 10, 2 },
-		{ "Deq", 6, 4 },
-		{ "Dtx", 2, 4 },
-		{ "LoDrv", 1, 1 },
-		{ "HiDrv", 0, 1 },
-	{ "XGM_SERDES_CTRL1", 0xae4, 0 },
-		{ "FmOffset3", 19, 5 },
-		{ "FmOffsetEn3", 18, 1 },
-		{ "FmOffset2", 13, 5 },
-		{ "FmOffsetEn2", 12, 1 },
-		{ "FmOffset1", 7, 5 },
-		{ "FmOffsetEn1", 6, 1 },
-		{ "FmOffset0", 1, 5 },
-		{ "FmOffsetEn0", 0, 1 },
-	{ "XGM_SERDES_CTRL2", 0xae8, 0 },
-		{ "DnIn3", 11, 1 },
-		{ "UpIn3", 10, 1 },
-		{ "RxSlave3", 9, 1 },
-		{ "DnIn2", 8, 1 },
-		{ "UpIn2", 7, 1 },
-		{ "RxSlave2", 6, 1 },
-		{ "DnIn1", 5, 1 },
-		{ "UpIn1", 4, 1 },
-		{ "RxSlave1", 3, 1 },
-		{ "DnIn0", 2, 1 },
-		{ "UpIn0", 1, 1 },
-		{ "RxSlave0", 0, 1 },
-	{ "XGM_SERDES_CTRL3", 0xaec, 0 },
-		{ "ExtBISTChkErrClr3", 31, 1 },
-		{ "ExtBISTChkEn3", 30, 1 },
-		{ "ExtBISTGenEn3", 29, 1 },
-		{ "ExtBISTPat3", 26, 3 },
-		{ "ExtParReset3", 25, 1 },
-		{ "ExtParLPBK3", 24, 1 },
-		{ "ExtBISTChkErrClr2", 23, 1 },
-		{ "ExtBISTChkEn2", 22, 1 },
-		{ "ExtBISTGenEn2", 21, 1 },
-		{ "ExtBISTPat2", 18, 3 },
-		{ "ExtParReset2", 17, 1 },
-		{ "ExtParLPBK2", 16, 1 },
-		{ "ExtBISTChkErrClr1", 15, 1 },
-		{ "ExtBISTChkEn1", 14, 1 },
-		{ "ExtBISTGenEn1", 13, 1 },
-		{ "ExtBISTPat1", 10, 3 },
-		{ "ExtParReset1", 9, 1 },
-		{ "ExtParLPBK1", 8, 1 },
-		{ "ExtBISTChkErrClr0", 7, 1 },
-		{ "ExtBISTChkEn0", 6, 1 },
-		{ "ExtBISTGenEn0", 5, 1 },
-		{ "ExtBISTPat0", 2, 3 },
-		{ "ExtParReset0", 1, 1 },
-		{ "ExtParLPBK0", 0, 1 },
-	{ "XGM_SERDES_STAT0", 0xaf0, 0 },
-		{ "ExtBISTChkErrCnt0", 4, 24 },
-		{ "ExtBISTChkFmd0", 3, 1 },
-		{ "LowSigForceEn0", 2, 1 },
-		{ "LowSigForceValue0", 1, 1 },
-		{ "LowSig0", 0, 1 },
-	{ "XGM_SERDES_STAT1", 0xaf4, 0 },
-		{ "ExtBISTChkErrCnt1", 4, 24 },
-		{ "ExtBISTChkFmd1", 3, 1 },
-		{ "LowSigForceEn1", 2, 1 },
-		{ "LowSigForceValue1", 1, 1 },
-		{ "LowSig1", 0, 1 },
-	{ "XGM_SERDES_STAT2", 0xaf8, 0 },
-		{ "ExtBISTChkErrCnt2", 4, 24 },
-		{ "ExtBISTChkFmd2", 3, 1 },
-		{ "LowSigForceEn2", 2, 1 },
-		{ "LowSigForceValue2", 1, 1 },
-		{ "LowSig2", 0, 1 },
-	{ "XGM_SERDES_STAT3", 0xafc, 0 },
-		{ "ExtBISTChkErrCnt3", 4, 24 },
-		{ "ExtBISTChkFmd3", 3, 1 },
-		{ "LowSigForceEn3", 2, 1 },
-		{ "LowSigForceValue3", 1, 1 },
-		{ "LowSig3", 0, 1 },
-	{ "XGM_STAT_TX_BYTE_LOW", 0xb00, 0 },
-	{ "XGM_STAT_TX_BYTE_HIGH", 0xb04, 0 },
-		{ "TxBytes_high", 0, 13 },
-	{ "XGM_STAT_TX_FRAME_LOW", 0xb08, 0 },
-	{ "XGM_STAT_TX_FRAME_HIGH", 0xb0c, 0 },
-		{ "TxFrames_high", 0, 4 },
-	{ "XGM_STAT_TX_BCAST", 0xb10, 0 },
-	{ "XGM_STAT_TX_MCAST", 0xb14, 0 },
-	{ "XGM_STAT_TX_PAUSE", 0xb18, 0 },
-	{ "XGM_STAT_TX_64B_FRAMES", 0xb1c, 0 },
-	{ "XGM_STAT_TX_65_127B_FRAMES", 0xb20, 0 },
-	{ "XGM_STAT_TX_128_255B_FRAMES", 0xb24, 0 },
-	{ "XGM_STAT_TX_256_511B_FRAMES", 0xb28, 0 },
-	{ "XGM_STAT_TX_512_1023B_FRAMES", 0xb2c, 0 },
-	{ "XGM_STAT_TX_1024_1518B_FRAMES", 0xb30, 0 },
-	{ "XGM_STAT_TX_1519_MAXB_FRAMES", 0xb34, 0 },
-	{ "XGM_STAT_TX_ERR_FRAMES", 0xb38, 0 },
-	{ "XGM_STAT_RX_BYTES_LOW", 0xb3c, 0 },
-	{ "XGM_STAT_RX_BYTES_HIGH", 0xb40, 0 },
-		{ "RxBytes_high", 0, 13 },
-	{ "XGM_STAT_RX_FRAMES_LOW", 0xb44, 0 },
-	{ "XGM_STAT_RX_FRAMES_HIGH", 0xb48, 0 },
-		{ "RxFrames_high", 0, 4 },
-	{ "XGM_STAT_RX_BCAST_FRAMES", 0xb4c, 0 },
-	{ "XGM_STAT_RX_MCAST_FRAMES", 0xb50, 0 },
-	{ "XGM_STAT_RX_PAUSE_FRAMES", 0xb54, 0 },
-		{ "RxPauseFrames", 0, 16 },
-	{ "XGM_STAT_RX_64B_FRAMES", 0xb58, 0 },
-	{ "XGM_STAT_RX_65_127B_FRAMES", 0xb5c, 0 },
-	{ "XGM_STAT_RX_128_255B_FRAMES", 0xb60, 0 },
-	{ "XGM_STAT_RX_256_511B_FRAMES", 0xb64, 0 },
-	{ "XGM_STAT_RX_512_1023B_FRAMES", 0xb68, 0 },
-	{ "XGM_STAT_RX_1024_1518B_FRAMES", 0xb6c, 0 },
-	{ "XGM_STAT_RX_1519_MAXB_FRAMES", 0xb70, 0 },
-	{ "XGM_STAT_RX_SHORT_FRAMES", 0xb74, 0 },
-		{ "RxShortFrames", 0, 16 },
-	{ "XGM_STAT_RX_OVERSIZE_FRAMES", 0xb78, 0 },
-		{ "RxOversizeFrames", 0, 16 },
-	{ "XGM_STAT_RX_JABBER_FRAMES", 0xb7c, 0 },
-		{ "RxJabberFrames", 0, 16 },
-	{ "XGM_STAT_RX_CRC_ERR_FRAMES", 0xb80, 0 },
-		{ "RxCRCErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0xb84, 0 },
-		{ "RxLengthErrFrames", 0, 16 },
-	{ "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0xb88, 0 },
-		{ "RxSymCodeErrFrames", 0, 16 },
-	{ "XGM_XAUI_PCS_ERR", 0xb98, 0 },
-		{ "PCS_SyncStatus", 5, 4 },
-		{ "PCS_CTCFIFOErr", 1, 4 },
-		{ "PCS_NotAligned", 0, 1 },
-	{ "XGM_RGMII_STATUS", 0xb9c, 0 },
-		{ "GMIIDuplex", 3, 1 },
-		{ "GMIISpeed", 1, 2 },
-		{ "GMIILinkStatus", 0, 1 },
-	{ "XGM_WOL_STATUS", 0xba0, 0 },
-		{ "PatDetected", 31, 1 },
-		{ "MatchedFilter", 0, 3 },
-	{ "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0xba4, 0 },
-	{ "XGM_TX_SPI4_SOP_EOP_CNT", 0xba8, 0 },
-		{ "TxSPI4SopCnt", 16, 16 },
-		{ "TxSPI4EopCnt", 0, 16 },
-	{ "XGM_RX_SPI4_SOP_EOP_CNT", 0xbac, 0 },
-		{ "RxSPI4SopCnt", 16, 16 },
-		{ "RxSPI4EopCnt", 0, 16 },
-	{ NULL, 0, 0 }
-};
-
diff --git a/usr.sbin/cxgbtool/version.h b/usr.sbin/cxgbtool/version.h
deleted file mode 100644
index 403a8be..0000000
--- a/usr.sbin/cxgbtool/version.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*****************************************************************************
- *                                                                           *
- * File:                                                                     *
- *  version.h                                                                *
- *                                                                           *
- * Description:                                                              *
- *  cxgbtool userspace utility version defines.                              *
- *                                                                           *
- * http://www.chelsio.com                                                    *
- *                                                                           *
- * Copyright (c) 2003 - 2008 Chelsio Communications, Inc.                    *
- * All rights reserved.                                                      *
- *                                                                           *
- * Maintainers: maintainers@chelsio.com                                      *
- *                                                                           *
- * History:                                                                  *
- *                                                                           *
- ****************************************************************************/
-/* $Date: 2007/02/05 18:46:24 $ $RCSfile: version.h,v $ $Revision: 1.9 $ */
-
-/*
- * $FreeBSD$
- */
-
-#ifndef __CXGBTOOL_VERSION_H
-#define __CXGBTOOL_VERSION_H
-
-#define PROGNAME "cxgbtool"
-#define VERSION "1.16f"
-#define COPYRIGHT "Copyright (c) 2004-2009 Chelsio Communications"
-
-#endif //__CXGBTOOL_VERSION_H