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author | neel <neel@FreeBSD.org> | 2014-12-16 06:33:57 +0000 |
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committer | neel <neel@FreeBSD.org> | 2014-12-16 06:33:57 +0000 |
commit | bdae65463ea82ed7b759b8281c6380f93c274157 (patch) | |
tree | 205edc821801abfeb2f406d2e635e209da81e9b1 /usr.sbin/rmt | |
parent | 5635c9143838206c285747b2246d524a5b5f02c1 (diff) | |
download | FreeBSD-src-bdae65463ea82ed7b759b8281c6380f93c274157.zip FreeBSD-src-bdae65463ea82ed7b759b8281c6380f93c274157.tar.gz |
For level triggered interrupts clear the PIC IRR bit when the interrupt pin
is deasserted. Prior to this change each assertion on a level triggered irq
pin resulted in two interrupts being delivered to the CPU.
Differential Revision: https://reviews.freebsd.org/D1310
Reviewed by: tychon
MFC after: 1 week
Diffstat (limited to 'usr.sbin/rmt')
0 files changed, 0 insertions, 0 deletions