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| author | dim <dim@FreeBSD.org> | 2015-01-18 16:23:48 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2015-01-18 16:23:48 +0000 |
| commit | c86b984ea8ecb3e944dc3de48539f4c1f65851ea (patch) | |
| tree | 3eb853da77d46cc77c4b017525a422f9ddb1385b /test/CodeGen/mips-constraints-mem.c | |
| parent | c696171ff15f0ee60dea4abfd99a135473c95656 (diff) | |
| download | FreeBSD-src-c86b984ea8ecb3e944dc3de48539f4c1f65851ea.zip FreeBSD-src-c86b984ea8ecb3e944dc3de48539f4c1f65851ea.tar.gz | |
Vendor import of clang RELEASE_360/rc1 tag r226102 (effectively, 3.6.0 RC1):
https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_360/rc1@226102
Diffstat (limited to 'test/CodeGen/mips-constraints-mem.c')
| -rw-r--r-- | test/CodeGen/mips-constraints-mem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/mips-constraints-mem.c b/test/CodeGen/mips-constraints-mem.c index 2c3c01a..295d67c 100644 --- a/test/CodeGen/mips-constraints-mem.c +++ b/test/CodeGen/mips-constraints-mem.c @@ -9,7 +9,7 @@ int foo() // 'R': An address that can be used in a non-macro load or stor' // This test will result in the higher and lower nibbles being // switched due to the lwl/lwr instruction pairs. - // CHECK: %{{[0-9]+}} = call i32 asm sideeffect "lwl $0, 1 + $1\0A\09lwr $0, 2 + $1\0A\09", "=r,*R"(i32* %{{[0-9,a-f]+}}) #1, + // CHECK: %{{[0-9]+}} = call i32 asm sideeffect "lwl $0, 1 + $1\0A\09lwr $0, 2 + $1\0A\09", "=r,*R,~{$1}"(i32* %{{[0-9,a-f]+}}) #1, int c = 0xffbbccdd; |
