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author | dim <dim@FreeBSD.org> | 2015-12-30 11:49:41 +0000 |
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committer | dim <dim@FreeBSD.org> | 2015-12-30 11:49:41 +0000 |
commit | 3176e97f130184ece0e1a21352c8124cc83ff24a (patch) | |
tree | 0a5b74c0b9ca73aded34df95c91fcaf3815230d8 /test/CodeGen/arm_acle.c | |
parent | 1e9b8d38881c3213d1e67b0c47ab9b2c00721a5c (diff) | |
download | FreeBSD-src-3176e97f130184ece0e1a21352c8124cc83ff24a.zip FreeBSD-src-3176e97f130184ece0e1a21352c8124cc83ff24a.tar.gz |
Vendor import of clang trunk r256633:
https://llvm.org/svn/llvm-project/cfe/trunk@256633
Diffstat (limited to 'test/CodeGen/arm_acle.c')
-rw-r--r-- | test/CodeGen/arm_acle.c | 46 |
1 files changed, 36 insertions, 10 deletions
diff --git a/test/CodeGen/arm_acle.c b/test/CodeGen/arm_acle.c index a2eb900..0884394 100644 --- a/test/CodeGen/arm_acle.c +++ b/test/CodeGen/arm_acle.c @@ -186,27 +186,53 @@ uint64_t test_revll(uint64_t t) { // ARM-LABEL: test_rev16 // ARM: llvm.bswap -// ARM: lshr -// ARM: shl +// ARM: lshr {{.*}}, 16 +// ARM: shl {{.*}}, 16 // ARM: or uint32_t test_rev16(uint32_t t) { return __rev16(t); } // ARM-LABEL: test_rev16l -// ARM: llvm.bswap -// ARM: lshr -// ARM: shl -// ARM: or +// AArch32: llvm.bswap +// AArch32: lshr {{.*}}, 16 +// AArch32: shl {{.*}}, 16 +// AArch32: or +// AArch64: [[T1:%.*]] = lshr i64 [[IN:%.*]], 32 +// AArch64: [[T2:%.*]] = trunc i64 [[T1]] to i32 +// AArch64: [[T3:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[T2]]) +// AArch64: [[T4:%.*]] = lshr i32 [[T3]], 16 +// AArch64: [[T5:%.*]] = shl i32 [[T3]], 16 +// AArch64: [[T6:%.*]] = or i32 [[T5]], [[T4]] +// AArch64: [[T7:%.*]] = zext i32 [[T6]] to i64 +// AArch64: [[T8:%.*]] = shl nuw i64 [[T7]], 32 +// AArch64: [[T9:%.*]] = trunc i64 [[IN]] to i32 +// AArch64: [[T10:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[T9]]) +// AArch64: [[T11:%.*]] = lshr i32 [[T10]], 16 +// AArch64: [[T12:%.*]] = shl i32 [[T10]], 16 +// AArch64: [[T13:%.*]] = or i32 [[T12]], [[T11]] +// AArch64: [[T14:%.*]] = zext i32 [[T13]] to i64 +// AArch64: [[T15:%.*]] = or i64 [[T8]], [[T14]] long test_rev16l(long t) { return __rev16l(t); } // ARM-LABEL: test_rev16ll -// ARM: llvm.bswap -// ARM: lshr -// ARM: shl -// ARM: or +// ARM: [[T1:%.*]] = lshr i64 [[IN:%.*]], 32 +// ARM: [[T2:%.*]] = trunc i64 [[T1]] to i32 +// ARM: [[T3:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[T2]]) +// ARM: [[T4:%.*]] = lshr i32 [[T3]], 16 +// ARM: [[T5:%.*]] = shl i32 [[T3]], 16 +// ARM: [[T6:%.*]] = or i32 [[T5]], [[T4]] +// ARM: [[T7:%.*]] = zext i32 [[T6]] to i64 +// ARM: [[T8:%.*]] = shl nuw i64 [[T7]], 32 +// ARM: [[T9:%.*]] = trunc i64 [[IN]] to i32 +// ARM: [[T10:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[T9]]) +// ARM: [[T11:%.*]] = lshr i32 [[T10]], 16 +// ARM: [[T12:%.*]] = shl i32 [[T10]], 16 +// ARM: [[T13:%.*]] = or i32 [[T12]], [[T11]] +// ARM: [[T14:%.*]] = zext i32 [[T13]] to i64 +// ARM: [[T15:%.*]] = or i64 [[T8]], [[T14]] uint64_t test_rev16ll(uint64_t t) { return __rev16ll(t); } |