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author | dim <dim@FreeBSD.org> | 2013-04-08 18:41:23 +0000 |
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committer | dim <dim@FreeBSD.org> | 2013-04-08 18:41:23 +0000 |
commit | 169d2bd06003c39970bc94c99669a34b61bb7e45 (patch) | |
tree | 06099edc18d30894081a822b756f117cbe0b8207 /test/CodeGen/Hexagon/combine_ir.ll | |
parent | 0ac5f94c68a3d8fbd1380dbba26d891ea7816b5e (diff) | |
download | FreeBSD-src-169d2bd06003c39970bc94c99669a34b61bb7e45.zip FreeBSD-src-169d2bd06003c39970bc94c99669a34b61bb7e45.tar.gz |
Vendor import of llvm trunk r178860:
http://llvm.org/svn/llvm-project/llvm/trunk@178860
Diffstat (limited to 'test/CodeGen/Hexagon/combine_ir.ll')
-rw-r--r-- | test/CodeGen/Hexagon/combine_ir.ll | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/combine_ir.ll b/test/CodeGen/Hexagon/combine_ir.ll new file mode 100644 index 0000000..921ce99 --- /dev/null +++ b/test/CodeGen/Hexagon/combine_ir.ll @@ -0,0 +1,55 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; CHECK: word +; CHECK: combine(#0 + +define void @word(i32* nocapture %a) nounwind { +entry: + %0 = load i32* %a, align 4, !tbaa !0 + %1 = zext i32 %0 to i64 + %add.ptr = getelementptr inbounds i32* %a, i32 1 + %2 = load i32* %add.ptr, align 4, !tbaa !0 + %3 = zext i32 %2 to i64 + %4 = shl nuw i64 %3, 32 + %ins = or i64 %4, %1 + tail call void @bar(i64 %ins) nounwind + ret void +} + +declare void @bar(i64) + +; CHECK: halfword +; CHECK: combine(#0 + +define void @halfword(i16* nocapture %a) nounwind { +entry: + %0 = load i16* %a, align 2, !tbaa !3 + %1 = zext i16 %0 to i64 + %add.ptr = getelementptr inbounds i16* %a, i32 1 + %2 = load i16* %add.ptr, align 2, !tbaa !3 + %3 = zext i16 %2 to i64 + %4 = shl nuw nsw i64 %3, 16 + %ins = or i64 %4, %1 + tail call void @bar(i64 %ins) nounwind + ret void +} + +; CHECK: byte +; CHECK: combine(#0 + +define void @byte(i8* nocapture %a) nounwind { +entry: + %0 = load i8* %a, align 1, !tbaa !1 + %1 = zext i8 %0 to i64 + %add.ptr = getelementptr inbounds i8* %a, i32 1 + %2 = load i8* %add.ptr, align 1, !tbaa !1 + %3 = zext i8 %2 to i64 + %4 = shl nuw nsw i64 %3, 8 + %ins = or i64 %4, %1 + tail call void @bar(i64 %ins) nounwind + ret void +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} +!3 = metadata !{metadata !"short", metadata !1} |