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| author | dim <dim@FreeBSD.org> | 2011-02-20 12:57:14 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2011-02-20 12:57:14 +0000 |
| commit | cbb70ce070d220642b038ea101d9c0f9fbf860d6 (patch) | |
| tree | d2b61ce94e654cb01a254d2195259db5f9cc3f3c /test/CodeGen/CellSPU/loads.ll | |
| parent | 4ace901e87dac5bbbac78ed325e75462e48e386e (diff) | |
| download | FreeBSD-src-cbb70ce070d220642b038ea101d9c0f9fbf860d6.zip FreeBSD-src-cbb70ce070d220642b038ea101d9c0f9fbf860d6.tar.gz | |
Vendor import of llvm trunk r126079:
http://llvm.org/svn/llvm-project/llvm/trunk@126079
Diffstat (limited to 'test/CodeGen/CellSPU/loads.ll')
| -rw-r--r-- | test/CodeGen/CellSPU/loads.ll | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/test/CodeGen/CellSPU/loads.ll b/test/CodeGen/CellSPU/loads.ll index d40217d..03d7ad1 100644 --- a/test/CodeGen/CellSPU/loads.ll +++ b/test/CodeGen/CellSPU/loads.ll @@ -38,3 +38,15 @@ define <4 x float> @load_undef(){ %val = load <4 x float>* undef ret <4 x float> %val } + +;check that 'misaligned' loads that may span two memory chunks +;have two loads. Don't check for the bitmanipulation, as that +;might change with improved algorithms or scheduling +define i32 @load_misaligned( i32* %ptr ){ +;CHECK: load_misaligned +;CHECK: lqd +;CHECK: lqd +;CHECK: bi $lr + %rv = load i32* %ptr, align 2 + ret i32 %rv +} |
