Add support for multiple PCI "hoses" used on various alpha platforms.

The specific intent of this commit is to pave the way for importing
Compaq XP1000 support.  These changes should not affect the i386 port.

Reviewed by: Doug Rabson <dfr@nlsystems.com>
(actually, he walked me through most of it & deserves more than reviewd-by
credit )

16 files changed, 253 insertions, 69 deletions

diff --git a/sys/alpha/alpha/dec_2100_a50.c b/sys/alpha/alpha/dec_2100_a50.c
index 3d5a749..e948cfc 100644
--- a/sys/alpha/alpha/dec_2100_a50.c
+++ b/sys/alpha/alpha/dec_2100_a50.c
@@ -241,7 +241,7 @@ dec_2100_a50_intr_map(void *arg)
 	 *  interrupt will actually be routed.  Thank you, NetBSD
 	 */
 	   
-	pirqreg = chipset.cfgreadl(0, 7, 0, SIO_PCIREG_PIRQ_RTCTRL);
+	pirqreg = chipset.cfgreadl(0, 0, 7, 0, SIO_PCIREG_PIRQ_RTCTRL);
 	pirqline = (pirqreg >> (pirq * 8)) & 0xff;
 	if ((pirqline & 0x80) != 0)
 		panic("bad pirqline %d",pirqline);
diff --git a/sys/alpha/alpha/dec_axppci_33.c b/sys/alpha/alpha/dec_axppci_33.c
index 881f491..4e3e4a5 100644
--- a/sys/alpha/alpha/dec_axppci_33.c
+++ b/sys/alpha/alpha/dec_axppci_33.c
@@ -1,4 +1,4 @@
-/* $Id: dec_axppci_33.c,v 1.1 1998/08/10 07:53:58 dfr Exp $ */
+/* $Id: dec_axppci_33.c,v 1.2 1999/04/23 19:53:37 dt Exp $ */
 /* $NetBSD: dec_axppci_33.c,v 1.38 1998/07/07 08:49:12 ross Exp $ */
 
 /*
@@ -261,7 +261,7 @@ dec_axppci_33_intr_map(void *arg)
                 return;
 	}
 
-	pirqreg = chipset.cfgreadl(0, 7, 0, SIO_PCIREG_PIRQ_RTCTRL);
+	pirqreg = chipset.cfgreadl(0, 0, 7, 0, SIO_PCIREG_PIRQ_RTCTRL);
 #if 0
 	printf("dec_axppci_33_intr_map: device %d pin %c: pirq %d, reg = %x\n",
 		device, '@' + cfg->intpin, pirq, pirqreg);
diff --git a/sys/alpha/include/chipset.h b/sys/alpha/include/chipset.h
index 66f59bb..ec34810 100644
--- a/sys/alpha/include/chipset.h
+++ b/sys/alpha/include/chipset.h
@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: chipset.h,v 1.6 1998/11/15 18:25:16 dfr Exp $
+ *	$Id: chipset.h,v 1.7 1999/04/16 21:21:35 peter Exp $
  */
 
 #ifndef _MACHINE_CHIPSET_H_
@@ -44,14 +44,14 @@ typedef void		alpha_chipset_writew_t(u_int32_t pa, u_int16_t data);
 typedef void		alpha_chipset_writel_t(u_int32_t pa, u_int32_t data);
 
 typedef int		alpha_chipset_maxdevs_t(u_int bus);
-typedef u_int8_t	alpha_chipset_cfgreadb_t(u_int, u_int, u_int, u_int);
-typedef u_int16_t	alpha_chipset_cfgreadw_t(u_int, u_int, u_int, u_int);
-typedef u_int32_t	alpha_chipset_cfgreadl_t(u_int, u_int, u_int, u_int);
-typedef void		alpha_chipset_cfgwriteb_t(u_int, u_int, u_int, u_int,
+typedef u_int8_t	alpha_chipset_cfgreadb_t(u_int, u_int, u_int, u_int, u_int);
+typedef u_int16_t	alpha_chipset_cfgreadw_t(u_int, u_int, u_int, u_int, u_int);
+typedef u_int32_t	alpha_chipset_cfgreadl_t(u_int, u_int, u_int, u_int, u_int);
+typedef void		alpha_chipset_cfgwriteb_t(u_int, u_int, u_int, u_int, u_int,
 						  u_int8_t);
-typedef void		alpha_chipset_cfgwritew_t(u_int, u_int, u_int, u_int,
+typedef void		alpha_chipset_cfgwritew_t(u_int, u_int, u_int, u_int, u_int,
 						  u_int16_t);
-typedef void		alpha_chipset_cfgwritel_t(u_int, u_int, u_int, u_int,
+typedef void		alpha_chipset_cfgwritel_t(u_int, u_int, u_int, u_int, u_int,
 						  u_int32_t);
 typedef vm_offset_t     alpha_chipset_addrcvt_t(vm_offset_t);
 typedef u_int64_t	alpha_chipset_read_hae_t(void);
diff --git a/sys/alpha/pci/apecs.c b/sys/alpha/pci/apecs.c
index 9516894..c6b0ac4 100644
--- a/sys/alpha/pci/apecs.c
+++ b/sys/alpha/pci/apecs.c
@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: apecs.c,v 1.6 1999/04/16 21:21:38 peter Exp $
+ *	$Id: apecs.c,v 1.7 1999/05/08 21:58:40 dfr Exp $
  */
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -323,44 +323,44 @@ apecs_swiz_writel(u_int32_t pa, u_int32_t data)
 
 #if 1
 static u_int8_t
-apecs_swiz_cfgreadb(u_int b, u_int s, u_int f, u_int r)
+apecs_swiz_cfgreadb(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	SWIZ_CFGREAD(b, s, f, r, BYTE, u_int8_t);
 }
 
 static u_int16_t
-apecs_swiz_cfgreadw(u_int b, u_int s, u_int f, u_int r)
+apecs_swiz_cfgreadw(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	SWIZ_CFGREAD(b, s, f, r, WORD, u_int16_t);
 }
 
 static u_int32_t
-apecs_swiz_cfgreadl(u_int b, u_int s, u_int f, u_int r)
+apecs_swiz_cfgreadl(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	SWIZ_CFGREAD(b, s, f, r, LONG, u_int32_t);
 }
 
 static void
-apecs_swiz_cfgwriteb(u_int b, u_int s, u_int f, u_int r, u_int8_t data)
+apecs_swiz_cfgwriteb(u_int h, u_int b, u_int s, u_int f, u_int r, u_int8_t data)
 {
 	SWIZ_CFGWRITE(b, s, f, r, data, BYTE, u_int8_t);
 }
 
 static void
-apecs_swiz_cfgwritew(u_int b, u_int s, u_int f, u_int r, u_int16_t data)
+apecs_swiz_cfgwritew(u_int h, u_int b, u_int s, u_int f, u_int r, u_int16_t data)
 {
 	SWIZ_CFGWRITE(b, s, f, r, data, WORD, u_int16_t);
 }
 
 static void
-apecs_swiz_cfgwritel(u_int b, u_int s, u_int f, u_int r, u_int32_t data)
+apecs_swiz_cfgwritel(u_int h, u_int b, u_int s, u_int f, u_int r, u_int32_t data)
 {
 	SWIZ_CFGWRITE(b, s, f, r, data, LONG, u_int32_t);
 }
 
 #else
 static u_int8_t
-apecs_swiz_cfgreadb(u_int b, u_int s, u_int f, u_int r)
+apecs_swiz_cfgreadb(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	struct apecs_softc* sc = APECS_SOFTC(apecs0);
 	vm_offset_t off = APECS_SWIZ_CFGOFF(b, s, f, r);
@@ -370,7 +370,7 @@ apecs_swiz_cfgreadb(u_int b, u_int s, u_int f, u_int r)
 }
 
 static u_int16_t
-apecs_swiz_cfgreadw(u_int b, u_int s, u_int f, u_int r)
+apecs_swiz_cfgreadw(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	struct apecs_softc* sc = APECS_SOFTC(apecs0);
 	vm_offset_t off = APECS_SWIZ_CFGOFF(b, s, f, r);
@@ -380,7 +380,7 @@ apecs_swiz_cfgreadw(u_int b, u_int s, u_int f, u_int r)
 }
 
 static u_int32_t
-apecs_swiz_cfgreadl(u_int b, u_int s, u_int f, u_int r)
+apecs_swiz_cfgreadl(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	struct apecs_softc* sc = APECS_SOFTC(apecs0);
 	vm_offset_t off = APECS_SWIZ_CFGOFF(b, s, f, r);
@@ -390,7 +390,7 @@ apecs_swiz_cfgreadl(u_int b, u_int s, u_int f, u_int r)
 }
 
 static void
-apecs_swiz_cfgwriteb(u_int b, u_int s, u_int f, u_int r, u_int8_t data)
+apecs_swiz_cfgwriteb(u_int h, u_int b, u_int s, u_int f, u_int r, u_int8_t data)
 {
 	struct apecs_softc* sc = APECS_SOFTC(apecs0);
 	vm_offset_t off = APECS_SWIZ_CFGOFF(b, s, f, r);
@@ -400,7 +400,7 @@ apecs_swiz_cfgwriteb(u_int b, u_int s, u_int f, u_int r, u_int8_t data)
 }
 
 static void
-apecs_swiz_cfgwritew(u_int b, u_int s, u_int f, u_int r, u_int16_t data)
+apecs_swiz_cfgwritew(u_int h, u_int b, u_int s, u_int f, u_int r, u_int16_t data)
 {
 	struct apecs_softc* sc = APECS_SOFTC(apecs0);
 	vm_offset_t off = APECS_SWIZ_CFGOFF(b, s, f, r);
@@ -410,7 +410,7 @@ apecs_swiz_cfgwritew(u_int b, u_int s, u_int f, u_int r, u_int16_t data)
 }
 
 static void
-apecs_swiz_cfgwritel(u_int b, u_int s, u_int f, u_int r, u_int32_t data)
+apecs_swiz_cfgwritel(u_int h, u_int b, u_int s, u_int f, u_int r, u_int32_t data)
 {
 	struct apecs_softc* sc = APECS_SOFTC(apecs0);
 	vm_offset_t off = APECS_SWIZ_CFGOFF(b, s, f, r);
diff --git a/sys/alpha/pci/apecs_pci.c b/sys/alpha/pci/apecs_pci.c
index cb05f8d..9181317 100644
--- a/sys/alpha/pci/apecs_pci.c
+++ b/sys/alpha/pci/apecs_pci.c
@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: apecs_pci.c,v 1.1 1999/04/16 21:21:38 peter Exp $
+ *	$Id: apecs_pci.c,v 1.2 1999/05/08 21:58:41 dfr Exp $
  */
 
 #include <sys/param.h>
@@ -33,6 +33,7 @@
 #include <sys/bus.h>
 #include <machine/bus.h>
 #include <sys/rman.h>
+#include <pci/pcivar.h>
 
 static devclass_t	pcib_devclass;
 
@@ -46,6 +47,16 @@ apecs_pcib_probe(device_t dev)
 	return 0;
 }
 
+static int
+apecs_pcib_read_ivar(device_t dev, device_t child, int which, u_long *result)
+{
+	if (which == PCIB_IVAR_HOSE) {
+		*result = 0;
+		return 0;
+	}
+	return ENOENT;
+}
+
 static device_method_t apecs_pcib_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		apecs_pcib_probe),
@@ -53,6 +64,7 @@ static device_method_t apecs_pcib_methods[] = {
 
 	/* Bus interface */
 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
+	DEVMETHOD(bus_read_ivar,	apecs_pcib_read_ivar),
 	DEVMETHOD(bus_alloc_resource,	bus_generic_alloc_resource),
 	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
diff --git a/sys/alpha/pci/cia.c b/sys/alpha/pci/cia.c
index ca7032a..aaa78b9 100644
--- a/sys/alpha/pci/cia.c
+++ b/sys/alpha/pci/cia.c
@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: cia.c,v 1.16 1999/04/16 21:21:39 peter Exp $
+ *	$Id: cia.c,v 1.17 1999/05/08 21:58:41 dfr Exp $
  */
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -332,7 +332,7 @@ cia_check_abort(void)
 	   | ((b) << 16) | ((s) << 11) | ((f) << 8) | (r))
 
 static u_int8_t
-cia_bwx_cfgreadb(u_int b, u_int s, u_int f, u_int r)
+cia_bwx_cfgreadb(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r);
 	u_int8_t data;
@@ -348,7 +348,7 @@ cia_bwx_cfgreadb(u_int b, u_int s, u_int f, u_int r)
 }
 
 static u_int16_t
-cia_bwx_cfgreadw(u_int b, u_int s, u_int f, u_int r)
+cia_bwx_cfgreadw(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r);
 	u_int16_t data;
@@ -364,7 +364,7 @@ cia_bwx_cfgreadw(u_int b, u_int s, u_int f, u_int r)
 }
 
 static u_int32_t
-cia_bwx_cfgreadl(u_int b, u_int s, u_int f, u_int r)
+cia_bwx_cfgreadl(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r);
 	u_int32_t data;
@@ -380,7 +380,7 @@ cia_bwx_cfgreadl(u_int b, u_int s, u_int f, u_int r)
 }
 
 static void
-cia_bwx_cfgwriteb(u_int b, u_int s, u_int f, u_int r, u_int8_t data)
+cia_bwx_cfgwriteb(u_int h, u_int b, u_int s, u_int f, u_int r, u_int8_t data)
 {
 	vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r);
 	cia_clear_abort();
@@ -390,7 +390,7 @@ cia_bwx_cfgwriteb(u_int b, u_int s, u_int f, u_int r, u_int8_t data)
 }
 
 static void
-cia_bwx_cfgwritew(u_int b, u_int s, u_int f, u_int r, u_int16_t data)
+cia_bwx_cfgwritew(u_int h, u_int b, u_int s, u_int f, u_int r, u_int16_t data)
 {
 	vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r);
 	if (badaddr((caddr_t)va, 2)) return;
@@ -399,7 +399,7 @@ cia_bwx_cfgwritew(u_int b, u_int s, u_int f, u_int r, u_int16_t data)
 }
 
 static void
-cia_bwx_cfgwritel(u_int b, u_int s, u_int f, u_int r, u_int32_t data)
+cia_bwx_cfgwritel(u_int h, u_int b, u_int s, u_int f, u_int r, u_int32_t data)
 {
 	vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r);
 	if (badaddr((caddr_t)va, 4)) return;
@@ -579,37 +579,37 @@ cia_swiz_maxdevs(u_int b)
 	return;							
 
 static u_int8_t
-cia_swiz_cfgreadb(u_int b, u_int s, u_int f, u_int r)
+cia_swiz_cfgreadb(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	SWIZ_CFGREAD(b, s, f, r, BYTE, u_int8_t);
 }
 
 static u_int16_t
-cia_swiz_cfgreadw(u_int b, u_int s, u_int f, u_int r)
+cia_swiz_cfgreadw(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	SWIZ_CFGREAD(b, s, f, r, WORD, u_int16_t);
 }
 
 static u_int32_t
-cia_swiz_cfgreadl(u_int b, u_int s, u_int f, u_int r)
+cia_swiz_cfgreadl(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	SWIZ_CFGREAD(b, s, f, r, LONG, u_int32_t);
 }
 
 static void
-cia_swiz_cfgwriteb(u_int b, u_int s, u_int f, u_int r, u_int8_t data)
+cia_swiz_cfgwriteb(u_int h, u_int b, u_int s, u_int f, u_int r, u_int8_t data)
 {
 	SWIZ_CFGWRITE(b, s, f, r, data, BYTE, u_int8_t);
 }
 
 static void
-cia_swiz_cfgwritew(u_int b, u_int s, u_int f, u_int r, u_int16_t data)
+cia_swiz_cfgwritew(u_int h, u_int b, u_int s, u_int f, u_int r, u_int16_t data)
 {
 	SWIZ_CFGWRITE(b, s, f, r, data, WORD, u_int16_t);
 }
 
 static void
-cia_swiz_cfgwritel(u_int b, u_int s, u_int f, u_int r, u_int32_t data)
+cia_swiz_cfgwritel(u_int h, u_int b, u_int s, u_int f, u_int r, u_int32_t data)
 {
 	SWIZ_CFGWRITE(b, s, f, r, data, LONG, u_int32_t);
 }
diff --git a/sys/alpha/pci/cia_pci.c b/sys/alpha/pci/cia_pci.c
index 9b0c7d1..fdf0016 100644
--- a/sys/alpha/pci/cia_pci.c
+++ b/sys/alpha/pci/cia_pci.c
@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: cia_pci.c,v 1.1 1999/04/16 21:21:39 peter Exp $
+ *	$Id: cia_pci.c,v 1.2 1999/05/08 21:58:42 dfr Exp $
  */
 
 #include <sys/param.h>
@@ -33,6 +33,7 @@
 #include <sys/bus.h>
 #include <machine/bus.h>
 #include <sys/rman.h>
+#include <pci/pcivar.h>
 
 static devclass_t	pcib_devclass;
 
@@ -46,6 +47,16 @@ cia_pcib_probe(device_t dev)
 	return 0;
 }
 
+static int
+cia_pcib_read_ivar(device_t dev, device_t child, int which, u_long *result)
+{
+	if (which == PCIB_IVAR_HOSE) {
+		*result = 0;
+		return 0;
+	}
+	return ENOENT;
+}
+
 static device_method_t cia_pcib_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		cia_pcib_probe),
@@ -53,6 +64,7 @@ static device_method_t cia_pcib_methods[] = {
 
 	/* Bus interface */
 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
+	DEVMETHOD(bus_read_ivar,	cia_pcib_read_ivar),
 	DEVMETHOD(bus_alloc_resource,	bus_generic_alloc_resource),
 	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
diff --git a/sys/alpha/pci/lca.c b/sys/alpha/pci/lca.c
index 6427c21..f7868da 100644
--- a/sys/alpha/pci/lca.c
+++ b/sys/alpha/pci/lca.c
@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: lca.c,v 1.7 1999/05/08 21:58:43 dfr Exp $
+ *	$Id: lca.c,v 1.8 1999/05/10 15:46:38 peter Exp $
  */
 
 #include <sys/param.h>
@@ -276,37 +276,37 @@ lca_maxdevs(u_int b)
 	return
 
 static u_int8_t
-lca_cfgreadb(u_int b, u_int s, u_int f, u_int r)
+lca_cfgreadb(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	CFGREAD(b, s, f, r, BYTE, u_int8_t);
 }
 
 static u_int16_t
-lca_cfgreadw(u_int b, u_int s, u_int f, u_int r)
+lca_cfgreadw(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	CFGREAD(b, s, f, r, WORD, u_int16_t);
 }
 
 static u_int32_t
-lca_cfgreadl(u_int b, u_int s, u_int f, u_int r)
+lca_cfgreadl(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	CFGREAD(b, s, f, r, LONG, u_int32_t);
 }
 
 static void
-lca_cfgwriteb(u_int b, u_int s, u_int f, u_int r, u_int8_t data)
+lca_cfgwriteb(u_int h, u_int b, u_int s, u_int f, u_int r, u_int8_t data)
 {
 	CFGWRITE(b, s, f, r, data, BYTE, u_int8_t);
 }
 
 static void
-lca_cfgwritew(u_int b, u_int s, u_int f, u_int r, u_int16_t data)
+lca_cfgwritew(u_int h, u_int b, u_int s, u_int f, u_int r, u_int16_t data)
 {
 	CFGWRITE(b, s, f, r, data, WORD, u_int16_t);
 }
 
 static void
-lca_cfgwritel(u_int b, u_int s, u_int f, u_int r, u_int32_t data)
+lca_cfgwritel(u_int h, u_int b, u_int s, u_int f, u_int r, u_int32_t data)
 {
 	CFGWRITE(b, s, f, r, data, LONG, u_int16_t);
 }
diff --git a/sys/alpha/pci/lca_pci.c b/sys/alpha/pci/lca_pci.c
index 7e84de4..f74840f 100644
--- a/sys/alpha/pci/lca_pci.c
+++ b/sys/alpha/pci/lca_pci.c
@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: lca_pci.c,v 1.1 1999/04/16 21:21:39 peter Exp $
+ *	$Id: lca_pci.c,v 1.2 1999/05/08 21:58:43 dfr Exp $
  */
 
 #include <sys/param.h>
@@ -33,6 +33,7 @@
 #include <sys/bus.h>
 #include <machine/bus.h>
 #include <sys/rman.h>
+#include <pci/pcivar.h>
 
 static devclass_t	pcib_devclass;
 
@@ -46,6 +47,16 @@ lca_pcib_probe(device_t dev)
 	return 0;
 }
 
+static int
+lca_pcib_read_ivar(device_t dev, device_t child, int which, u_long *result)
+{
+	if (which == PCIB_IVAR_HOSE) {
+		*result = 0;
+		return 0;
+	}
+	return ENOENT;
+}
+
 static device_method_t lca_pcib_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		lca_pcib_probe),
@@ -53,6 +64,7 @@ static device_method_t lca_pcib_methods[] = {
 
 	/* Bus interface */
 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
+	DEVMETHOD(bus_read_ivar,	lca_pcib_read_ivar),
 	DEVMETHOD(bus_alloc_resource,	bus_generic_alloc_resource),
 	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
diff --git a/sys/alpha/pci/pcibus.c b/sys/alpha/pci/pcibus.c
index 0a1d672..5b4cbf8 100644
--- a/sys/alpha/pci/pcibus.c
+++ b/sys/alpha/pci/pcibus.c
@@ -23,7 +23,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * $Id: pcibus.c,v 1.12 1999/05/08 21:58:44 dfr Exp $
+ * $Id: pcibus.c,v 1.13 1999/05/18 23:20:14 peter Exp $
  *
  */
 
@@ -82,11 +82,14 @@ pci_cfgread(pcicfgregs *cfg, int reg, int bytes)
 {
 	switch (bytes) {
 	case 1:
-		return chipset.cfgreadb(cfg->bus, cfg->slot, cfg->func, reg);
+		return chipset.cfgreadb(cfg->hose, cfg->bus, 
+					cfg->slot, cfg->func, reg);
 	case 2:
-		return chipset.cfgreadw(cfg->bus, cfg->slot, cfg->func, reg);
+		return chipset.cfgreadw(cfg->hose, cfg->bus, 
+					cfg->slot, cfg->func, reg);
 	case 4:
-		return chipset.cfgreadl(cfg->bus, cfg->slot, cfg->func, reg);
+		return chipset.cfgreadl(cfg->hose, cfg->bus, 
+					cfg->slot, cfg->func, reg);
 	}
 	return ~0;
 }		
@@ -99,11 +102,14 @@ pci_cfgwrite(pcicfgregs *cfg, int reg, int data, int bytes)
 {
 	switch (bytes) {
 	case 1:
-		return chipset.cfgwriteb(cfg->bus, cfg->slot, cfg->func, reg, data);
+		return chipset.cfgwriteb(cfg->hose, cfg->bus, 
+					 cfg->slot, cfg->func, reg, data);
 	case 2:
-		return chipset.cfgwritew(cfg->bus, cfg->slot, cfg->func, reg, data);
+		return chipset.cfgwritew(cfg->hose, cfg->bus, 
+					 cfg->slot, cfg->func, reg, data);
 	case 4:
-		return chipset.cfgwritel(cfg->bus, cfg->slot, cfg->func, reg, data);
+		return chipset.cfgwritel(cfg->hose, cfg->bus, 
+					 cfg->slot, cfg->func, reg, data);
 	}
 }
 
@@ -155,11 +161,11 @@ static struct rman irq_rman, port_rman, mem_rman;
 void pci_init_resources()
 {
 	irq_rman.rm_start = 0;
-	irq_rman.rm_end = 32;
+	irq_rman.rm_end = 64;
 	irq_rman.rm_type = RMAN_ARRAY;
 	irq_rman.rm_descr = "PCI Interrupt request lines";
 	if (rman_init(&irq_rman)
-	    || rman_manage_region(&irq_rman, 0, 31))
+	    || rman_manage_region(&irq_rman, 0, 63))
 		panic("pci_init_resources irq_rman");
 
 	port_rman.rm_start = 0;
diff --git a/sys/alpha/tlsb/dwlpx.c b/sys/alpha/tlsb/dwlpx.c
index d558b51..1df3e65 100644
--- a/sys/alpha/tlsb/dwlpx.c
+++ b/sys/alpha/tlsb/dwlpx.c
@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: dwlpx.c,v 1.8 1999/04/16 21:21:42 peter Exp $
+ *	$Id: dwlpx.c,v 1.9 1999/05/08 21:58:51 dfr Exp $
  */
 
 #include "opt_simos.h"
@@ -218,37 +218,37 @@ dwlpx_maxdevs(u_int b)
 	SPARSE_WRITE(kv, SPARSE_##width##_INSERT(off, data))
 
 static u_int8_t
-dwlpx_cfgreadb(u_int b, u_int s, u_int f, u_int r)
+dwlpx_cfgreadb(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	CFGREAD(b, s, f, r, BYTE);
 }
 
 static u_int16_t
-dwlpx_cfgreadw(u_int b, u_int s, u_int f, u_int r)
+dwlpx_cfgreadw(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	CFGREAD(b, s, f, r, WORD);
 }
 
 static u_int32_t
-dwlpx_cfgreadl(u_int b, u_int s, u_int f, u_int r)
+dwlpx_cfgreadl(u_int h, u_int b, u_int s, u_int f, u_int r)
 {
 	CFGREAD(b, s, f, r, LONG);
 }
 
 static void
-dwlpx_cfgwriteb(u_int b, u_int s, u_int f, u_int r, u_int8_t data)
+dwlpx_cfgwriteb(u_int h, u_int b, u_int s, u_int f, u_int r, u_int8_t data)
 {
 	CFGWRITE(b, s, f, r, data, BYTE);
 }
 
 static void
-dwlpx_cfgwritew(u_int b, u_int s, u_int f, u_int r, u_int16_t data)
+dwlpx_cfgwritew(u_int h, u_int b, u_int s, u_int f, u_int r, u_int16_t data)
 {
 	CFGWRITE(b, s, f, r, data, WORD);
 }
 
 static void
-dwlpx_cfgwritel(u_int b, u_int s, u_int f, u_int r, u_int32_t data)
+dwlpx_cfgwritel(u_int h, u_int b, u_int s, u_int f, u_int r, u_int32_t data)
 {
 	CFGWRITE(b, s, f, r, data, LONG);
 }
diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
index 3583a98..d09665f0 100644
--- a/sys/dev/pci/pci.c
+++ b/sys/dev/pci/pci.c
@@ -23,7 +23,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * $Id: pci.c,v 1.102 1999/05/09 20:27:26 peter Exp $
+ * $Id: pci.c,v 1.103 1999/05/10 17:56:22 dfr Exp $
  *
  */
 
@@ -199,6 +199,26 @@ pci_readmaps(pcicfgregs *cfg, int maxmaps)
 				map[j].base     = base;
 				map64 = 0;
 			}
+#ifdef __alpha__
+			/* 
+			 *  XXX: encode hose number in the base addr,
+			 *  This will go away once the bus_space functions
+			 *  can deal with multiple hoses 
+			 */
+
+			if(cfg->hose){
+				if(map[j].base & 0x80000000){
+					printf("base   addr = 0x%x\n", map[j].base);
+					printf("hacked addr = 0x%x\n",
+					       map[j].base | (cfg->hose << 31));
+					
+					panic("hose encoding hack would clobber base addr");
+				}
+				if(cfg->hose > 1 )
+					panic("only one hose supported!");
+				map[j].base |=  (cfg->hose << 31);
+			}
+#endif
 			j++;
 		}
 	}
@@ -339,7 +359,8 @@ pci_readcfg(pcicfgregs *probe)
 		bzero(devlist_entry, sizeof *devlist_entry);
 
 		cfg = &devlist_entry->cfg;
-
+		
+		cfg->hose               = probe->hose;
 		cfg->bus		= probe->bus;
 		cfg->slot		= probe->slot;
 		cfg->func		= probe->func;
@@ -447,6 +468,7 @@ pci_freecfg(struct pci_devinfo *dinfo)
 }
 #endif
 
+
 /*
  * This is the user interface to PCI configuration space.
  */
@@ -991,7 +1013,14 @@ pci_add_children(device_t dev, int busno)
 #endif
 
 	bzero(&probe, sizeof probe);
+#ifdef __alpha__
+	probe.hose = pcib_get_hose(dev);
+#endif
+#ifdef __i386__
+	probe.hose = 0;
+#endif
 	probe.bus = busno;
+
 	for (probe.slot = 0; probe.slot <= PCI_SLOTMAX; probe.slot++) {
 		int pcifunchigh = 0;
 		for (probe.func = 0; probe.func <= pcifunchigh; probe.func++) {
@@ -1097,6 +1126,12 @@ pci_read_ivar(device_t dev, device_t child, int which, u_long *result)
 	case PCI_IVAR_SUBORDINATEBUS:
 		*result = cfg->subordinatebus;
 		break;
+	case PCI_IVAR_HOSE:
+		/*
+		 * Pass up to parent bridge.
+		 */
+		*result = pcib_get_hose(dev);
+		break;
 	default:
 		return ENOENT;
 	}
diff --git a/sys/dev/pci/pcivar.h b/sys/dev/pci/pcivar.h
index 432551b..29d82a3 100644
--- a/sys/dev/pci/pcivar.h
+++ b/sys/dev/pci/pcivar.h
@@ -23,7 +23,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * $Id: pcivar.h,v 1.31 1999/05/11 07:55:32 peter Exp $
+ * $Id: pcivar.h,v 1.32 1999/05/18 20:48:38 peter Exp $
  *
  */
 
@@ -104,6 +104,7 @@ typedef struct pcicfg {
     u_int8_t	mfdev;		/* multi-function device (from hdrtype reg) */
     u_int8_t	nummaps;	/* actual number of PCI maps used */
 
+    u_int8_t    hose;           /* hose which bus is attached to */
     u_int8_t	bus;		/* config space bus address */
     u_int8_t	slot;		/* config space slot address */
     u_int8_t	func;		/* config space function number */
@@ -205,6 +206,7 @@ enum pci_device_ivars {
 	PCI_IVAR_FUNCTION,
 	PCI_IVAR_SECONDARYBUS,
 	PCI_IVAR_SUBORDINATEBUS,
+	PCI_IVAR_HOSE,
 };
 
 /*
@@ -241,6 +243,7 @@ PCI_ACCESSOR(slot,		SLOT,		u_int8_t)
 PCI_ACCESSOR(function,		FUNCTION,	u_int8_t)
 PCI_ACCESSOR(secondarybus,	SECONDARYBUS,	u_int8_t)
 PCI_ACCESSOR(subordinatebus,	SUBORDINATEBUS,	u_int8_t)
+PCI_ACCESSOR(hose,		HOSE,		u_int32_t)
 
 static __inline u_int32_t
 pci_read_config(device_t dev, int reg, int width)
@@ -254,6 +257,32 @@ pci_write_config(device_t dev, int reg, u_int32_t val, int width)
     PCI_WRITE_CONFIG(device_get_parent(dev), dev, reg, val, width);
 }
 
+/*
+ * Ivars for pci bridges.
+ */
+
+/*typedef enum pci_device_ivars pcib_device_ivars;*/
+enum pcib_device_ivars {
+	PCIB_IVAR_HOSE,
+};
+
+#define PCIB_ACCESSOR(A, B, T)						 \
+									 \
+static __inline T pcib_get_ ## A(device_t dev)				 \
+{									 \
+	uintptr_t v;							 \
+	BUS_READ_IVAR(device_get_parent(dev), dev, PCIB_IVAR_ ## B, &v); \
+	return (T) v;							 \
+}									 \
+									 \
+static __inline void pcib_set_ ## A(device_t dev, T t)			 \
+{									 \
+	u_long v = (u_long) t;						 \
+	BUS_WRITE_IVAR(device_get_parent(dev), dev, PCIB_IVAR_ ## B, v); \
+}
+
+PCIB_ACCESSOR(hose,		HOSE,		u_int32_t)
+
 #endif
 
 /* for compatibility to FreeBSD-2.2 version of PCI code */
diff --git a/sys/pci/pci.c b/sys/pci/pci.c
index 3583a98..d09665f0 100644
--- a/sys/pci/pci.c
+++ b/sys/pci/pci.c
@@ -23,7 +23,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * $Id: pci.c,v 1.102 1999/05/09 20:27:26 peter Exp $
+ * $Id: pci.c,v 1.103 1999/05/10 17:56:22 dfr Exp $
  *
  */
 
@@ -199,6 +199,26 @@ pci_readmaps(pcicfgregs *cfg, int maxmaps)
 				map[j].base     = base;
 				map64 = 0;
 			}
+#ifdef __alpha__
+			/* 
+			 *  XXX: encode hose number in the base addr,
+			 *  This will go away once the bus_space functions
+			 *  can deal with multiple hoses 
+			 */
+
+			if(cfg->hose){
+				if(map[j].base & 0x80000000){
+					printf("base   addr = 0x%x\n", map[j].base);
+					printf("hacked addr = 0x%x\n",
+					       map[j].base | (cfg->hose << 31));
+					
+					panic("hose encoding hack would clobber base addr");
+				}
+				if(cfg->hose > 1 )
+					panic("only one hose supported!");
+				map[j].base |=  (cfg->hose << 31);
+			}
+#endif
 			j++;
 		}
 	}
@@ -339,7 +359,8 @@ pci_readcfg(pcicfgregs *probe)
 		bzero(devlist_entry, sizeof *devlist_entry);
 
 		cfg = &devlist_entry->cfg;
-
+		
+		cfg->hose               = probe->hose;
 		cfg->bus		= probe->bus;
 		cfg->slot		= probe->slot;
 		cfg->func		= probe->func;
@@ -447,6 +468,7 @@ pci_freecfg(struct pci_devinfo *dinfo)
 }
 #endif
 
+
 /*
  * This is the user interface to PCI configuration space.
  */
@@ -991,7 +1013,14 @@ pci_add_children(device_t dev, int busno)
 #endif
 
 	bzero(&probe, sizeof probe);
+#ifdef __alpha__
+	probe.hose = pcib_get_hose(dev);
+#endif
+#ifdef __i386__
+	probe.hose = 0;
+#endif
 	probe.bus = busno;
+
 	for (probe.slot = 0; probe.slot <= PCI_SLOTMAX; probe.slot++) {
 		int pcifunchigh = 0;
 		for (probe.func = 0; probe.func <= pcifunchigh; probe.func++) {
@@ -1097,6 +1126,12 @@ pci_read_ivar(device_t dev, device_t child, int which, u_long *result)
 	case PCI_IVAR_SUBORDINATEBUS:
 		*result = cfg->subordinatebus;
 		break;
+	case PCI_IVAR_HOSE:
+		/*
+		 * Pass up to parent bridge.
+		 */
+		*result = pcib_get_hose(dev);
+		break;
 	default:
 		return ENOENT;
 	}
diff --git a/sys/pci/pcisupport.c b/sys/pci/pcisupport.c
index 42b788a..dff5600 100644
--- a/sys/pci/pcisupport.c
+++ b/sys/pci/pcisupport.c
@@ -1,6 +1,6 @@
 /**************************************************************************
 **
-**  $Id: pcisupport.c,v 1.110 1999/05/10 17:56:23 dfr Exp $
+**  $Id: pcisupport.c,v 1.111 1999/05/11 07:55:31 peter Exp $
 **
 **  Device driver for DEC/INTEL PCI chipsets.
 **
@@ -869,6 +869,19 @@ static int pcib_attach(device_t dev)
 		return 0;
 }
 
+static int
+pcib_read_ivar(device_t dev, device_t child, int which, u_long *result)
+{
+	if (which == PCIB_IVAR_HOSE) {
+		/*
+		 * Pass up to parent bus.
+		 */
+		*result = pci_get_hose(dev);
+		return(0);
+	}
+	return ENOENT;
+}
+
 static device_method_t pcib_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		pcib_probe),
@@ -879,6 +892,7 @@ static device_method_t pcib_methods[] = {
 
 	/* Bus interface */
 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
+	DEVMETHOD(bus_read_ivar,	pcib_read_ivar),
 	DEVMETHOD(bus_alloc_resource,	bus_generic_alloc_resource),
 	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
diff --git a/sys/pci/pcivar.h b/sys/pci/pcivar.h
index 432551b..29d82a3 100644
--- a/sys/pci/pcivar.h
+++ b/sys/pci/pcivar.h
@@ -23,7 +23,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * $Id: pcivar.h,v 1.31 1999/05/11 07:55:32 peter Exp $
+ * $Id: pcivar.h,v 1.32 1999/05/18 20:48:38 peter Exp $
  *
  */
 
@@ -104,6 +104,7 @@ typedef struct pcicfg {
     u_int8_t	mfdev;		/* multi-function device (from hdrtype reg) */
     u_int8_t	nummaps;	/* actual number of PCI maps used */
 
+    u_int8_t    hose;           /* hose which bus is attached to */
     u_int8_t	bus;		/* config space bus address */
     u_int8_t	slot;		/* config space slot address */
     u_int8_t	func;		/* config space function number */
@@ -205,6 +206,7 @@ enum pci_device_ivars {
 	PCI_IVAR_FUNCTION,
 	PCI_IVAR_SECONDARYBUS,
 	PCI_IVAR_SUBORDINATEBUS,
+	PCI_IVAR_HOSE,
 };
 
 /*
@@ -241,6 +243,7 @@ PCI_ACCESSOR(slot,		SLOT,		u_int8_t)
 PCI_ACCESSOR(function,		FUNCTION,	u_int8_t)
 PCI_ACCESSOR(secondarybus,	SECONDARYBUS,	u_int8_t)
 PCI_ACCESSOR(subordinatebus,	SUBORDINATEBUS,	u_int8_t)
+PCI_ACCESSOR(hose,		HOSE,		u_int32_t)
 
 static __inline u_int32_t
 pci_read_config(device_t dev, int reg, int width)
@@ -254,6 +257,32 @@ pci_write_config(device_t dev, int reg, u_int32_t val, int width)
     PCI_WRITE_CONFIG(device_get_parent(dev), dev, reg, val, width);
 }
 
+/*
+ * Ivars for pci bridges.
+ */
+
+/*typedef enum pci_device_ivars pcib_device_ivars;*/
+enum pcib_device_ivars {
+	PCIB_IVAR_HOSE,
+};
+
+#define PCIB_ACCESSOR(A, B, T)						 \
+									 \
+static __inline T pcib_get_ ## A(device_t dev)				 \
+{									 \
+	uintptr_t v;							 \
+	BUS_READ_IVAR(device_get_parent(dev), dev, PCIB_IVAR_ ## B, &v); \
+	return (T) v;							 \
+}									 \
+									 \
+static __inline void pcib_set_ ## A(device_t dev, T t)			 \
+{									 \
+	u_long v = (u_long) t;						 \
+	BUS_WRITE_IVAR(device_get_parent(dev), dev, PCIB_IVAR_ ## B, v); \
+}
+
+PCIB_ACCESSOR(hose,		HOSE,		u_int32_t)
+
 #endif
 
 /* for compatibility to FreeBSD-2.2 version of PCI code */