Add cpufreq support on the PowerPC G5, along with a skeleton SMU driver

in order to slew CPU voltage during frequency changes. The OpenBSD SMU
driver was an extremely helpful reference for this.

5 files changed, 629 insertions, 4 deletions

diff --git a/sys/conf/files.powerpc b/sys/conf/files.powerpc
index bee10fb..8a19155 100644
--- a/sys/conf/files.powerpc
+++ b/sys/conf/files.powerpc
@@ -99,6 +99,7 @@ powerpc/booke/swtch.S		optional	e500
 powerpc/booke/trap.c		optional	e500
 powerpc/booke/vm_machdep.c	optional	e500
 powerpc/cpufreq/dfs.c		optional	cpufreq
+powerpc/cpufreq/pcr.c		optional	cpufreq aim
 powerpc/fpu/fpu_add.c		optional	fpu_emu
 powerpc/fpu/fpu_compare.c	optional	fpu_emu
 powerpc/fpu/fpu_div.c		optional	fpu_emu
@@ -127,18 +128,19 @@ powerpc/ofw/ofw_syscons.c	optional	sc aim
 powerpc/powermac/ata_kauai.c	optional	powermac ata | powermac atamacio
 powerpc/powermac/ata_macio.c	optional	powermac ata | powermac atamacio
 powerpc/powermac/ata_dbdma.c	optional	powermac ata | powermac atamacio
+powerpc/powermac/cuda.c		optional	powermac cuda
+powerpc/powermac/cpcht.c	optional	powermac pci
 powerpc/powermac/dbdma.c	optional	powermac pci
 powerpc/powermac/grackle.c	optional	powermac pci
 powerpc/powermac/hrowpic.c	optional	powermac pci
 powerpc/powermac/kiic.c		optional	powermac kiic
+powerpc/powermac/macgpio.c	optional	powermac pci 
 powerpc/powermac/macio.c	optional	powermac pci
 powerpc/powermac/openpic_macio.c optional	powermac pci
 powerpc/powermac/pswitch.c	optional	powermac pswitch
-powerpc/powermac/uninorth.c	optional	powermac pci
-powerpc/powermac/cuda.c		optional	powermac cuda
 powerpc/powermac/pmu.c		optional	powermac pmu 
-powerpc/powermac/macgpio.c	optional	powermac pci 
-powerpc/powermac/cpcht.c	optional	powermac pci
+powerpc/powermac/smu.c		optional	powermac smu 
+powerpc/powermac/uninorth.c	optional	powermac pci
 powerpc/powermac/vcoregpio.c	optional	powermac 
 powerpc/powerpc/altivec.c	optional	aim
 powerpc/powerpc/atomic.S	standard
diff --git a/sys/powerpc/conf/GENERIC b/sys/powerpc/conf/GENERIC
index 2f9b264..04f5cb5 100644
--- a/sys/powerpc/conf/GENERIC
+++ b/sys/powerpc/conf/GENERIC
@@ -158,6 +158,7 @@ device		fwe		# Ethernet over FireWire (non-standard!)
 
 # Misc
 device		powermac_nvram	# Open Firmware configuration NVRAM
+device		smu		# Apple System Management Unit
 
 # ADB support
 device		adb
diff --git a/sys/powerpc/conf/NOTES b/sys/powerpc/conf/NOTES
index d6084ed..38eed7b 100644
--- a/sys/powerpc/conf/NOTES
+++ b/sys/powerpc/conf/NOTES
@@ -33,6 +33,7 @@ device		ofwd		# Open Firmware disks
 device		adb		# Apple Desktop Bus
 device		cuda		# VIA-CUDA ADB interface
 device		pmu		# Apple Power Management Unit
+device		smu		# Apple System Management Unit
 device		snd_ai2s	# Apple I2S Audio
 device		snd_davbus	# Apple Davbus Audio
 
diff --git a/sys/powerpc/cpufreq/pcr.c b/sys/powerpc/cpufreq/pcr.c
new file mode 100644
index 0000000..5dacaaa
--- /dev/null
+++ b/sys/powerpc/cpufreq/pcr.c
@@ -0,0 +1,333 @@
+/*-
+ * Copyright (c) 2009 Nathan Whitehorn
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/cpu.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+
+#include <dev/ofw/ofw_bus.h>
+
+#include "cpufreq_if.h"
+
+struct pcr_softc {
+	device_t dev;
+	uint32_t pcr_vals[3];
+	int nmodes;
+};
+
+static void	pcr_identify(driver_t *driver, device_t parent);
+static int	pcr_probe(device_t dev);
+static int	pcr_attach(device_t dev);
+static int	pcr_settings(device_t dev, struct cf_setting *sets, int *count);
+static int	pcr_set(device_t dev, const struct cf_setting *set);
+static int	pcr_get(device_t dev, struct cf_setting *set);
+static int	pcr_type(device_t dev, int *type);
+
+static device_method_t pcr_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_identify,	pcr_identify),
+	DEVMETHOD(device_probe,		pcr_probe),
+	DEVMETHOD(device_attach,	pcr_attach),
+
+	/* cpufreq interface */
+	DEVMETHOD(cpufreq_drv_set,	pcr_set),
+	DEVMETHOD(cpufreq_drv_get,	pcr_get),
+	DEVMETHOD(cpufreq_drv_type,	pcr_type),
+	DEVMETHOD(cpufreq_drv_settings,	pcr_settings),
+
+	{0, 0}
+};
+
+static driver_t pcr_driver = {
+	"pcr",
+	pcr_methods,
+	sizeof(struct pcr_softc)
+};
+
+static devclass_t pcr_devclass;
+DRIVER_MODULE(pcr, cpu, pcr_driver, pcr_devclass, 0, 0);
+
+/*
+ * States
+ */
+
+#define PCR_TO_FREQ(a)	((a >> 17) & 3)
+
+#define	PCR_FULL	0
+#define PCR_HALF	1
+#define PCR_QUARTER	2		/* Only on 970MP */
+
+#define PSR_RECEIVED	(1ULL << 61)
+#define PSR_COMPLETED	(1ULL << 61)
+
+/*
+ * SCOM addresses
+ */
+
+#define	SCOM_PCR	0x0aa00100	/* Power Control Register */
+#define SCOM_PCR_BIT	0x80000000	/* Data bit for PCR */
+#define SCOM_PSR	0x40800100	/* Power Status Register */
+
+/*
+ * SCOM Glue
+ */
+
+#define SCOMC_READ	0x00008000
+#define SCOMC_WRITE	0x00000000 
+
+static void
+write_scom(register_t address, uint64_t value)
+{
+	register_t msr;
+	register_t hi, lo, scratch;
+
+	hi = (value >> 32) & 0xffffffff;
+	lo = value & 0xffffffff;
+
+	msr = mfmsr();
+	mtmsr(msr & ~PSL_EE); isync();
+
+	mtspr64(SPR_SCOMD, hi, lo, scratch); 
+	isync();
+	mtspr(SPR_SCOMC, address | SCOMC_WRITE);
+	isync();
+
+	mtmsr(msr); isync();
+}
+
+static uint64_t
+read_scom(register_t address)
+{
+	register_t msr;
+	uint64_t ret;
+
+	msr = mfmsr();
+	mtmsr(msr & ~PSL_EE); isync();
+
+	mtspr(SPR_SCOMC, address | SCOMC_READ);
+	isync();
+
+	__asm __volatile ("mfspr %0,%1;"
+            " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret) : "K" (SPR_SCOMD));
+
+	(void)mfspr(SPR_SCOMC); /* Complete transcation */
+
+	mtmsr(msr); isync();
+
+	return (ret);
+}
+
+static void
+pcr_identify(driver_t *driver, device_t parent)
+{
+	uint16_t vers;
+	vers = mfpvr() >> 16;
+
+	/* Check for an IBM 970-class CPU */
+	switch (vers) {
+		case IBM970FX:
+		case IBM970GX:
+		case IBM970MP:
+			break;
+		default:
+			return;
+	}
+
+	/* Make sure we're not being doubly invoked. */
+	if (device_find_child(parent, "pcr", -1) != NULL)
+		return;
+
+	/*
+	 * We attach a child for every CPU since settings need to
+	 * be performed on every CPU in the SMP case.
+	 */
+	if (BUS_ADD_CHILD(parent, 10, "pcr", -1) == NULL)
+		device_printf(parent, "add pcr child failed\n");
+}
+
+static int
+pcr_probe(device_t dev)
+{
+	if (resource_disabled("pcr", 0))
+		return (ENXIO);
+
+	device_set_desc(dev, "PPC 970 Power Control Register");
+	return (0);
+}
+
+static int
+pcr_attach(device_t dev)
+{
+	struct pcr_softc *sc;
+	phandle_t cpu;
+	uint32_t modes[3];
+	int i;
+
+	sc = device_get_softc(dev);
+	sc->dev = dev;
+
+	cpu = ofw_bus_get_node(device_get_parent(dev));
+
+	if (cpu <= 0) {
+		device_printf(dev,"No CPU device tree node!\n");
+		return (ENXIO);
+	}
+
+	/*
+	 * Collect the PCR values for each mode from the device tree.
+	 * These include bus timing information, and so cannot be
+	 * directly computed.
+	 */
+	sc->nmodes = OF_getproplen(cpu, "power-mode-data");
+	if (sc->nmodes <= 0 || sc->nmodes > sizeof(sc->pcr_vals)) {
+		device_printf(dev,"No power mode data in device tree!\n");
+		return (ENXIO);
+	}
+	OF_getprop(cpu, "power-mode-data", modes, sc->nmodes);
+	sc->nmodes /= sizeof(modes[0]);
+
+	/* Sort the modes */
+	for (i = 0; i < sc->nmodes; i++)
+		sc->pcr_vals[PCR_TO_FREQ(modes[i])] = modes[i];
+
+	cpufreq_register(dev);
+	return (0);
+}
+
+static int
+pcr_settings(device_t dev, struct cf_setting *sets, int *count)
+{
+	struct pcr_softc *sc;
+
+	sc = device_get_softc(dev);
+	if (sets == NULL || count == NULL)
+		return (EINVAL);
+	if (*count < sc->nmodes)
+		return (E2BIG);
+
+	/* Return a list of valid settings for this driver. */
+	memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * sc->nmodes);
+
+	sets[0].freq = 10000; sets[0].dev = dev;
+	sets[1].freq = 5000; sets[1].dev = dev;
+	if (sc->nmodes > 2)
+		sets[2].freq = 2500; sets[2].dev = dev;
+	*count = sc->nmodes;
+
+	return (0);
+}
+
+static int
+pcr_set(device_t dev, const struct cf_setting *set)
+{
+	struct pcr_softc *sc;
+	register_t pcr, msr;
+	uint64_t psr;
+	
+	if (set == NULL)
+		return (EINVAL);
+	sc = device_get_softc(dev);
+
+	/* Construct the new PCR */
+
+	pcr = SCOM_PCR_BIT;
+
+	if (set->freq == 10000)
+		pcr |= sc->pcr_vals[0];
+	else if (set->freq == 5000)
+		pcr |= sc->pcr_vals[1];
+	else if (set->freq == 2500)
+		pcr |= sc->pcr_vals[2];
+
+	msr = mfmsr(); 
+	mtmsr(msr & ~PSL_EE); isync();
+
+	/* 970MP requires PCR and PCRH to be cleared first */
+
+	write_scom(SCOM_PCR,0);			/* Clear PCRH */
+	write_scom(SCOM_PCR,SCOM_PCR_BIT);	/* Clear PCR */
+
+	/* Set PCR */
+
+	write_scom(SCOM_PCR, pcr);
+
+	/* Wait for completion */
+
+	do {
+		DELAY(100);
+		psr = read_scom(SCOM_PSR);
+	} while ((psr & PSR_RECEIVED) && !(psr & PSR_COMPLETED));
+
+	mtmsr(msr); isync();
+
+	return (0);
+}
+
+static int
+pcr_get(device_t dev, struct cf_setting *set)
+{
+	struct pcr_softc *sc;
+	uint64_t psr;
+
+	if (set == NULL)
+		return (EINVAL);
+	sc = device_get_softc(dev);
+
+	memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set));
+
+	psr = read_scom(SCOM_PSR);
+
+	/* We want bits 6 and 7 */
+	psr = (psr >> 56) & 3;
+
+	set->freq = 10000;
+	if (psr == PCR_HALF)
+		set->freq = 5000;
+	else if (psr == PCR_QUARTER)
+		set->freq = 2500;
+
+	set->dev = dev;
+
+	return (0);
+}
+
+static int
+pcr_type(device_t dev, int *type)
+{
+
+	if (type == NULL)
+		return (EINVAL);
+
+	*type = CPUFREQ_TYPE_RELATIVE;
+	return (0);
+}
+
diff --git a/sys/powerpc/powermac/smu.c b/sys/powerpc/powermac/smu.c
new file mode 100644
index 0000000..4d5e1c8
--- /dev/null
+++ b/sys/powerpc/powermac/smu.c
@@ -0,0 +1,288 @@
+/*-
+ * Copyright (c) 2009 Nathan Whitehorn
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/systm.h>
+#include <sys/module.h>
+#include <sys/conf.h>
+#include <sys/cpu.h>
+#include <sys/kernel.h>
+#include <sys/rman.h>
+#include <sys/sysctl.h>
+
+#include <machine/bus.h>
+#include <machine/md_var.h>
+
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_bus.h>
+#include <powerpc/powermac/macgpiovar.h>
+
+struct smu_cmd {
+	uint8_t		cmd;
+	uint8_t		len;
+	uint8_t		data[254];
+};
+
+struct smu_softc {
+	device_t	sc_dev;
+	struct mtx	sc_mtx;
+
+	struct resource	*sc_memr;
+	int		sc_memrid;
+
+	bus_dma_tag_t	sc_dmatag;
+	bus_space_tag_t	sc_bt;
+	bus_space_handle_t sc_mailbox;
+
+	struct smu_cmd	*sc_cmd;
+	bus_addr_t	sc_cmd_phys;
+	bus_dmamap_t	sc_cmd_dmamap;
+};
+
+/* regular bus attachment functions */
+
+static int	smu_probe(device_t);
+static int	smu_attach(device_t);
+
+/* cpufreq notification hooks */
+
+static void	smu_cpufreq_pre_change(device_t, const struct cf_level *level);
+static void	smu_cpufreq_post_change(device_t, const struct cf_level *level);
+
+/* where to find the doorbell GPIO */
+
+static device_t	smu_doorbell = NULL;
+
+static device_method_t  smu_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		smu_probe),
+	DEVMETHOD(device_attach,	smu_attach),
+	{ 0, 0 },
+};
+
+static driver_t smu_driver = {
+	"smu",
+	smu_methods,
+	sizeof(struct smu_softc)
+};
+
+static devclass_t smu_devclass;
+
+DRIVER_MODULE(smu, nexus, smu_driver, smu_devclass, 0, 0);
+
+#define SMU_MAILBOX	0x860c
+
+/* Command types */
+#define SMU_POWER	0xaa
+
+static int
+smu_probe(device_t dev)
+{
+	const char *name = ofw_bus_get_name(dev);
+
+	if (strcmp(name, "smu") != 0)
+		return (ENXIO);
+
+	device_set_desc(dev, "Apple System Management Unit");
+	return (0);
+}
+
+static void
+smu_phys_callback(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
+{
+	struct smu_softc *sc = xsc;
+
+	sc->sc_cmd_phys = segs[0].ds_addr;
+}
+
+static int
+smu_attach(device_t dev)
+{
+	struct smu_softc *sc;
+
+	sc = device_get_softc(dev);
+
+	mtx_init(&sc->sc_mtx, "smu", NULL, MTX_DEF);
+
+	/*
+	 * Map the mailbox area. This should be determined from firmware,
+	 * but I have not found a simple way to do that.
+	 */
+	bus_dma_tag_create(NULL, 16, 0, BUS_SPACE_MAXADDR_32BIT,
+	    BUS_SPACE_MAXADDR, NULL, NULL, PAGE_SIZE, 1, PAGE_SIZE, 0, NULL,
+	    NULL, &(sc->sc_dmatag));
+	sc->sc_bt = &bs_be_tag;
+	bus_space_map(sc->sc_bt, SMU_MAILBOX, 4, 0, &sc->sc_mailbox);
+
+	/*
+	 * Allocate the command buffer. This can be anywhere in the low 4 GB
+	 * of memory.
+	 */
+	bus_dmamem_alloc(sc->sc_dmatag, (void **)&sc->sc_cmd, BUS_DMA_WAITOK | 
+	    BUS_DMA_ZERO, &sc->sc_cmd_dmamap);
+	bus_dmamap_load(sc->sc_dmatag, sc->sc_cmd_dmamap,
+	    sc->sc_cmd, PAGE_SIZE, smu_phys_callback, sc, 0);
+
+	/*
+	 * Set up handlers to change CPU voltage when CPU frequency is changed.
+	 */
+	EVENTHANDLER_REGISTER(cpufreq_pre_change, smu_cpufreq_pre_change, dev,
+	    EVENTHANDLER_PRI_ANY);
+	EVENTHANDLER_REGISTER(cpufreq_post_change, smu_cpufreq_post_change, dev,
+	    EVENTHANDLER_PRI_ANY);
+
+	return (0);
+}
+
+static int
+smu_run_cmd(device_t dev, struct smu_cmd *cmd)
+{
+	struct smu_softc *sc;
+	int doorbell_ack, result;
+
+	sc = device_get_softc(dev);
+
+	mtx_lock(&sc->sc_mtx);
+
+	/* Copy the command to the mailbox */
+	memcpy(sc->sc_cmd, cmd, sizeof(*cmd));
+	bus_dmamap_sync(sc->sc_dmatag, sc->sc_cmd_dmamap, BUS_DMASYNC_PREWRITE);
+	bus_space_write_4(sc->sc_bt, sc->sc_mailbox, 0, sc->sc_cmd_phys);
+
+	/* Invalidate the cacheline it is in -- SMU bypasses the cache */
+	__asm __volatile("dcbst 0,%0; sync" :: "r"(sc->sc_cmd): "memory");
+
+	/* Ring SMU doorbell */
+	macgpio_write(smu_doorbell, GPIO_DDR_OUTPUT);
+
+	/* Wait for the doorbell GPIO to go high, signaling completion */
+	do {
+		/* XXX: timeout */
+		DELAY(50);
+		doorbell_ack = macgpio_read(smu_doorbell);
+	} while (!doorbell_ack);
+
+	/* Check result. First invalidate the cache again... */
+	__asm __volatile("dcbf 0,%0; sync" :: "r"(sc->sc_cmd) : "memory");
+	
+	bus_dmamap_sync(sc->sc_dmatag, sc->sc_cmd_dmamap, BUS_DMASYNC_POSTREAD);
+
+	/* SMU acks the command by inverting the command bits */
+	if (sc->sc_cmd->cmd == ~cmd->cmd)
+		result = 0;
+	else
+		result = EIO;
+
+	mtx_unlock(&sc->sc_mtx);
+
+	return (result);
+}
+
+static void
+smu_slew_cpu_voltage(device_t dev, int to)
+{
+	struct smu_cmd cmd;
+
+	cmd.cmd = SMU_POWER;
+	cmd.len = 8;
+	cmd.data[0] = 'V';
+	cmd.data[1] = 'S'; 
+	cmd.data[2] = 'L'; 
+	cmd.data[3] = 'E'; 
+	cmd.data[4] = 'W'; 
+	cmd.data[5] = 0xff;
+	cmd.data[6] = 1;
+	cmd.data[7] = to;
+
+	smu_run_cmd(dev, &cmd);
+}
+
+static void
+smu_cpufreq_pre_change(device_t dev, const struct cf_level *level)
+{
+	/*
+	 * Make sure the CPU voltage is raised before we raise
+	 * the clock.
+	 */
+		
+	if (level->rel_set[0].freq == 10000 /* max */)
+		smu_slew_cpu_voltage(dev, 0);
+}
+
+static void
+smu_cpufreq_post_change(device_t dev, const struct cf_level *level)
+{
+	/* We are safe to reduce CPU voltage after a downward transition */
+
+	if (level->rel_set[0].freq < 10000 /* max */)
+		smu_slew_cpu_voltage(dev, 1); /* XXX: 1/4 voltage for 970MP? */
+}
+
+/* Routines for probing the SMU doorbell GPIO */
+static int doorbell_probe(device_t dev);
+static int doorbell_attach(device_t dev);
+
+static device_method_t  doorbell_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		doorbell_probe),
+	DEVMETHOD(device_attach,	doorbell_attach),
+	{ 0, 0 },
+};
+
+static driver_t doorbell_driver = {
+	"smudoorbell",
+	doorbell_methods,
+	0
+};
+
+static devclass_t doorbell_devclass;
+
+DRIVER_MODULE(smudoorbell, macgpio, doorbell_driver, doorbell_devclass, 0, 0);
+
+static int
+doorbell_probe(device_t dev)
+{
+	const char *name = ofw_bus_get_name(dev);
+
+	if (strcmp(name, "smu-doorbell") != 0)
+		return (ENXIO);
+
+	device_set_desc(dev, "SMU Doorbell GPIO");
+	device_quiet(dev);
+	return (0);
+}
+
+static int
+doorbell_attach(device_t dev)
+{
+	smu_doorbell = dev;
+	return (0);
+}