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authorkib <kib@FreeBSD.org>2013-01-27 09:31:11 +0000
committerkib <kib@FreeBSD.org>2013-01-27 09:31:11 +0000
commitf4c4064ce883a321c46b934e0a3378d8a446df06 (patch)
treede7404fc18d2d92c61c99bb8b9334fba0cc6fd9d /sys
parentd68a3343d31b1149ae1176d0f0b5f8c92408461a (diff)
downloadFreeBSD-src-f4c4064ce883a321c46b934e0a3378d8a446df06.zip
FreeBSD-src-f4c4064ce883a321c46b934e0a3378d8a446df06.tar.gz
Fix reversed condition in the logic to wait for the chipset buffers
flush wait on the Gen2 chipsets. Confirmed by the inspection of the Linux agp code. Submitted by: Taku YAMAMOTO <taku@tackymt.homeip.net> MFC after: 2 weeks
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/agp/agp_i810.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/dev/agp/agp_i810.c b/sys/dev/agp/agp_i810.c
index 21c7ce6..9ec3992 100644
--- a/sys/dev/agp/agp_i810.c
+++ b/sys/dev/agp/agp_i810.c
@@ -2228,7 +2228,7 @@ agp_i830_chipset_flush(device_t dev)
bus_write_4(sc->sc_res[0], AGP_I830_HIC, hic | (1 << 31));
for (i = 0; i < 20000 /* 1 sec */; i++) {
hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
- if ((hic & (1 << 31)) != 0)
+ if ((hic & (1 << 31)) == 0)
break;
DELAY(50);
}
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