o) Make pcb_onfault a pointer rather than an obscure integer value.

o) Mask off PAGE_MASK bits in pmap_update_page, etc., rather than modifying the
   badvaddr in trapframe.  Some nearby interfaces already did this.
o) Make PTEs "unsigned int" for now, not "unsigned long" -- we are only ready
   for them to be 32-bit on 64-bit platforms.
o) Rather than using pmap_segmap and calculating the offset into the page table
   by hand in trap.c, use pmap_pte().
o) Remove unused quad_syscall variable in trap.c.
o) Log things for illegal instructions like we do for bad page faults.
o) Various cast cleanups related to how to print registers.
o) When logging page faults, show the page table information not just for the
   program counter, but for the fault address.
o) Modify support.S to use ABI-neutral macros for operating on pointers.
o) Consistently use CALLFRAME_SIZ rather than STAND_FRAME_SIZE, etc.
o) Remove unused insque/remque functions.
o) Remove some coprocessor 0 accessor functions implemented in assembly that
   are unused and have inline assembly counterparts.

7 files changed, 459 insertions, 548 deletions

diff --git a/sys/mips/include/cpu.h b/sys/mips/include/cpu.h
index 5c5e5e5..83b6a85 100644
--- a/sys/mips/include/cpu.h
+++ b/sys/mips/include/cpu.h
@@ -458,13 +458,9 @@ extern union cpuprid fpu_id;
 struct tlb;
 struct user;
 
-u_int32_t mips_cp0_config1_read(void);
 int Mips_ConfigCache(void);
 void Mips_SetWIRED(int);
 void Mips_SetPID(int);
-u_int Mips_GetCOUNT(void);
-void Mips_SetCOMPARE(u_int);
-u_int Mips_GetCOMPARE(void);
 
 void Mips_SyncCache(void);
 void Mips_SyncDCache(vm_offset_t, int);
diff --git a/sys/mips/include/pcb.h b/sys/mips/include/pcb.h
index f95ef4d..e0982e3 100644
--- a/sys/mips/include/pcb.h
+++ b/sys/mips/include/pcb.h
@@ -51,7 +51,7 @@ struct pcb
 {
 	struct trapframe pcb_regs;	/* saved CPU and registers */
 	__register_t pcb_context[14];	/* kernel context for resume */
-	int	pcb_onfault;		/* for copyin/copyout faults */
+	void *pcb_onfault;		/* for copyin/copyout faults */
 	register_t pcb_tpc;
 };
 
diff --git a/sys/mips/include/pte.h b/sys/mips/include/pte.h
index 31b0844..e3b46ca 100644
--- a/sys/mips/include/pte.h
+++ b/sys/mips/include/pte.h
@@ -83,7 +83,7 @@ struct tlb {
 	int	tlb_lo1;
 };
 
-typedef unsigned long pt_entry_t;
+typedef unsigned int pt_entry_t;
 typedef pt_entry_t *pd_entry_t;
 
 #define	PDESIZE		sizeof(pd_entry_t)	/* for assembly files */
diff --git a/sys/mips/mips/pmap.c b/sys/mips/mips/pmap.c
index 80418a7..6bb38d4 100644
--- a/sys/mips/mips/pmap.c
+++ b/sys/mips/mips/pmap.c
@@ -660,7 +660,7 @@ pmap_update_page_action(void *arg)
 		pmap->pm_asid[PCPU_GET(cpuid)].gen = 0;
 		return;
 	}
-	va = pmap_va_asid(pmap, va);
+	va = pmap_va_asid(pmap, (va & ~PAGE_MASK));
 	MachTLBUpdate(va, pte);
 }
 
@@ -669,6 +669,8 @@ pmap_TLB_update_kernel(vm_offset_t va, pt_entry_t pte)
 {
 	u_int32_t pid;
 
+	va &= ~PAGE_MASK;
+
 	MachTLBGetPID(pid);
 	va = va | (pid << VMTLB_PID_SHIFT);
 
@@ -1885,7 +1887,7 @@ validate:
 			if (origpte & PTE_M) {
 				KASSERT((origpte & PTE_RW),
 				    ("pmap_enter: modified page not writable:"
-				    " va: %p, pte: 0x%lx", (void *)va, origpte));
+				    " va: %p, pte: 0x%x", (void *)va, origpte));
 				if (page_is_managed(opa))
 					vm_page_dirty(om);
 			}
@@ -2381,7 +2383,7 @@ pmap_remove_pages(pmap_t pmap)
 		m = PHYS_TO_VM_PAGE(mips_tlbpfn_to_paddr(tpte));
 
 		KASSERT(m < &vm_page_array[vm_page_array_size],
-		    ("pmap_remove_pages: bad tpte %lx", tpte));
+		    ("pmap_remove_pages: bad tpte %x", tpte));
 
 		pv->pv_pmap->pm_stats.resident_count--;
 
diff --git a/sys/mips/mips/support.S b/sys/mips/mips/support.S
index d0a06b6..9cbc998 100644
--- a/sys/mips/mips/support.S
+++ b/sys/mips/mips/support.S
@@ -103,47 +103,22 @@
  * Primitives
  */
 
-/*
- * This table is indexed by u.u_pcb.pcb_onfault in trap().
- * The reason for using this table rather than storing an address in
- * u.u_pcb.pcb_onfault is simply to make the code faster.
- */
-	.globl	onfault_table
-	.data
-	.align	3
-onfault_table:
-	.word	0			# invalid index number
-#define	BADERR		1
-	.word	baderr
-#define	COPYERR		2
-	.word	copyerr
-#define	FSWBERR		3
-	.word	fswberr
-#define	FSWINTRBERR	4
-	.word	fswintrberr
-#if defined(DDB) || defined(DEBUG)
-#define	DDBERR	5
-	.word	ddberr
-#else
-	.word	0
-#endif
-
 	.text
 
 /*
  * See if access to addr with a len type instruction causes a machine check.
- * len is length of access (1=byte, 2=short, 4=long)
+ * len is length of access (1=byte, 2=short, 4=int)
  *
  * badaddr(addr, len)
  *	char *addr;
  *	int len;
  */
 LEAF(badaddr)
-	li	v0, BADERR
+	PTR_LA	v0, baderr
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
+	PTR_L	v1, PC_CURPCB(v1)
 	bne	a1, 1, 2f
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	b	5f
 	lbu	v0, (a0)
 2:
@@ -154,7 +129,7 @@ LEAF(badaddr)
 4:
 	lw	v0, (a0)
 5:
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	ra
 	move	v0, zero		# made it w/o errors
 baderr:
@@ -169,24 +144,24 @@ END(badaddr)
  * string is too long, return ENAMETOOLONG; else return 0.
  */
 LEAF(copystr)
-	move	t0, a2
-	beq	a2, zero, 4f
+	move		t0, a2
+	beq		a2, zero, 4f
 1:
-	lbu	v0, 0(a0)
-	subu	a2, a2, 1
-	beq	v0, zero, 2f
-	sb	v0, 0(a1)		# each byte until NIL
-	addu	a0, a0, 1
-	bne	a2, zero, 1b		# less than maxlen
-	addu	a1, a1, 1
+	lbu		v0, 0(a0)
+	PTR_SUBU	a2, a2, 1
+	beq		v0, zero, 2f
+	sb		v0, 0(a1)		# each byte until NIL
+	PTR_ADDU	a0, a0, 1
+	bne		a2, zero, 1b		# less than maxlen
+	PTR_ADDU	a1, a1, 1
 4:
-	li	v0, ENAMETOOLONG	# run out of space
+	li		v0, ENAMETOOLONG	# run out of space
 2:
-	beq	a3, zero, 3f		# return num. of copied bytes
-	subu	a2, t0, a2		# if the 4th arg was non-NULL
-	sw	a2, 0(a3)
+	beq		a3, zero, 3f		# return num. of copied bytes
+	PTR_SUBU	a2, t0, a2		# if the 4th arg was non-NULL
+	PTR_S		a2, 0(a3)
 3:
-	j	ra			# v0 is 0 or ENAMETOOLONG
+	j		ra			# v0 is 0 or ENAMETOOLONG
 	nop
 END(copystr)
 
@@ -196,12 +171,12 @@ END(copystr)
  */
 LEAF(fillw)
 1:
-	addiu	a2, a2, -1
-	sh	a0, 0(a1)
-	bne	a2,zero, 1b
-	addiu	a1, a1, 2
+	PTR_ADDU	a2, a2, -1
+	sh		a0, 0(a1)
+	bne		a2,zero, 1b
+	PTR_ADDU	a1, a1, 2
 
-	jr	ra
+	jr		ra
 	nop
 END(fillw)
 
@@ -210,13 +185,13 @@ END(fillw)
  * mem_zero_page(addr);
  */
 LEAF(mem_zero_page)
-	li	v0, PAGE_SIZE
+	li		v0, PAGE_SIZE
 1:
-	subu	v0, 8
-	sd	zero, 0(a0)
-	bne	zero, v0, 1b
-	addu	a0, 8
-	jr	ra
+	PTR_SUBU	v0, 8
+	sd		zero, 0(a0)
+	bne		zero, v0, 1b
+	PTR_ADDU	a0, 8
+	jr		ra
 	nop
 END(mem_zero_page)
 
@@ -228,56 +203,56 @@ END(mem_zero_page)
  *			a2 = count
  */
 LEAF(insb)
-	beq	a2, zero, 2f
-	addu	a2, a1
+	beq		a2, zero, 2f
+	PTR_ADDU	a2, a1
 1:
-	lbu	v0, 0(a0)
-	addiu	a1, 1
-	bne	a1, a2, 1b
-	sb	v0, -1(a1)
+	lbu		v0, 0(a0)
+	PTR_ADDU	a1, 1
+	bne		a1, a2, 1b
+	sb		v0, -1(a1)
 2:
-	jr	ra
+	jr		ra
 	nop
 END(insb)
 
 LEAF(insw)
-	beq	a2, zero, 2f
-	addu	a2, a2
-	addu	a2, a1
+	beq		a2, zero, 2f
+	PTR_ADDU	a2, a2
+	PTR_ADDU	a2, a1
 1:
-	lhu	v0, 0(a0)
-	addiu	a1, 2
-	bne	a1, a2, 1b
-	sh	v0, -2(a1)
+	lhu		v0, 0(a0)
+	PTR_ADDU	a1, 2
+	bne		a1, a2, 1b
+	sh		v0, -2(a1)
 2:
-	jr	ra
+	jr		ra
 	nop
 END(insw)
 
 LEAF(insl)
-	beq	a2, zero, 2f
-	sll	a2, 2
-	addu	a2, a1
+	beq		a2, zero, 2f
+	sll		a2, 2
+	PTR_ADDU	a2, a1
 1:
-	lw	v0, 0(a0)
-	addiu	a1, 4
-	bne	a1, a2, 1b
-	sw	v0, -4(a1)
+	lw		v0, 0(a0)
+	PTR_ADDU	a1, 4
+	bne		a1, a2, 1b
+	sw		v0, -4(a1)
 2:
-	jr	ra
+	jr		ra
 	nop
 END(insl)
 
 LEAF(outsb)
-	beq	a2, zero, 2f
-	addu	a2, a1
+	beq		a2, zero, 2f
+	PTR_ADDU	a2, a1
 1:
-	lbu	v0, 0(a1)
-	addiu	a1, 1
-	bne	a1, a2, 1b
-	sb	v0, 0(a0)
+	lbu		v0, 0(a1)
+	PTR_ADDU	a1, 1
+	bne		a1, a2, 1b
+	sb		v0, 0(a0)
 2:
-	jr	ra
+	jr		ra
 	nop
 END(outsb)
 
@@ -343,22 +318,22 @@ END(outsl)
  *		u_int maxlength;
  *		u_int *lencopied;
  */
-NON_LEAF(copyinstr, STAND_FRAME_SIZE, ra)
-	subu	sp, sp, STAND_FRAME_SIZE
-	.mask	0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
-	sw	ra, STAND_RA_OFFSET(sp)
+NON_LEAF(copyinstr, CALLFRAME_SIZ, ra)
+	PTR_SUBU	sp, sp, CALLFRAME_SIZ
+	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
+	PTR_LA	v0, copyerr
 	blt	a0, zero, _C_LABEL(copyerr)  # make sure address is in user space
-	li	v0, COPYERR
+	REG_S	ra, CALLFRAME_RA(sp)
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
+	PTR_L	v1, PC_CURPCB(v1)
 	jal	_C_LABEL(copystr)
-	sw	v0, U_PCB_ONFAULT(v1)
-	lw	ra, STAND_RA_OFFSET(sp)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
+	REG_L	ra, CALLFRAME_RA(sp)
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	ra
-	addu	sp, sp, STAND_FRAME_SIZE
+	PTR_ADDU	sp, sp, CALLFRAME_SIZ
 END(copyinstr)
 
 /*
@@ -371,22 +346,22 @@ END(copyinstr)
  *		u_int maxlength;
  *		u_int *lencopied;
  */
-NON_LEAF(copyoutstr, STAND_FRAME_SIZE, ra)
-	subu	sp, sp, STAND_FRAME_SIZE
-	.mask	0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
-	sw	ra, STAND_RA_OFFSET(sp)
+NON_LEAF(copyoutstr, CALLFRAME_SIZ, ra)
+	PTR_SUBU	sp, sp, CALLFRAME_SIZ
+	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
+	PTR_LA	v0, copyerr
 	blt	a1, zero, _C_LABEL(copyerr)  # make sure address is in user space
-	li	v0, COPYERR
+	REG_S	ra, CALLFRAME_RA(sp)
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
+	PTR_L	v1, PC_CURPCB(v1)
 	jal	_C_LABEL(copystr)
-	sw	v0, U_PCB_ONFAULT(v1)
-	lw	ra, STAND_RA_OFFSET(sp)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
+	REG_L	ra, CALLFRAME_RA(sp)
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	ra
-	addu	sp, sp, STAND_FRAME_SIZE
+	PTR_ADDU	sp, sp, CALLFRAME_SIZ
 END(copyoutstr)
 
 /*
@@ -396,21 +371,21 @@ END(copyoutstr)
  *		caddr_t *to;	(kernel destination address)
  *		unsigned len;
  */
-NON_LEAF(copyin, STAND_FRAME_SIZE, ra)
-	subu	sp, sp, STAND_FRAME_SIZE
-	.mask	0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
-	sw	ra, STAND_RA_OFFSET(sp)
+NON_LEAF(copyin, CALLFRAME_SIZ, ra)
+	PTR_SUBU	sp, sp, CALLFRAME_SIZ
+	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
+	PTR_LA	v0, copyerr
 	blt	a0, zero, _C_LABEL(copyerr)  # make sure address is in user space
-	li	v0, COPYERR
+	REG_S	ra, CALLFRAME_RA(sp)
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
+	PTR_L	v1, PC_CURPCB(v1)
 	jal	_C_LABEL(bcopy)
-	sw	v0, U_PCB_ONFAULT(v1)
-	lw	ra, STAND_RA_OFFSET(sp)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
+	REG_L	ra, CALLFRAME_RA(sp)
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)	 	# bcopy modified v1, so reload
-	sw	zero, U_PCB_ONFAULT(v1)
-	addu	sp, sp, STAND_FRAME_SIZE
+	PTR_L	v1, PC_CURPCB(v1)	 	# bcopy modified v1, so reload
+	PTR_S	zero, U_PCB_ONFAULT(v1)
+	PTR_ADDU	sp, sp, CALLFRAME_SIZ
 	j	ra
 	move	v0, zero
 END(copyin)
@@ -422,31 +397,28 @@ END(copyin)
  *		caddr_t *to;	(user destination address)
  *		unsigned len;
  */
-NON_LEAF(copyout, STAND_FRAME_SIZE, ra)
-	subu	sp, sp, STAND_FRAME_SIZE
-	.mask	0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE)
-	sw	ra, STAND_RA_OFFSET(sp)
+NON_LEAF(copyout, CALLFRAME_SIZ, ra)
+	PTR_SUBU	sp, sp, CALLFRAME_SIZ
+	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
+	PTR_LA	v0, copyerr
 	blt	a1, zero, _C_LABEL(copyerr) # make sure address is in user space
-	li	v0, COPYERR
+	REG_S	ra, CALLFRAME_RA(sp)
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
+	PTR_L	v1, PC_CURPCB(v1)
 	jal	_C_LABEL(bcopy)
-	sw	v0, U_PCB_ONFAULT(v1)
-	lw	ra, STAND_RA_OFFSET(sp)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
+	REG_L	ra, CALLFRAME_RA(sp)
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)		# bcopy modified v1, so reload
-	sw	zero, U_PCB_ONFAULT(v1)
-	addu	sp, sp, STAND_FRAME_SIZE
+	PTR_L	v1, PC_CURPCB(v1)	 	# bcopy modified v1, so reload
+	PTR_S	zero, U_PCB_ONFAULT(v1)
+	PTR_ADDU	sp, sp, CALLFRAME_SIZ
 	j	ra
 	move	v0, zero
 END(copyout)
 
 LEAF(copyerr)
-	lw	ra, STAND_RA_OFFSET(sp)
-	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	zero, U_PCB_ONFAULT(v1)
-	addu	sp, sp, STAND_FRAME_SIZE
+	REG_L	ra, CALLFRAME_RA(sp)
+	PTR_ADDU	sp, sp, CALLFRAME_SIZ
 	j	ra
 	li	v0, EFAULT			# return error
 END(copyerr)
@@ -460,51 +432,55 @@ END(copyerr)
 LEAF(fuword)
 ALEAF(fuword32)
 ALEAF(fuiword)
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	lw	v0, 0(a0)		# fetch word
 	j	ra
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 END(fuword)
 
 LEAF(fusword)
 ALEAF(fuisword)
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	lhu	v0, 0(a0)		# fetch short
 	j	ra
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 END(fusword)
 
 LEAF(fubyte)
 ALEAF(fuibyte)
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	lbu	v0, 0(a0)		# fetch byte
 	j	ra
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 END(fubyte)
 
 LEAF(suword32)
 #ifndef __mips_n64
 XLEAF(suword)
 #endif
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	sw	a1, 0(a0)		# store word
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	ra
 	move	v0, zero
 END(suword32)
@@ -512,13 +488,14 @@ END(suword32)
 #ifdef __mips_n64
 LEAF(suword64)
 XLEAF(suword)
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	sd	a1, 0(a0)		# store word
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	ra
 	move	v0, zero
 END(suword64)
@@ -537,11 +514,12 @@ LEAF(casuword32)
 #ifndef __mips_n64
 XLEAF(casuword)
 #endif
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 1:
 	move	t0, a2
 	ll	v0, 0(a0)
@@ -555,7 +533,7 @@ XLEAF(casuword)
 2:
 	li	v0, -1
 3:
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	jr	ra
 	nop
 END(casuword32)
@@ -563,11 +541,12 @@ END(casuword32)
 #ifdef __mips_n64
 LEAF(casuword64)
 XLEAF(casuword)
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 1:
 	move	t0, a2
 	lld	v0, 0(a0)
@@ -581,7 +560,7 @@ XLEAF(casuword)
 2:
 	li	v0, -1
 3:
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	jr	ra
 	nop
 END(casuword64)
@@ -593,13 +572,14 @@ END(casuword64)
  * Have to flush instruction cache afterwards.
  */
 LEAF(suiword)
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	sw	a1, 0(a0)		# store word
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	_C_LABEL(Mips_SyncICache)  # FlushICache sets v0 = 0. (Ugly)
 	li	a1, 4			# size of word
 END(suiword)
@@ -610,26 +590,28 @@ END(suiword)
  */
 LEAF(susword)
 ALEAF(suisword)
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	sh	a1, 0(a0)		# store short
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	ra
 	move	v0, zero
 END(susword)
 
 LEAF(subyte)
 ALEAF(suibyte)
+	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
-	li	v0, FSWBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	sb	a1, 0(a0)		# store byte
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	ra
 	move	v0, zero
 END(subyte)
@@ -645,24 +627,26 @@ END(fswberr)
  * The important thing is to prevent sleep() and switch().
  */
 LEAF(fuswintr)
+	PTR_LA	v0, fswintrberr
 	blt	a0, zero, fswintrberr	# make sure address is in user space
-	li	v0, FSWINTRBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	lhu	v0, 0(a0)		# fetch short
 	j	ra
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 END(fuswintr)
 
 LEAF(suswintr)
+	PTR_LA	v0, fswintrberr
 	blt	a0, zero, fswintrberr	# make sure address is in user space
-	li	v0, FSWINTRBERR
+	nop
 	GET_CPU_PCPU(v1)
-	lw	v1, PC_CURPCB(v1)
-	sw	v0, U_PCB_ONFAULT(v1)
+	PTR_L	v1, PC_CURPCB(v1)
+	PTR_S	v0, U_PCB_ONFAULT(v1)
 	sh	a1, 0(a0)		# store short
-	sw	zero, U_PCB_ONFAULT(v1)
+	PTR_S	zero, U_PCB_ONFAULT(v1)
 	j	ra
 	move	v0, zero
 END(suswintr)
@@ -673,111 +657,6 @@ LEAF(fswintrberr)
 END(fswintrberr)
 
 /*
- * Insert 'p' after 'q'.
- *	_insque(p, q)
- *		caddr_t p, q;
- */
-LEAF(_insque)
-	lw	v0, 0(a1)		# v0 = q->next
-	sw	a1, 4(a0)		# p->prev = q
-	sw	v0, 0(a0)		# p->next = q->next
-	sw	a0, 4(v0)		# q->next->prev = p
-	j	ra
-	sw	a0, 0(a1)		# q->next = p
-END(_insque)
-
-/*
- * Remove item 'p' from queue.
- *	_remque(p)
- *		caddr_t p;
- */
-LEAF(_remque)
-	lw	v0, 0(a0)		# v0 = p->next
-	lw	v1, 4(a0)		# v1 = p->prev
-	nop
-	sw	v0, 0(v1)		# p->prev->next = p->next
-	j	ra
-	sw	v1, 4(v0)		# p->next->prev = p->prev
-END(_remque)
-
-/*--------------------------------------------------------------------------
- *
- * Mips_GetCOUNT --
- *
- *	Mips_GetCOUNT()
- *
- * Results:
- *	Returns the current COUNT reg.
- *
- * Side effects:
- *	None.
- *
- *--------------------------------------------------------------------------
- */
-LEAF(Mips_GetCOUNT)
-	mfc0	v0, COP_0_COUNT
-	nop	#???
-	nop	#???
-	j	ra
-	nop
-END(Mips_GetCOUNT)
-
-/*--------------------------------------------------------------------------
- *
- * Mips_SetCOMPARE --
- *
- *	Mips_SetCOMPARE()
- *
- * Results:
- *	Sets a new value to the COMPARE register.
- *
- * Side effects:
- *	The COMPARE equal interrupt is acknowledged.
- *
- *--------------------------------------------------------------------------
- */
-LEAF(Mips_SetCOMPARE)
-	mtc0	a0, COP_0_COMPARE
-	j	ra
-	nop
-END(Mips_SetCOMPARE)
-
-LEAF(Mips_GetCOMPARE)
-	mfc0	v0, COP_0_COMPARE
-	j	ra
-	nop
-END(Mips_GetCOMPARE)
-
-/*
- * u_int32_t mips_cp0_status_read(void)
- *
- *	Return the current value of the CP0 Status register.
- */
-LEAF(mips_cp0_status_read)
-	mfc0	v0, COP_0_STATUS_REG
-	j	ra
-	nop
-END(mips_cp0_status_read)
-
-/*
- * void mips_cp0_status_write(u_int32_t)
- *
- *	Set the value of the CP0 Status register.
- *
- *	Note: This is almost certainly not the way you want to write a
- *	"permanent" value to to the CP0 Status register, since it gets
- *	saved in trap frames and restores.
- */
-LEAF(mips_cp0_status_write)
-	mtc0	a0, COP_0_STATUS_REG
-	nop
-	nop
-	j	ra
-	nop
-END(mips_cp0_status_write)
-
-
-/*
  * memcpy(to, from, len)
  * {ov}bcopy(from, to, len)
  */
@@ -789,7 +668,7 @@ LEAF(memcpy)
 ALEAF(bcopy)
 ALEAF(ovbcopy)
 	.set	noreorder
-	addu	t0, a0, a2		# t0 = end of s1 region
+	PTR_ADDU	t0, a0, a2		# t0 = end of s1 region
 	sltu	t1, a1, t0
 	sltu	t2, a0, a1
 	and	t1, t1, t2		# t1 = true if from < to < (from+len)
@@ -797,11 +676,11 @@ ALEAF(ovbcopy)
 	slt	t2, a2, 12		# check for small copy
 
 	ble	a2, zero, 2f
-	addu	t1, a1, a2		# t1 = end of to region
+	PTR_ADDU	t1, a1, a2		# t1 = end of to region
 1:
 	lb	v1, -1(t0)		# copy bytes backwards,
-	subu	t0, t0, 1		#   doesnt happen often so do slow way
-	subu	t1, t1, 1
+	PTR_SUBU	t0, t0, 1		#   doesnt happen often so do slow way
+	PTR_SUBU	t1, t1, 1
 	bne	t0, a0, 1b
 	sb	v1, 0(t1)
 2:
@@ -811,59 +690,59 @@ forward:
 	bne	t2, zero, smallcpy	# do a small bcopy
 	xor	v1, a0, a1		# compare low two bits of addresses
 	and	v1, v1, 3
-	subu	a3, zero, a1		# compute # bytes to word align address
+	PTR_SUBU	a3, zero, a1		# compute # bytes to word align address
 	beq	v1, zero, aligned	# addresses can be word aligned
 	and	a3, a3, 3
 
 	beq	a3, zero, 1f
-	subu	a2, a2, a3		# subtract from remaining count
+	PTR_SUBU	a2, a2, a3		# subtract from remaining count
 	LWHI	v1, 0(a0)		# get next 4 bytes (unaligned)
 	LWLO	v1, 3(a0)
-	addu	a0, a0, a3
+	PTR_ADDU	a0, a0, a3
 	SWHI	v1, 0(a1)		# store 1, 2, or 3 bytes to align a1
-	addu	a1, a1, a3
+	PTR_ADDU	a1, a1, a3
 1:
 	and	v1, a2, 3		# compute number of words left
-	subu	a3, a2, v1
+	PTR_SUBU	a3, a2, v1
 	move	a2, v1
-	addu	a3, a3, a0		# compute ending address
+	PTR_ADDU	a3, a3, a0		# compute ending address
 2:
 	LWHI	v1, 0(a0)		# copy words a0 unaligned, a1 aligned
 	LWLO	v1, 3(a0)
-	addu	a0, a0, 4
+	PTR_ADDU	a0, a0, 4
 	sw	v1, 0(a1)
-	addu	a1, a1, 4
+	PTR_ADDU	a1, a1, 4
 	bne	a0, a3, 2b
 	nop				# We have to do this mmu-bug.
 	b	smallcpy
 	nop
 aligned:
 	beq	a3, zero, 1f
-	subu	a2, a2, a3		# subtract from remaining count
+	PTR_SUBU	a2, a2, a3		# subtract from remaining count
 	LWHI	v1, 0(a0)		# copy 1, 2, or 3 bytes to align
-	addu	a0, a0, a3
+	PTR_ADDU	a0, a0, a3
 	SWHI	v1, 0(a1)
-	addu	a1, a1, a3
+	PTR_ADDU	a1, a1, a3
 1:
 	and	v1, a2, 3		# compute number of whole words left
-	subu	a3, a2, v1
+	PTR_SUBU	a3, a2, v1
 	move	a2, v1
-	addu	a3, a3, a0		# compute ending address
+	PTR_ADDU	a3, a3, a0		# compute ending address
 2:
 	lw	v1, 0(a0)		# copy words
-	addu	a0, a0, 4
+	PTR_ADDU	a0, a0, 4
 	sw	v1, 0(a1)
 	bne	a0, a3, 2b
-	addu	a1, a1, 4
+	PTR_ADDU	a1, a1, 4
 smallcpy:
 	ble	a2, zero, 2f
-	addu	a3, a2, a0		# compute ending address
+	PTR_ADDU	a3, a2, a0		# compute ending address
 1:
 	lbu	v1, 0(a0)		# copy bytes
-	addu	a0, a0, 1
+	PTR_ADDU	a0, a0, 1
 	sb	v1, 0(a1)
 	bne	a0, a3, 1b
-	addu	a1, a1, 1	   # MMU BUG ? can not do -1(a1) at 0x80000000!!
+	PTR_ADDU	a1, a1, 1	   # MMU BUG ? can not do -1(a1) at 0x80000000!!
 2:
 	j	ra
 	nop
@@ -883,19 +762,19 @@ LEAF(memset)
 	sll	t2, t1, 16		# shift that left 16
 	or	t1, t2, t1		# or together
 
-	subu	t0, zero, a0		# compute # bytes to word align address
+	PTR_SUBU	t0, zero, a0		# compute # bytes to word align address
 	and	t0, t0, 3
 	beq	t0, zero, 1f		# skip if word aligned
-	subu	a2, a2, t0		# subtract from remaining count
+	PTR_SUBU	a2, a2, t0		# subtract from remaining count
 	SWHI	t1, 0(a0)		# store 1, 2, or 3 bytes to align
-	addu	a0, a0, t0
+	PTR_ADDU	a0, a0, t0
 1:
 	and	v1, a2, 3		# compute number of whole words left
-	subu	t0, a2, v1
-	subu	a2, a2, t0
-	addu	t0, t0, a0		# compute ending address
+	PTR_SUBU	t0, a2, v1
+	PTR_SUBU	a2, a2, t0
+	PTR_ADDU	t0, t0, a0		# compute ending address
 2:
-	addu	a0, a0, 4		# clear words
+	PTR_ADDU	a0, a0, 4		# clear words
 #ifdef MIPS3_5900
 	nop
 	nop
@@ -907,9 +786,9 @@ LEAF(memset)
 
 memsetsmallclr:
 	ble	a2, zero, 2f
-	addu	t0, a2, a0		# compute ending address
+	PTR_ADDU	t0, a2, a0		# compute ending address
 1:
-	addu	a0, a0, 1		# clear bytes
+	PTR_ADDU	a0, a0, 1		# clear bytes
 #ifdef MIPS3_5900
 	nop
 	nop
@@ -931,26 +810,26 @@ LEAF(bzero)
 ALEAF(blkclr)
 	.set	noreorder
 	blt	a1, 12, smallclr	# small amount to clear?
-	subu	a3, zero, a0		# compute # bytes to word align address
+	PTR_SUBU	a3, zero, a0		# compute # bytes to word align address
 	and	a3, a3, 3
 	beq	a3, zero, 1f		# skip if word aligned
-	subu	a1, a1, a3		# subtract from remaining count
+	PTR_SUBU	a1, a1, a3		# subtract from remaining count
 	SWHI	zero, 0(a0)		# clear 1, 2, or 3 bytes to align
-	addu	a0, a0, a3
+	PTR_ADDU	a0, a0, a3
 1:
 	and	v0, a1, 3		# compute number of words left
-	subu	a3, a1, v0
+	PTR_SUBU	a3, a1, v0
 	move	a1, v0
-	addu	a3, a3, a0		# compute ending address
+	PTR_ADDU	a3, a3, a0		# compute ending address
 2:
-	addu	a0, a0, 4		# clear words
+	PTR_ADDU	a0, a0, 4		# clear words
 	bne	a0, a3, 2b		#  unrolling loop does not help
 	sw	zero, -4(a0)		#  since we are limited by memory speed
 smallclr:
 	ble	a1, zero, 2f
-	addu	a3, a1, a0		# compute ending address
+	PTR_ADDU	a3, a1, a0		# compute ending address
 1:
-	addu	a0, a0, 1		# clear bytes
+	PTR_ADDU	a0, a0, 1		# clear bytes
 	bne	a0, a3, 1b
 	sb	zero, -1(a0)
 2:
@@ -967,66 +846,66 @@ LEAF(bcmp)
 	blt	a2, 16, smallcmp	# is it worth any trouble?
 	xor	v0, a0, a1		# compare low two bits of addresses
 	and	v0, v0, 3
-	subu	a3, zero, a1		# compute # bytes to word align address
+	PTR_SUBU	a3, zero, a1		# compute # bytes to word align address
 	bne	v0, zero, unalignedcmp	# not possible to align addresses
 	and	a3, a3, 3
 
 	beq	a3, zero, 1f
-	subu	a2, a2, a3		# subtract from remaining count
+	PTR_SUBU	a2, a2, a3		# subtract from remaining count
 	move	v0, v1			# init v0,v1 so unmodified bytes match
 	LWHI	v0, 0(a0)		# read 1, 2, or 3 bytes
 	LWHI	v1, 0(a1)
-	addu	a1, a1, a3
+	PTR_ADDU	a1, a1, a3
 	bne	v0, v1, nomatch
-	addu	a0, a0, a3
+	PTR_ADDU	a0, a0, a3
 1:
 	and	a3, a2, ~3		# compute number of whole words left
-	subu	a2, a2, a3		#   which has to be >= (16-3) & ~3
-	addu	a3, a3, a0		# compute ending address
+	PTR_SUBU	a2, a2, a3		#   which has to be >= (16-3) & ~3
+	PTR_ADDU	a3, a3, a0		# compute ending address
 2:
 	lw	v0, 0(a0)		# compare words
 	lw	v1, 0(a1)
-	addu	a0, a0, 4
+	PTR_ADDU	a0, a0, 4
 	bne	v0, v1, nomatch
-	addu	a1, a1, 4
+	PTR_ADDU	a1, a1, 4
 	bne	a0, a3, 2b
 	nop
 	b	smallcmp		# finish remainder
 	nop
 unalignedcmp:
 	beq	a3, zero, 2f
-	subu	a2, a2, a3		# subtract from remaining count
-	addu	a3, a3, a0		# compute ending address
+	PTR_SUBU	a2, a2, a3		# subtract from remaining count
+	PTR_ADDU	a3, a3, a0		# compute ending address
 1:
 	lbu	v0, 0(a0)		# compare bytes until a1 word aligned
 	lbu	v1, 0(a1)
-	addu	a0, a0, 1
+	PTR_ADDU	a0, a0, 1
 	bne	v0, v1, nomatch
-	addu	a1, a1, 1
+	PTR_ADDU	a1, a1, 1
 	bne	a0, a3, 1b
 	nop
 2:
 	and	a3, a2, ~3		# compute number of whole words left
-	subu	a2, a2, a3		#   which has to be >= (16-3) & ~3
-	addu	a3, a3, a0		# compute ending address
+	PTR_SUBU	a2, a2, a3		#   which has to be >= (16-3) & ~3
+	PTR_ADDU	a3, a3, a0		# compute ending address
 3:
 	LWHI	v0, 0(a0)		# compare words a0 unaligned, a1 aligned
 	LWLO	v0, 3(a0)
 	lw	v1, 0(a1)
-	addu	a0, a0, 4
+	PTR_ADDU	a0, a0, 4
 	bne	v0, v1, nomatch
-	addu	a1, a1, 4
+	PTR_ADDU	a1, a1, 4
 	bne	a0, a3, 3b
 	nop
 smallcmp:
 	ble	a2, zero, match
-	addu	a3, a2, a0		# compute ending address
+	PTR_ADDU	a3, a2, a0		# compute ending address
 1:
 	lbu	v0, 0(a0)
 	lbu	v1, 0(a1)
-	addu	a0, a0, 1
+	PTR_ADDU	a0, a0, 1
 	bne	v0, v1, nomatch
-	addu	a1, a1, 1
+	PTR_ADDU	a1, a1, 1
 	bne	a0, a3, 1b
 	nop
 match:
@@ -1367,9 +1246,6 @@ END(atomic_subtract_8)
  */
 
 	.set	noreorder		# Noreorder is default style!
-#ifndef _MIPS_ARCH_XLR
-	.set	mips3
-#endif
 
 #if !defined(__mips_n64) && !defined(__mips_n32)	
 	/*
@@ -1426,22 +1302,22 @@ END(atomic_load_64)
 #if defined(DDB) || defined(DEBUG)
 
 LEAF(kdbpeek)
-	li	v1, DDBERR
+	PTR_LA	v1, ddberr
 	and	v0, a0, 3			# unaligned ?
 	GET_CPU_PCPU(t1)
-	lw	t1, PC_CURPCB(t1)
+	PTR_L	t1, PC_CURPCB(t1)
 	bne	v0, zero, 1f
-	sw	v1, U_PCB_ONFAULT(t1)
+	PTR_S	v1, U_PCB_ONFAULT(t1)
 
 	lw	v0, (a0)
 	jr	ra
-	sw	zero, U_PCB_ONFAULT(t1)
+	PTR_S	zero, U_PCB_ONFAULT(t1)
 
 1:
 	LWHI	v0, 0(a0)
 	LWLO	v0, 3(a0)
 	jr	ra
-	sw	zero, U_PCB_ONFAULT(t1)
+	PTR_S	zero, U_PCB_ONFAULT(t1)
 END(kdbpeek)
 
 ddberr:
@@ -1450,44 +1326,31 @@ ddberr:
 
 #if defined(DDB)
 LEAF(kdbpoke)
-	li	v1, DDBERR
+	PTR_LA	v1, ddberr
 	and	v0, a0, 3			# unaligned ?
 	GET_CPU_PCPU(t1)
-	lw	t1, PC_CURPCB(t1)
+	PTR_L	t1, PC_CURPCB(t1)
 	bne	v0, zero, 1f
-	sw	v1, U_PCB_ONFAULT(t1)
+	PTR_S	v1, U_PCB_ONFAULT(t1)
 
 	sw	a1, (a0)
 	jr	ra
-	sw	zero, U_PCB_ONFAULT(t1)
+	PTR_S	zero, U_PCB_ONFAULT(t1)
 
 1:
 	SWHI	a1, 0(a0)
 	SWLO	a1, 3(a0)
 	jr	ra
-	sw	zero, U_PCB_ONFAULT(t1)
+	PTR_S	zero, U_PCB_ONFAULT(t1)
 END(kdbpoke)
 
 	.data
 	.globl	esym
 esym:	.word	0
 
-#ifndef _MIPS_ARCH_XLR
-	.set	mips2
-#endif
 #endif /* DDB */
 #endif /* DDB || DEBUG */
 
-#ifndef MIPS_ISAIII
-#define	STORE	sw	/* 32 bit mode regsave instruction */
-#define	LOAD	lw	/* 32 bit mode regload instruction */
-#define	RSIZE	4	/* 32 bit mode register size */
-#else
-#define	STORE	sd	/* 64 bit mode regsave instruction */
-#define	LOAD	ld	/* 64 bit mode regload instruction */
-#define	RSIZE	8	/* 64 bit mode register size */
-#endif
-
 #define	ITLBNOPFIX	nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
 
 	.text
@@ -1499,35 +1362,35 @@ LEAF(breakpoint)
 
 LEAF(setjmp)
 	mfc0	v0, COP_0_STATUS_REG	# Later the "real" spl value!
-	STORE	s0, (RSIZE * PREG_S0)(a0)
-	STORE	s1, (RSIZE * PREG_S1)(a0)
-	STORE	s2, (RSIZE * PREG_S2)(a0)
-	STORE	s3, (RSIZE * PREG_S3)(a0)
-	STORE	s4, (RSIZE * PREG_S4)(a0)
-	STORE	s5, (RSIZE * PREG_S5)(a0)
-	STORE	s6, (RSIZE * PREG_S6)(a0)
-	STORE	s7, (RSIZE * PREG_S7)(a0)
-	STORE	s8, (RSIZE * PREG_S8)(a0)
-	STORE	sp, (RSIZE * PREG_SP)(a0)
-	STORE	ra, (RSIZE * PREG_RA)(a0)
-	STORE	v0, (RSIZE * PREG_SR)(a0)
+	REG_S	s0, (SZREG * PREG_S0)(a0)
+	REG_S	s1, (SZREG * PREG_S1)(a0)
+	REG_S	s2, (SZREG * PREG_S2)(a0)
+	REG_S	s3, (SZREG * PREG_S3)(a0)
+	REG_S	s4, (SZREG * PREG_S4)(a0)
+	REG_S	s5, (SZREG * PREG_S5)(a0)
+	REG_S	s6, (SZREG * PREG_S6)(a0)
+	REG_S	s7, (SZREG * PREG_S7)(a0)
+	REG_S	s8, (SZREG * PREG_S8)(a0)
+	REG_S	sp, (SZREG * PREG_SP)(a0)
+	REG_S	ra, (SZREG * PREG_RA)(a0)
+	REG_S	v0, (SZREG * PREG_SR)(a0)
 	jr	ra
 	li	v0, 0			# setjmp return
 END(setjmp)
 
 LEAF(longjmp)
-	LOAD	v0, (RSIZE * PREG_SR)(a0)
-	LOAD	ra, (RSIZE * PREG_RA)(a0)
-	LOAD	s0, (RSIZE * PREG_S0)(a0)
-	LOAD	s1, (RSIZE * PREG_S1)(a0)
-	LOAD	s2, (RSIZE * PREG_S2)(a0)
-	LOAD	s3, (RSIZE * PREG_S3)(a0)
-	LOAD	s4, (RSIZE * PREG_S4)(a0)
-	LOAD	s5, (RSIZE * PREG_S5)(a0)
-	LOAD	s6, (RSIZE * PREG_S6)(a0)
-	LOAD	s7, (RSIZE * PREG_S7)(a0)
-	LOAD	s8, (RSIZE * PREG_S8)(a0)
-	LOAD	sp, (RSIZE * PREG_SP)(a0)
+	REG_L	v0, (SZREG * PREG_SR)(a0)
+	REG_L	ra, (SZREG * PREG_RA)(a0)
+	REG_L	s0, (SZREG * PREG_S0)(a0)
+	REG_L	s1, (SZREG * PREG_S1)(a0)
+	REG_L	s2, (SZREG * PREG_S2)(a0)
+	REG_L	s3, (SZREG * PREG_S3)(a0)
+	REG_L	s4, (SZREG * PREG_S4)(a0)
+	REG_L	s5, (SZREG * PREG_S5)(a0)
+	REG_L	s6, (SZREG * PREG_S6)(a0)
+	REG_L	s7, (SZREG * PREG_S7)(a0)
+	REG_L	s8, (SZREG * PREG_S8)(a0)
+	REG_L	sp, (SZREG * PREG_SP)(a0)
 	mtc0	v0, COP_0_STATUS_REG	# Later the "real" spl value!
 	ITLBNOPFIX
 	jr	ra
@@ -1538,7 +1401,6 @@ LEAF(fusufault)
 	GET_CPU_PCPU(t0)
 	lw	t0, PC_CURTHREAD(t0)
 	lw	t0, TD_PCB(t0)
-	sw	zero, U_PCB_ONFAULT(t0)
 	li	v0, -1
 	j	ra
 END(fusufault)
@@ -1547,8 +1409,7 @@ END(fusufault)
        a pointer that is in user space.	 It will be used as the basic primitive
        for a kernel supported user space lock implementation. */
 LEAF(casuptr)
-
-	li	t0, VM_MAXUSER_ADDRESS /* verify address validity */
+	PTR_LI	t0, VM_MAXUSER_ADDRESS /* verify address validity */
 	blt	a0, t0, fusufault		/* trap faults */
 	nop
 
@@ -1556,8 +1417,8 @@ LEAF(casuptr)
 	lw	t1, PC_CURTHREAD(t1)
 	lw	t1, TD_PCB(t1)
 
-	lw	t2, fusufault
-	sw	t2, U_PCB_ONFAULT(t1)
+	PTR_LA	t2, fusufault
+	PTR_S	t2, U_PCB_ONFAULT(t1)
 1:
 	ll	v0, 0(a0)		/* try to load the old value */
 	beq	v0, a1, 2f		/* compare */
@@ -1565,7 +1426,7 @@ LEAF(casuptr)
 	sc	t0, 0(a0)		/* write if address still locked */
 	beq	t0, zero, 1b			/* if it failed, spin */
 2:
-	sw	zero, U_PCB_ONFAULT(t1) /* clean up */
+	PTR_S	zero, U_PCB_ONFAULT(t1) /* clean up */
 	j	ra
 END(casuptr)
 
@@ -1593,7 +1454,7 @@ END(octeon_get_shadow)
  * octeon_set_control(addr, uint32_t val)
  */
 LEAF(octeon_set_control)
-	.set mips64r2
+	.set push
 	or      t1, a1, zero
 /*	dmfc0   a1, 9, 7*/
 	.word 0x40254807
@@ -1603,20 +1464,21 @@ LEAF(octeon_set_control)
 	.word 0x40a54807
 	jr	ra
 	nop
-        .set	mips0
+	.set pop
 END(octeon_set_control)
 
 /*
  * octeon_get_control(addr)
  */
 LEAF(octeon_get_control)
+	.set push
 	.set mips64r2
 /*	dmfc0   a1, 9, 7 */
 	.word 0x40254807
 	sd	a1, 0(a0)
 	jr	ra
 	nop
-        .set	mips0
+	.set pop
 END(octeon_get_control)
 #endif
 
diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c
index 1e28188..17a6be5 100644
--- a/sys/mips/mips/trap.c
+++ b/sys/mips/mips/trap.c
@@ -99,8 +99,7 @@ __FBSDID("$FreeBSD$");
 int trap_debug = 1;
 #endif
 
-extern unsigned onfault_table[];
-
+static void log_illegal_instruction(const char *, struct trapframe *);
 static void log_bad_page_fault(char *, struct trapframe *, int);
 static void log_frame_dump(struct trapframe *frame);
 static void get_mapping_info(vm_offset_t, pd_entry_t **, pt_entry_t **);
@@ -226,8 +225,8 @@ void stacktrace(struct trapframe *);
 void logstacktrace(struct trapframe *);
 #endif
 
-#define	KERNLAND(x) ((int)(x) < 0)
-#define	DELAYBRANCH(x) ((int)(x) < 0)
+#define	KERNLAND(x)	((vm_offset_t)(x) >= VM_MIN_KERNEL_ADDRESS && (vm_offset_t)(x) < VM_MAX_KERNEL_ADDRESS)
+#define	DELAYBRANCH(x)	((int)(x) < 0)
 
 /*
  * MIPS load/store access type
@@ -263,6 +262,7 @@ SYSCTL_INT(_vm, OID_AUTO, allow_unaligned_acc, CTLFLAG_RW,
 static int emulate_unaligned_access(struct trapframe *frame);
 
 extern char *syscallnames[];
+extern void fswintrberr(void); /* XXX */
 
 /*
  * Handle an exception.
@@ -281,13 +281,12 @@ trap(struct trapframe *trapframe)
 	struct proc *p = curproc;
 	vm_prot_t ftype;
 	pt_entry_t *pte;
-	unsigned int entry;
 	pmap_t pmap;
-	int quad_syscall = 0;
 	int access_type;
 	ksiginfo_t ksi;
 	char *msg = NULL;
-	register_t addr = 0;
+	intptr_t addr = 0;
+	register_t pc;
 
 	trapdebug_enter(trapframe, 0);
 	
@@ -330,9 +329,9 @@ trap(struct trapframe *trapframe)
 		printf("cpuid = %d\n", PCPU_GET(cpuid));
 #endif
 		MachTLBGetPID(pid);
-		printf("badaddr = 0x%0x, pc = 0x%0x, ra = 0x%0x, sp = 0x%0x, sr = 0x%x, pid = %d, ASID = 0x%x\n",
-		    trapframe->badvaddr, trapframe->pc, trapframe->ra,
-		    trapframe->sp, trapframe->sr,
+		printf("badaddr = %#jx, pc = %#jx, ra = %#jx, sp = %#jx, sr = %jx, pid = %d, ASID = %u\n",
+		    (intmax_t)trapframe->badvaddr, (intmax_t)trapframe->pc, (intmax_t)trapframe->ra,
+		    (intmax_t)trapframe->sp, (intmax_t)trapframe->sr,
 		    (curproc ? curproc->p_pid : -1), pid);
 
 		switch (type & ~T_USER) {
@@ -354,7 +353,7 @@ trap(struct trapframe *trapframe)
 		    ((type & ~T_USER) != T_SYSCALL)) {
 			if (++count == 3) {
 				trap_frame_dump(trapframe);
-				panic("too many faults at %x\n", last_badvaddr);
+				panic("too many faults at %p\n", (void *)last_badvaddr);
 			}
 		} else {
 			last_badvaddr = this_badvaddr;
@@ -375,35 +374,30 @@ trap(struct trapframe *trapframe)
 			vm_offset_t pa;
 
 			PMAP_LOCK(kernel_pmap);
-			if (!(pte = pmap_segmap(kernel_pmap,
-			    trapframe->badvaddr)))
-				panic("trap: ktlbmod: invalid segmap");
-			pte += (trapframe->badvaddr >> PAGE_SHIFT) & (NPTEPG - 1);
-			entry = *pte;
+			pte = pmap_pte(kernel_pmap, trapframe->badvaddr);
+			if (pte == NULL)
+				panic("trap: ktlbmod: can't find PTE");
 #ifdef SMP
 			/* It is possible that some other CPU changed m-bit */
-			if (!mips_pg_v(entry) || (entry & mips_pg_m_bit())) {
-				trapframe->badvaddr &= ~PAGE_MASK;
+			if (!mips_pg_v(*pte) || (*pte & mips_pg_m_bit())) {
 				pmap_update_page(kernel_pmap,
-				    trapframe->badvaddr, entry);
+				    trapframe->badvaddr, *pte);
 				PMAP_UNLOCK(kernel_pmap);
 				return (trapframe->pc);
 			}
 #else
-			if (!mips_pg_v(entry) || (entry & mips_pg_m_bit()))
+			if (!mips_pg_v(*pte) || (*pte & mips_pg_m_bit()))
 				panic("trap: ktlbmod: invalid pte");
 #endif
-			if (entry & mips_pg_ro_bit()) {
+			if (*pte & mips_pg_ro_bit()) {
 				/* write to read only page in the kernel */
 				ftype = VM_PROT_WRITE;
 				PMAP_UNLOCK(kernel_pmap);
 				goto kernel_fault;
 			}
-			entry |= mips_pg_m_bit();
-			*pte = entry;
-			trapframe->badvaddr &= ~PAGE_MASK;
-			pmap_update_page(kernel_pmap, trapframe->badvaddr, entry);
-			pa = mips_tlbpfn_to_paddr(entry);
+			*pte |= mips_pg_m_bit();
+			pmap_update_page(kernel_pmap, trapframe->badvaddr, *pte);
+			pa = mips_tlbpfn_to_paddr(*pte);
 			if (!page_is_managed(pa))
 				panic("trap: ktlbmod: unmanaged page");
 			pmap_set_modified(pa);
@@ -419,36 +413,30 @@ trap(struct trapframe *trapframe)
 			pmap = &p->p_vmspace->vm_pmap;
 
 			PMAP_LOCK(pmap);
-			if (!(pte = pmap_segmap(pmap, trapframe->badvaddr)))
-				panic("trap: utlbmod: invalid segmap");
-			pte += (trapframe->badvaddr >> PAGE_SHIFT) & (NPTEPG - 1);
-			entry = *pte;
+			pte = pmap_pte(pmap, trapframe->badvaddr);
+			if (pte == NULL)
+				panic("trap: utlbmod: can't find PTE");
 #ifdef SMP
 			/* It is possible that some other CPU changed m-bit */
-			if (!mips_pg_v(entry) || (entry & mips_pg_m_bit())) {
-				trapframe->badvaddr = (trapframe->badvaddr & ~PAGE_MASK);
-				pmap_update_page(pmap, trapframe->badvaddr, entry);
+			if (!mips_pg_v(*pte) || (*pte & mips_pg_m_bit())) {
+				pmap_update_page(pmap, trapframe->badvaddr, *pte);
 				PMAP_UNLOCK(pmap);
 				goto out;
 			}
 #else
-			if (!mips_pg_v(entry) || (entry & mips_pg_m_bit())) {
+			if (!mips_pg_v(*pte) || (*pte & mips_pg_m_bit()))
 				panic("trap: utlbmod: invalid pte");
-			}
 #endif
 
-			if (entry & mips_pg_ro_bit()) {
+			if (*pte & mips_pg_ro_bit()) {
 				/* write to read only page */
 				ftype = VM_PROT_WRITE;
 				PMAP_UNLOCK(pmap);
 				goto dofault;
 			}
-			entry |= mips_pg_m_bit();
-			*pte = entry;
-			trapframe->badvaddr = (trapframe->badvaddr & ~PAGE_MASK);
-			pmap_update_page(pmap, trapframe->badvaddr, entry);
-			trapframe->badvaddr |= (pmap->pm_asid[PCPU_GET(cpuid)].asid << VMTLB_PID_SHIFT);
-			pa = mips_tlbpfn_to_paddr(entry);
+			*pte |= mips_pg_m_bit();
+			pmap_update_page(pmap, trapframe->badvaddr, *pte);
+			pa = mips_tlbpfn_to_paddr(*pte);
 			if (!page_is_managed(pa))
 				panic("trap: utlbmod: unmanaged page");
 			pmap_set_modified(pa);
@@ -473,22 +461,29 @@ trap(struct trapframe *trapframe)
 			rv = vm_fault(kernel_map, va, ftype, VM_FAULT_NORMAL);
 			if (rv == KERN_SUCCESS)
 				return (trapframe->pc);
-			if ((i = td->td_pcb->pcb_onfault) != 0) {
-				td->td_pcb->pcb_onfault = 0;
-				return (onfault_table[i]);
+			if (td->td_pcb->pcb_onfault != NULL) {
+				pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault;
+				td->td_pcb->pcb_onfault = NULL;
+				return (pc);
 			}
 			goto err;
 		}
-		/*
+
+                /*
 		 * It is an error for the kernel to access user space except
 		 * through the copyin/copyout routines.
 		 */
-		if ((i = td->td_pcb->pcb_onfault) == 0)
+		if (td->td_pcb->pcb_onfault == NULL)
 			goto err;
+
 		/* check for fuswintr() or suswintr() getting a page fault */
-		if (i == 4) {
-			return (onfault_table[i]);
+		/* XXX There must be a nicer way to do this.  */
+		if (td->td_pcb->pcb_onfault == fswintrberr) {
+			pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault;
+			td->td_pcb->pcb_onfault = NULL;
+			return (pc);
 		}
+
 		goto dofault;
 
 	case T_TLB_LD_MISS + T_USER:
@@ -507,7 +502,7 @@ dofault:
 			vm = p->p_vmspace;
 			map = &vm->vm_map;
 			va = trunc_page((vm_offset_t)trapframe->badvaddr);
-			if ((vm_offset_t)trapframe->badvaddr >= VM_MIN_KERNEL_ADDRESS) {
+			if (KERNLAND(trapframe->badvaddr)) {
 				/*
 				 * Don't allow user-mode faults in kernel
 				 * address space.
@@ -529,9 +524,9 @@ dofault:
 			--p->p_lock;
 			PROC_UNLOCK(p);
 #ifdef VMFAULT_TRACE
-			printf("vm_fault(%p (pmap %p), %x (%x), %x, %d) -> %x at pc %x\n",
-			    map, &vm->vm_pmap, va, trapframe->badvaddr, ftype, VM_FAULT_NORMAL,
-			    rv, trapframe->pc);
+			printf("vm_fault(%p (pmap %p), %p (%p), %x, %d) -> %x at pc %p\n",
+			    map, &vm->vm_pmap, (void *)va, (void *)(intptr_t)trapframe->badvaddr,
+			    ftype, VM_FAULT_NORMAL, rv, (void *)(intptr_t)trapframe->pc);
 #endif
 
 			if (rv == KERN_SUCCESS) {
@@ -542,9 +537,10 @@ dofault:
 			}
 	nogo:
 			if (!usermode) {
-				if ((i = td->td_pcb->pcb_onfault) != 0) {
-					td->td_pcb->pcb_onfault = 0;
-					return (onfault_table[i]);
+				if (td->td_pcb->pcb_onfault != NULL) {
+					pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault;
+					td->td_pcb->pcb_onfault = NULL;
+					return (pc);
 				}
 				goto err;
 			}
@@ -606,6 +602,8 @@ dofault:
 			int nargs, nsaved;
 			register_t args[8];
 
+			bzero(args, sizeof args);
+
 			/*
 			 * note: PCPU_LAZY_INC() can only be used if we can
 			 * afford occassional inaccuracy in the count.
@@ -654,7 +652,6 @@ dofault:
 				args[0] = locr0->a2;
 				args[1] = locr0->a3;
 				nsaved = 2;
-				quad_syscall = 1;
 				break;
 
 			default:
@@ -679,7 +676,7 @@ dofault:
 			nargs = callp->sy_narg;
 
 			if (nargs > nsaved) {
-				i = copyin((caddr_t)(locr0->sp +
+				i = copyin((caddr_t)(intptr_t)(locr0->sp +
 				    4 * sizeof(register_t)), (caddr_t)&args[nsaved],
 				    (u_int)(nargs - nsaved) * sizeof(register_t));
 				if (i) {
@@ -770,7 +767,8 @@ dofault:
 
 	case T_BREAK + T_USER:
 		{
-			uintptr_t va, instr;
+			intptr_t va;
+			uint32_t instr;
 
 			/* compute address of break instruction */
 			va = trapframe->pc;
@@ -803,7 +801,7 @@ dofault:
 	case T_IWATCH + T_USER:
 	case T_DWATCH + T_USER:
 		{
-			uintptr_t va;
+			intptr_t va;
 
 			/* compute address of trapped instruction */
 			va = trapframe->pc;
@@ -817,7 +815,8 @@ dofault:
 
 	case T_TRAP + T_USER:
 		{
-			uintptr_t va, instr;
+			intptr_t va;
+			uint32_t instr;
 			struct trapframe *locr0 = td->td_frame;
 
 			/* compute address of trap instruction */
@@ -839,6 +838,7 @@ dofault:
 		}
 
 	case T_RES_INST + T_USER:
+		log_illegal_instruction("RES_INST", trapframe);
 		i = SIGILL;
 		addr = trapframe->pc;
 		break;
@@ -853,11 +853,13 @@ dofault:
 #if !defined(CPU_HAVEFPU)
 		/* FP (COP1) instruction */
 		if ((trapframe->cause & CR_COP_ERR) == 0x10000000) {
+			log_illegal_instruction("COP1_UNUSABLE", trapframe);
 			i = SIGILL;
 			break;
 		}
 #endif
 		if ((trapframe->cause & CR_COP_ERR) != 0x10000000) {
+			log_illegal_instruction("COPn_UNUSABLE", trapframe);
 			i = SIGILL;	/* only FPU instructions allowed */
 			break;
 		}
@@ -872,13 +874,13 @@ dofault:
 #if !defined(SMP) && (defined(DDB) || defined(DEBUG))
 		trapDump("fpintr");
 #else
-		printf("FPU Trap: PC %x CR %x SR %x\n",
-		    trapframe->pc, trapframe->cause, trapframe->sr);
+		printf("FPU Trap: PC %#jx CR %x SR %x\n",
+		    (intmax_t)trapframe->pc, (unsigned)trapframe->cause, (unsigned)trapframe->sr);
 		goto err;
 #endif
 
 	case T_FPE + T_USER:
-		MachFPTrap(trapframe->sr, trapframe->cause, trapframe->pc);
+		MipsFPTrap(trapframe->sr, trapframe->cause, trapframe->pc);
 		goto out;
 
 	case T_OVFLOW + T_USER:
@@ -889,8 +891,8 @@ dofault:
 	case T_ADDR_ERR_LD:	/* misaligned access */
 	case T_ADDR_ERR_ST:	/* misaligned access */
 #ifdef TRAP_DEBUG
-		printf("+++ ADDR_ERR: type = %d, badvaddr = %x\n", type,
-		    trapframe->badvaddr);
+		printf("+++ ADDR_ERR: type = %d, badvaddr = %#jx\n", type,
+		    (intmax_t)trapframe->badvaddr);
 #endif
 		/* Only allow emulation on a user address */
 		if (allow_unaligned_acc &&
@@ -922,10 +924,12 @@ dofault:
 		/* FALLTHROUGH */
 
 	case T_BUS_ERR_LD_ST:	/* BERR asserted to cpu */
-		if ((i = td->td_pcb->pcb_onfault) != 0) {
-			td->td_pcb->pcb_onfault = 0;
-			return (onfault_table[i]);
+		if (td->td_pcb->pcb_onfault != NULL) {
+			pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault;
+			td->td_pcb->pcb_onfault = NULL;
+			return (pc);
 		}
+
 		/* FALLTHROUGH */
 
 	default:
@@ -947,9 +951,9 @@ err:
 			printf("kernel mode)\n");
 
 #ifdef TRAP_DEBUG
-		printf("badvaddr = %x, pc = %x, ra = %x, sr = 0x%x\n",
-		       trapframe->badvaddr, trapframe->pc, trapframe->ra,
-		       trapframe->sr);
+		printf("badvaddr = %#jx, pc = %#jx, ra = %#jx, sr = %#jxx\n",
+		       (intmax_t)trapframe->badvaddr, (intmax_t)trapframe->pc, (intmax_t)trapframe->ra,
+		       (intmax_t)trapframe->sr);
 #endif
 
 #ifdef KDB
@@ -997,11 +1001,11 @@ trapDump(char *msg)
 		if (trp->cause == 0)
 			break;
 
-		printf("%s: ADR %x PC %x CR %x SR %x\n",
+		printf("%s: ADR %jx PC %jx CR %jx SR %jx\n",
 		    trap_type[(trp->cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT],
-		    trp->vadr, trp->pc, trp->cause, trp->status);
+		    (intmax_t)trp->vadr, (intmax_t)trp->pc, (intmax_t)trp->cause, (intmax_t)trp->status);
 
-		printf("   RA %x SP %x code %d\n", trp->ra, trp->sp, trp->code);
+		printf("   RA %jx SP %jx code %d\n", (intmax_t)trp->ra, (intmax_t)trp->sp, (int)trp->code);
 	}
 	intr_restore(s);
 }
@@ -1165,39 +1169,39 @@ static void
 log_frame_dump(struct trapframe *frame)
 {
 	log(LOG_ERR, "Trapframe Register Dump:\n");
-	log(LOG_ERR, "\tzero: %p\tat: %p\tv0: %p\tv1: %p\n",
-	    (void *)0, (void *)frame->ast, (void *)frame->v0, (void *)frame->v1);
+	log(LOG_ERR, "\tzero: %#jx\tat: %#jx\tv0: %#jx\tv1: %#jx\n",
+	    (intmax_t)0, (intmax_t)frame->ast, (intmax_t)frame->v0, (intmax_t)frame->v1);
 
-	log(LOG_ERR, "\ta0: %p\ta1: %p\ta2: %p\ta3: %p\n",
-	    (void *)frame->a0, (void *)frame->a1, (void *)frame->a2, (void *)frame->a3);
+	log(LOG_ERR, "\ta0: %#jx\ta1: %#jx\ta2: %#jx\ta3: %#jx\n",
+	    (intmax_t)frame->a0, (intmax_t)frame->a1, (intmax_t)frame->a2, (intmax_t)frame->a3);
 
-	log(LOG_ERR, "\tt0: %p\tt1: %p\tt2: %p\tt3: %p\n",
-	    (void *)frame->t0, (void *)frame->t1, (void *)frame->t2, (void *)frame->t3);
+	log(LOG_ERR, "\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n",
+	    (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3);
 
-	log(LOG_ERR, "\tt4: %p\tt5: %p\tt6: %p\tt7: %p\n",
-	    (void *)frame->t4, (void *)frame->t5, (void *)frame->t6, (void *)frame->t7);
+	log(LOG_ERR, "\tt4: %#jx\tt5: %#jx\tt6: %#jx\tt7: %#jx\n",
+	    (intmax_t)frame->t4, (intmax_t)frame->t5, (intmax_t)frame->t6, (intmax_t)frame->t7);
 
-	log(LOG_ERR, "\tt8: %p\tt9: %p\ts0: %p\ts1: %p\n",
-	    (void *)frame->t8, (void *)frame->t9, (void *)frame->s0, (void *)frame->s1);
+	log(LOG_ERR, "\tt8: %#jx\tt9: %#jx\ts0: %#jx\ts1: %#jx\n",
+	    (intmax_t)frame->t8, (intmax_t)frame->t9, (intmax_t)frame->s0, (intmax_t)frame->s1);
 
-	log(LOG_ERR, "\ts2: %p\ts3: %p\ts4: %p\ts5: %p\n",
-	    (void *)frame->s2, (void *)frame->s3, (void *)frame->s4, (void *)frame->s5);
+	log(LOG_ERR, "\ts2: %#jx\ts3: %#jx\ts4: %#jx\ts5: %#jx\n",
+	    (intmax_t)frame->s2, (intmax_t)frame->s3, (intmax_t)frame->s4, (intmax_t)frame->s5);
 
-	log(LOG_ERR, "\ts6: %p\ts7: %p\tk0: %p\tk1: %p\n",
-	    (void *)frame->s6, (void *)frame->s7, (void *)frame->k0, (void *)frame->k1);
+	log(LOG_ERR, "\ts6: %#jx\ts7: %#jx\tk0: %#jx\tk1: %#jx\n",
+	    (intmax_t)frame->s6, (intmax_t)frame->s7, (intmax_t)frame->k0, (intmax_t)frame->k1);
 
-	log(LOG_ERR, "\tgp: %p\tsp: %p\ts8: %p\tra: %p\n",
-	    (void *)frame->gp, (void *)frame->sp, (void *)frame->s8, (void *)frame->ra);
+	log(LOG_ERR, "\tgp: %#jx\tsp: %#jx\ts8: %#jx\tra: %#jx\n",
+	    (intmax_t)frame->gp, (intmax_t)frame->sp, (intmax_t)frame->s8, (intmax_t)frame->ra);
 
-	log(LOG_ERR, "\tsr: %p\tmullo: %p\tmulhi: %p\tbadvaddr: %p\n",
-	    (void *)frame->sr, (void *)frame->mullo, (void *)frame->mulhi, (void *)frame->badvaddr);
+	log(LOG_ERR, "\tsr: %#jx\tmullo: %#jx\tmulhi: %#jx\tbadvaddr: %#jx\n",
+	    (intmax_t)frame->sr, (intmax_t)frame->mullo, (intmax_t)frame->mulhi, (intmax_t)frame->badvaddr);
 
 #ifdef IC_REG
-	log(LOG_ERR, "\tcause: %p\tpc: %p\tic: %p\n",
-	    (void *)frame->cause, (void *)frame->pc, (void *)frame->ic);
+	log(LOG_ERR, "\tcause: %#jx\tpc: %#jx\tic: %#jx\n",
+	    (intmax_t)frame->cause, (intmax_t)frame->pc, (intmax_t)frame->ic);
 #else
-	log(LOG_ERR, "\tcause: %p\tpc: %p\n",
-	    (void *)frame->cause, (void *)frame->pc);
+	log(LOG_ERR, "\tcause: %#jx\tpc: %#jx\n",
+	    (intmax_t)frame->cause, (intmax_t)frame->pc);
 #endif
 }
 
@@ -1206,39 +1210,39 @@ static void
 trap_frame_dump(struct trapframe *frame)
 {
 	printf("Trapframe Register Dump:\n");
-	printf("\tzero: %p\tat: %p\tv0: %p\tv1: %p\n",
-	    (void *)0, (void *)frame->ast, (void *)frame->v0, (void *)frame->v1);
+	printf("\tzero: %#jx\tat: %#jx\tv0: %#jx\tv1: %#jx\n",
+	    (intmax_t)0, (intmax_t)frame->ast, (intmax_t)frame->v0, (intmax_t)frame->v1);
 
-	printf("\ta0: %p\ta1: %p\ta2: %p\ta3: %p\n",
-	    (void *)frame->a0, (void *)frame->a1, (void *)frame->a2, (void *)frame->a3);
+	printf("\ta0: %#jx\ta1: %#jx\ta2: %#jx\ta3: %#jx\n",
+	    (intmax_t)frame->a0, (intmax_t)frame->a1, (intmax_t)frame->a2, (intmax_t)frame->a3);
 
-	printf("\tt0: %p\tt1: %p\tt2: %p\tt3: %p\n",
-	    (void *)frame->t0, (void *)frame->t1, (void *)frame->t2, (void *)frame->t3);
+	printf("\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n",
+	    (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3);
 
-	printf("\tt4: %p\tt5: %p\tt6: %p\tt7: %p\n",
-	    (void *)frame->t4, (void *)frame->t5, (void *)frame->t6, (void *)frame->t7);
+	printf("\tt4: %#jx\tt5: %#jx\tt6: %#jx\tt7: %#jx\n",
+	    (intmax_t)frame->t4, (intmax_t)frame->t5, (intmax_t)frame->t6, (intmax_t)frame->t7);
 
-	printf("\tt8: %p\tt9: %p\ts0: %p\ts1: %p\n",
-	    (void *)frame->t8, (void *)frame->t9, (void *)frame->s0, (void *)frame->s1);
+	printf("\tt8: %#jx\tt9: %#jx\ts0: %#jx\ts1: %#jx\n",
+	    (intmax_t)frame->t8, (intmax_t)frame->t9, (intmax_t)frame->s0, (intmax_t)frame->s1);
 
-	printf("\ts2: %p\ts3: %p\ts4: %p\ts5: %p\n",
-	    (void *)frame->s2, (void *)frame->s3, (void *)frame->s4, (void *)frame->s5);
+	printf("\ts2: %#jx\ts3: %#jx\ts4: %#jx\ts5: %#jx\n",
+	    (intmax_t)frame->s2, (intmax_t)frame->s3, (intmax_t)frame->s4, (intmax_t)frame->s5);
 
-	printf("\ts6: %p\ts7: %p\tk0: %p\tk1: %p\n",
-	    (void *)frame->s6, (void *)frame->s7, (void *)frame->k0, (void *)frame->k1);
+	printf("\ts6: %#jx\ts7: %#jx\tk0: %#jx\tk1: %#jx\n",
+	    (intmax_t)frame->s6, (intmax_t)frame->s7, (intmax_t)frame->k0, (intmax_t)frame->k1);
 
-	printf("\tgp: %p\tsp: %p\ts8: %p\tra: %p\n",
-	    (void *)frame->gp, (void *)frame->sp, (void *)frame->s8, (void *)frame->ra);
+	printf("\tgp: %#jx\tsp: %#jx\ts8: %#jx\tra: %#jx\n",
+	    (intmax_t)frame->gp, (intmax_t)frame->sp, (intmax_t)frame->s8, (intmax_t)frame->ra);
 
-	printf("\tsr: %p\tmullo: %p\tmulhi: %p\tbadvaddr: %p\n",
-	    (void *)frame->sr, (void *)frame->mullo, (void *)frame->mulhi, (void *)frame->badvaddr);
+	printf("\tsr: %#jx\tmullo: %#jx\tmulhi: %#jx\tbadvaddr: %#jx\n",
+	    (intmax_t)frame->sr, (intmax_t)frame->mullo, (intmax_t)frame->mulhi, (intmax_t)frame->badvaddr);
 
 #ifdef IC_REG
-	printf("\tcause: %p\tpc: %p\tic: %p\n",
-	    (void *)frame->cause, (void *)frame->pc, (void *)frame->ic);
+	printf("\tcause: %#jx\tpc: %#jx\tic: %#jx\n",
+	    (intmax_t)frame->cause, (intmax_t)frame->pc, (intmax_t)frame->ic);
 #else
-	printf("\tcause: %p\tpc: %p\n",
-	    (void *)frame->cause, (void *)frame->pc);
+	printf("\tcause: %#jx\tpc: %#jx\n",
+	    (intmax_t)frame->cause, (intmax_t)frame->pc);
 #endif
 }
 
@@ -1252,7 +1256,7 @@ get_mapping_info(vm_offset_t va, pd_entry_t **pdepp, pt_entry_t **ptepp)
 	pd_entry_t *pdep;
 	struct proc *p = curproc;
 
-	pdep = (&(p->p_vmspace->vm_pmap.pm_segtab[va >> SEGSHIFT]));
+	pdep = (&(p->p_vmspace->vm_pmap.pm_segtab[(va >> SEGSHIFT) & (NPDEPG - 1)]));
 	if (*pdep)
 		ptep = pmap_pte(&p->p_vmspace->vm_pmap, va);
 	else
@@ -1262,6 +1266,50 @@ get_mapping_info(vm_offset_t va, pd_entry_t **pdepp, pt_entry_t **ptepp)
 	*ptepp = ptep;
 }
 
+static void
+log_illegal_instruction(const char *msg, struct trapframe *frame)
+{
+	pt_entry_t *ptep;
+	pd_entry_t *pdep;
+	unsigned int *addr;
+	struct proc *p = curproc;
+	register_t pc;
+
+#ifdef SMP
+	printf("cpuid = %d\n", PCPU_GET(cpuid));
+#endif
+	pc = frame->pc + (DELAYBRANCH(frame->cause) ? 4 : 0);
+	log(LOG_ERR, "%s: pid %d (%s), uid %d: pc %#jx ra %#jx\n",
+	    msg, p->p_pid, p->p_comm,
+	    p->p_ucred ? p->p_ucred->cr_uid : -1,
+	    (intmax_t)pc,
+	    (intmax_t)frame->ra);
+
+	/* log registers in trap frame */
+	log_frame_dump(frame);
+
+	get_mapping_info((vm_offset_t)pc, &pdep, &ptep);
+
+	/*
+	 * Dump a few words around faulting instruction, if the addres is
+	 * valid.
+	 */
+	if (!(pc & 3) &&
+	    useracc((caddr_t)(intptr_t)pc, sizeof(int) * 4, VM_PROT_READ)) {
+		/* dump page table entry for faulting instruction */
+		log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#x\n",
+		    (intmax_t)pc, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
+
+		addr = (unsigned int *)(intptr_t)pc;
+		log(LOG_ERR, "Dumping 4 words starting at pc address %p: \n",
+		    addr);
+		log(LOG_ERR, "%08x %08x %08x %08x\n",
+		    addr[0], addr[1], addr[2], addr[3]);
+	} else {
+		log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#x\n",
+		    (intmax_t)pc, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
+	}
+}
 
 static void
 log_bad_page_fault(char *msg, struct trapframe *frame, int trap_type)
@@ -1293,12 +1341,12 @@ log_bad_page_fault(char *msg, struct trapframe *frame, int trap_type)
 	}
 
 	pc = frame->pc + (DELAYBRANCH(frame->cause) ? 4 : 0);
-	log(LOG_ERR, "%s: pid %d (%s), uid %d: pc %p got a %s fault at %p\n",
+	log(LOG_ERR, "%s: pid %d (%s), uid %d: pc %#jx got a %s fault at %#jx\n",
 	    msg, p->p_pid, p->p_comm,
 	    p->p_ucred ? p->p_ucred->cr_uid : -1,
-	    (void *)pc,
+	    (intmax_t)pc,
 	    read_or_write,
-	    (void *)frame->badvaddr);
+	    (intmax_t)frame->badvaddr);
 
 	/* log registers in trap frame */
 	log_frame_dump(frame);
@@ -1311,21 +1359,24 @@ log_bad_page_fault(char *msg, struct trapframe *frame, int trap_type)
 	 */
 	if (!(pc & 3) && (pc != frame->badvaddr) &&
 	    (trap_type != T_BUS_ERR_IFETCH) &&
-	    useracc((caddr_t)pc, sizeof(int) * 4, VM_PROT_READ)) {
+	    useracc((caddr_t)(intptr_t)pc, sizeof(int) * 4, VM_PROT_READ)) {
 		/* dump page table entry for faulting instruction */
-		log(LOG_ERR, "Page table info for pc address %p: pde = %p, pte = 0x%lx\n",
-		    (void *)pc, *pdep, ptep ? *ptep : 0);
+		log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#x\n",
+		    (intmax_t)pc, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
 
-		addr = (unsigned int *)pc;
+		addr = (unsigned int *)(intptr_t)pc;
 		log(LOG_ERR, "Dumping 4 words starting at pc address %p: \n",
 		    addr);
 		log(LOG_ERR, "%08x %08x %08x %08x\n",
 		    addr[0], addr[1], addr[2], addr[3]);
 	} else {
-		log(LOG_ERR, "pc address %p is inaccessible, pde = 0x%p, pte = 0x%lx\n",
-		    (void *)pc, *pdep, ptep ? *ptep : 0);
+		log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#x\n",
+		    (intmax_t)pc, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
 	}
-	/*	panic("Bad trap");*/
+
+	get_mapping_info((vm_offset_t)frame->badvaddr, &pdep, &ptep);
+	log(LOG_ERR, "Page table info for bad address %#jx: pde = %p, pte = %#x\n",
+	    (intmax_t)frame->badvaddr, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
 }
 
 
@@ -1336,7 +1387,7 @@ static int
 mips_unaligned_load_store(struct trapframe *frame, register_t addr, register_t pc)
 {
 	register_t *reg = (register_t *) frame;
-	u_int32_t inst = *((u_int32_t *) pc);
+	u_int32_t inst = *((u_int32_t *)(intptr_t)pc);
 	u_int32_t value_msb, value;
 	int access_type = 0;
 
@@ -1432,9 +1483,9 @@ emulate_unaligned_access(struct trapframe *frame)
 			else
 				frame->pc += 4;
 
-			log(LOG_INFO, "Unaligned %s: pc=%p, badvaddr=%p\n",
-			    access_name[access_type - 1], (void *)pc,
-			    (void *)frame->badvaddr);
+			log(LOG_INFO, "Unaligned %s: pc=%#jx, badvaddr=%#jx\n",
+			    access_name[access_type - 1], (intmax_t)pc,
+			    (intmax_t)frame->badvaddr);
 		}
 	}
 	return access_type;
diff --git a/sys/mips/mips/vm_machdep.c b/sys/mips/mips/vm_machdep.c
index 10321da..cb8a8d9 100644
--- a/sys/mips/mips/vm_machdep.c
+++ b/sys/mips/mips/vm_machdep.c
@@ -647,7 +647,7 @@ DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
 	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
 	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
 
-	db_printf("PCB onfault = %d\n", pcb->pcb_onfault);
+	db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
 	db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
 	db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);