diff options
author | mbr <mbr@FreeBSD.org> | 2003-01-10 08:12:20 +0000 |
---|---|---|
committer | mbr <mbr@FreeBSD.org> | 2003-01-10 08:12:20 +0000 |
commit | d4ed6decdd7a22b69fb4ac7f58d952996eb04abd (patch) | |
tree | 606684be3a7f6210fb5af3b3ecbf721f0ccc4221 /sys | |
parent | 9f1243940bfab5bf1006a5d8a39c39a8d688f28e (diff) | |
download | FreeBSD-src-d4ed6decdd7a22b69fb4ac7f58d952996eb04abd.zip FreeBSD-src-d4ed6decdd7a22b69fb4ac7f58d952996eb04abd.tar.gz |
SIS_CFG_EDB_MASTER_EN indicates the EDB bus is used instead of
the PCI bus. When this bit is set, the Max DMA Burst Size
for TX/RX DMA should be no larger than 64 bytes.
Reviewed by: luoqi
Obtained from: (idea from linux driver source)
MFC after: 2 weeks
Diffstat (limited to 'sys')
-rw-r--r-- | sys/pci/if_sis.c | 12 | ||||
-rw-r--r-- | sys/pci/if_sisreg.h | 5 |
2 files changed, 14 insertions, 3 deletions
diff --git a/sys/pci/if_sis.c b/sys/pci/if_sis.c index 33352b4..b8fc130 100644 --- a/sys/pci/if_sis.c +++ b/sys/pci/if_sis.c @@ -1806,8 +1806,16 @@ sis_init(xsc) CSR_WRITE_4(sc, SIS_RX_LISTPTR, sc->sis_cdata.sis_rx_paddr); CSR_WRITE_4(sc, SIS_TX_LISTPTR, sc->sis_cdata.sis_tx_paddr); - /* Set RX configuration */ - CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG); + /* SIS_CFG_EDB_MASTER_EN indicates the EDB bus is used instead of + * the PCI bus. When this bit is set, the Max DMA Burst Size + * for TX/RX DMA should be no larger than 16 double words. + */ + if (CSR_READ_4(sc, SIS_CFG) & SIS_CFG_EDB_MASTER_EN) { + CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG64); + } else { + CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG256); + } + /* Accept Long Packets for VLAN support */ SIS_SETBIT(sc, SIS_RX_CFG, SIS_RXCFG_RX_JABBER); diff --git a/sys/pci/if_sisreg.h b/sys/pci/if_sisreg.h index 2e2ee19..a839b37 100644 --- a/sys/pci/if_sisreg.h +++ b/sys/pci/if_sisreg.h @@ -114,6 +114,7 @@ #define SIS_CFG_OUTOFWIN_TIMER 0x00000020 #define SIS_CFG_SINGLE_BACKOFF 0x00000040 #define SIS_CFG_PCIREQ_ALG 0x00000080 +#define SIS_CFG_EDB_MASTER_EN 0x00002000 #define SIS_EECTL_DIN 0x00000001 #define SIS_EECTL_DOUT 0x00000002 @@ -247,8 +248,10 @@ #define SIS_RXDMA_128BYTES 0x00600000 #define SIS_RXDMA_256BYTES 0x00700000 -#define SIS_RXCFG \ +#define SIS_RXCFG256 \ (SIS_RXCFG_DRAIN(64)|SIS_RXDMA_256BYTES) +#define SIS_RXCFG64 \ + (SIS_RXCFG_DRAIN(64)|SIS_RXDMA_64BYTES) #define SIS_RXFILTCTL_ADDR 0x000F0000 #define NS_RXFILTCTL_MCHASH 0x00200000 |