diff options
author | jhb <jhb@FreeBSD.org> | 2005-07-27 20:01:45 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2005-07-27 20:01:45 +0000 |
commit | b8779c810b9f3babd08da008e9fc252ab822d00c (patch) | |
tree | fbbb32e1905bc618ae6151786ba54f1b132df556 /sys | |
parent | 75a402d1cc655b66a1c7919d67bab6e0f584ea0f (diff) | |
download | FreeBSD-src-b8779c810b9f3babd08da008e9fc252ab822d00c.zip FreeBSD-src-b8779c810b9f3babd08da008e9fc252ab822d00c.tar.gz |
Add extra constraints to tell the compiler that the memory be modified
in the arm __swp() and sparc64 casa() and casax() functions is actually
being used as an input and output and not just the value of the register
that points to the memory location. This was the underlying source of
the mbuf refcount problems on sparc64 a while back. For arm this should be
a nop because __swp() has a constraint to clobber all memory which can
probably be removed now.
Reviewed by: alc, cognet
MFC after: 1 week
Diffstat (limited to 'sys')
-rw-r--r-- | sys/arm/include/atomic.h | 6 | ||||
-rw-r--r-- | sys/sparc64/include/cpufunc.h | 10 |
2 files changed, 10 insertions, 6 deletions
diff --git a/sys/arm/include/atomic.h b/sys/arm/include/atomic.h index 4275010..1170847 100644 --- a/sys/arm/include/atomic.h +++ b/sys/arm/include/atomic.h @@ -77,8 +77,10 @@ static __inline uint32_t __swp(uint32_t val, volatile uint32_t *ptr) { - __asm __volatile("swp %0, %1, [%2]" - : "=&r" (val) : "r" (val) , "r" (ptr) : "memory"); + __asm __volatile("swp %0, %2, [%3]" + : "=&r" (val), "=m" (*ptr) + : "r" (val) , "r" (ptr), "m" (*ptr) + : "memory"); return (val); } diff --git a/sys/sparc64/include/cpufunc.h b/sys/sparc64/include/cpufunc.h index fc50e20..211eec3 100644 --- a/sys/sparc64/include/cpufunc.h +++ b/sys/sparc64/include/cpufunc.h @@ -62,15 +62,17 @@ struct thread; #define casa(rs1, rs2, rd, asi) ({ \ u_int __rd = (uint32_t)(rd); \ - __asm __volatile("casa [%1] %2, %3, %0" \ - : "+r" (__rd) : "r" (rs1), "n" (asi), "r" (rs2)); \ + __asm __volatile("casa [%2] %3, %4, %0" \ + : "+r" (__rd), "=m" (*rs1) \ + : "r" (rs1), "n" (asi), "r" (rs2), "m" (*rs1)); \ __rd; \ }) #define casxa(rs1, rs2, rd, asi) ({ \ u_long __rd = (uint64_t)(rd); \ - __asm __volatile("casxa [%1] %2, %3, %0" \ - : "+r" (__rd) : "r" (rs1), "n" (asi), "r" (rs2)); \ + __asm __volatile("casxa [%2] %3, %4, %0" \ + : "+r" (__rd), "=m" (*rs1) \ + : "r" (rs1), "n" (asi), "r" (rs2), "m" (*rs1)); \ __rd; \ }) |