diff options
author | sam <sam@FreeBSD.org> | 2006-09-18 16:49:15 +0000 |
---|---|---|
committer | sam <sam@FreeBSD.org> | 2006-09-18 16:49:15 +0000 |
commit | 549b4f07f6e6061bc4be78514856c8674a535fe1 (patch) | |
tree | ab29e5d484329e2eabf03f2f8612080360547c98 /sys | |
parent | 3839b5384ddf1f9b95604f79429c842af6ee2a54 (diff) | |
download | FreeBSD-src-549b4f07f6e6061bc4be78514856c8674a535fe1.zip FreeBSD-src-549b4f07f6e6061bc4be78514856c8674a535fe1.tar.gz |
o move ath hal os glue code from the hal to the driver: this code was
part of the hal distribution early on when the hal was built for
each os but it's been portable for a long time so move the os-specific
code out (and off the vendor branch)
o correct the copyright on ah_osdep.?; it was mistakenly given a
restricted license and not a dual-bsd/gpl license
o remove the module api definition as it was never used
o fixup include paths for move of ah_osdep.h
MFC after: 2 weeks
Diffstat (limited to 'sys')
-rw-r--r-- | sys/conf/kern.pre.mk | 2 | ||||
-rw-r--r-- | sys/dev/ath/ah_osdep.c | 444 | ||||
-rw-r--r-- | sys/dev/ath/ah_osdep.h | 127 | ||||
-rw-r--r-- | sys/modules/ath/Makefile | 2 | ||||
-rw-r--r-- | sys/modules/ath_hal/Makefile | 16 | ||||
-rw-r--r-- | sys/modules/ath_rate_onoe/Makefile | 2 | ||||
-rw-r--r-- | sys/modules/ath_rate_sample/Makefile | 2 |
7 files changed, 580 insertions, 15 deletions
diff --git a/sys/conf/kern.pre.mk b/sys/conf/kern.pre.mk index 6dac79d..e8abf13 100644 --- a/sys/conf/kern.pre.mk +++ b/sys/conf/kern.pre.mk @@ -67,7 +67,7 @@ INCLUDES+= -I$S/contrib/ipfilter INCLUDES+= -I$S/contrib/pf # ... and the same for Atheros HAL -INCLUDES+= -I$S/contrib/dev/ath/freebsd +INCLUDES+= -I$S/dev/ath # ... and the same for the NgATM stuff INCLUDES+= -I$S/contrib/ngatm diff --git a/sys/dev/ath/ah_osdep.c b/sys/dev/ath/ah_osdep.c new file mode 100644 index 0000000..e580e2f --- /dev/null +++ b/sys/dev/ath/ah_osdep.c @@ -0,0 +1,444 @@ +/*- + * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer, + * without modification. + * 2. Redistributions in binary form must reproduce at minimum a disclaimer + * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any + * redistribution must be conditioned upon including a substantially + * similar Disclaimer requirement for further binary redistribution. + * 3. Neither the names of the above-listed copyright holders nor the names + * of any contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL") version 2 as published by the Free + * Software Foundation. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGES. + * + * $FreeBSD$ + */ +#include "opt_ah.h" + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/sysctl.h> +#include <sys/bus.h> +#include <sys/malloc.h> +#include <sys/proc.h> + +#include <machine/stdarg.h> + +#include <net/ethernet.h> /* XXX for ether_sprintf */ + +#include <contrib/dev/ath/ah.h> + +/* + * WiSoC boards overload the bus tag with information about the + * board layout. We must extract the bus space tag from that + * indirect structure. For everyone else the tag is passed in + * directly. + * XXX cache indirect ref privately + */ +#ifdef AH_SUPPORT_AR5312 +#define BUSTAG(ah) \ + ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) +#else +#define BUSTAG(ah) ((bus_space_tag_t) (ah)->ah_st) +#endif + +extern void ath_hal_printf(struct ath_hal *, const char*, ...) + __printflike(2,3); +extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) + __printflike(2, 0); +extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); +extern void *ath_hal_malloc(size_t); +extern void ath_hal_free(void *); +#ifdef AH_ASSERT +extern void ath_hal_assert_failed(const char* filename, + int lineno, const char* msg); +#endif +#ifdef AH_DEBUG +extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...); +extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...); +#endif /* AH_DEBUG */ + +/* NB: put this here instead of the driver to avoid circular references */ +SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); +SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters"); + +#ifdef AH_DEBUG +static int ath_hal_debug = 0; +SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, + 0, "Atheros HAL debugging printfs"); +TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug); +#endif /* AH_DEBUG */ + +SYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0, + "Atheros HAL version"); + +/* NB: these are deprecated; they exist for now for compatibility */ +int ath_hal_dma_beacon_response_time = 2; /* in TU's */ +SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW, + &ath_hal_dma_beacon_response_time, 0, + "Atheros HAL DMA beacon response time"); +int ath_hal_sw_beacon_response_time = 10; /* in TU's */ +SYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW, + &ath_hal_sw_beacon_response_time, 0, + "Atheros HAL software beacon response time"); +int ath_hal_additional_swba_backoff = 0; /* in TU's */ +SYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW, + &ath_hal_additional_swba_backoff, 0, + "Atheros HAL additional SWBA backoff time"); + +MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); + +void* +ath_hal_malloc(size_t size) +{ + return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); +} + +void +ath_hal_free(void* p) +{ + return free(p, M_ATH_HAL); +} + +void +ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) +{ + vprintf(fmt, ap); +} + +void +ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + ath_hal_vprintf(ah, fmt, ap); + va_end(ap); +} + +const char* +ath_hal_ether_sprintf(const u_int8_t *mac) +{ + return ether_sprintf(mac); +} + +#ifdef AH_DEBUG +void +HALDEBUG(struct ath_hal *ah, const char* fmt, ...) +{ + if (ath_hal_debug) { + __va_list ap; + va_start(ap, fmt); + ath_hal_vprintf(ah, fmt, ap); + va_end(ap); + } +} + +void +HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...) +{ + if (ath_hal_debug >= level) { + __va_list ap; + va_start(ap, fmt); + ath_hal_vprintf(ah, fmt, ap); + va_end(ap); + } +} +#endif /* AH_DEBUG */ + +#ifdef AH_DEBUG_ALQ +/* + * ALQ register tracing support. + * + * Setting hw.ath.hal.alq=1 enables tracing of all register reads and + * writes to the file /tmp/ath_hal.log. The file format is a simple + * fixed-size array of records. When done logging set hw.ath.hal.alq=0 + * and then decode the file with the arcode program (that is part of the + * HAL). If you start+stop tracing the data will be appended to an + * existing file. + * + * NB: doesn't handle multiple devices properly; only one DEVICE record + * is emitted and the different devices are not identified. + */ +#include <sys/alq.h> +#include <sys/pcpu.h> +#include <contrib/dev/ath/ah_decode.h> + +static struct alq *ath_hal_alq; +static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ +static u_int ath_hal_alq_lost; /* count of lost records */ +static const char *ath_hal_logfile = "/tmp/ath_hal.log"; +static u_int ath_hal_alq_qsize = 64*1024; + +static int +ath_hal_setlogging(int enable) +{ + int error; + + if (enable) { + error = suser(curthread); + if (error == 0) { + error = alq_open(&ath_hal_alq, ath_hal_logfile, + curthread->td_ucred, ALQ_DEFAULT_CMODE, + sizeof (struct athregrec), ath_hal_alq_qsize); + ath_hal_alq_lost = 0; + ath_hal_alq_emitdev = 1; + printf("ath_hal: logging to %s enabled\n", + ath_hal_logfile); + } + } else { + if (ath_hal_alq) + alq_close(ath_hal_alq); + ath_hal_alq = NULL; + printf("ath_hal: logging disabled\n"); + error = 0; + } + return (error); +} + +static int +sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) +{ + int error, enable; + + enable = (ath_hal_alq != NULL); + error = sysctl_handle_int(oidp, &enable, 0, req); + if (error || !req->newptr) + return (error); + else + return (ath_hal_setlogging(enable)); +} +SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, + 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); +SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, + &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); +SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, + &ath_hal_alq_lost, 0, "Register operations not logged"); + +static struct ale * +ath_hal_alq_get(struct ath_hal *ah) +{ + struct ale *ale; + + if (ath_hal_alq_emitdev) { + ale = alq_get(ath_hal_alq, ALQ_NOWAIT); + if (ale) { + struct athregrec *r = + (struct athregrec *) ale->ae_data; + r->op = OP_DEVICE; + r->reg = 0; + r->val = ah->ah_devid; + alq_post(ath_hal_alq, ale); + ath_hal_alq_emitdev = 0; + } else + ath_hal_alq_lost++; + } + ale = alq_get(ath_hal_alq, ALQ_NOWAIT); + if (!ale) + ath_hal_alq_lost++; + return ale; +} + +void +ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) +{ + bus_space_tag_t tag = BUSTAG(ah); + bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; + + if (ath_hal_alq) { + struct ale *ale = ath_hal_alq_get(ah); + if (ale) { + struct athregrec *r = (struct athregrec *) ale->ae_data; + r->op = OP_WRITE; + r->reg = reg; + r->val = val; + alq_post(ath_hal_alq, ale); + } + } +#if _BYTE_ORDER == _BIG_ENDIAN + if (reg >= 0x4000 && reg < 0x5000) + bus_space_write_4(tag, h, reg, val); + else +#endif + bus_space_write_stream_4(tag, h, reg, val); +} + +u_int32_t +ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) +{ + bus_space_tag_t tag = BUSTAG(ah); + bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; + u_int32_t val; + +#if _BYTE_ORDER == _BIG_ENDIAN + if (reg >= 0x4000 && reg < 0x5000) + val = bus_space_read_4(tag, h, reg); + else +#endif + val = bus_space_read_stream_4(tag, h, reg); + if (ath_hal_alq) { + struct ale *ale = ath_hal_alq_get(ah); + if (ale) { + struct athregrec *r = (struct athregrec *) ale->ae_data; + r->op = OP_READ; + r->reg = reg; + r->val = val; + alq_post(ath_hal_alq, ale); + } + } + return val; +} + +void +OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) +{ + if (ath_hal_alq) { + struct ale *ale = ath_hal_alq_get(ah); + if (ale) { + struct athregrec *r = (struct athregrec *) ale->ae_data; + r->op = OP_MARK; + r->reg = id; + r->val = v; + alq_post(ath_hal_alq, ale); + } + } +} +#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) +/* + * Memory-mapped device register read/write. These are here + * as routines when debugging support is enabled and/or when + * explicitly configured to use function calls. The latter is + * for architectures that might need to do something before + * referencing memory (e.g. remap an i/o window). + * + * NB: see the comments in ah_osdep.h about byte-swapping register + * reads and writes to understand what's going on below. + */ + +void +ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) +{ + bus_space_tag_t tag = BUSTAG(ah); + bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; + +#if _BYTE_ORDER == _BIG_ENDIAN + if (reg >= 0x4000 && reg < 0x5000) + bus_space_write_4(tag, h, reg, val); + else +#endif + bus_space_write_stream_4(tag, h, reg, val); +} + +u_int32_t +ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) +{ + bus_space_tag_t tag = BUSTAG(ah); + bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; + u_int32_t val; + +#if _BYTE_ORDER == _BIG_ENDIAN + if (reg >= 0x4000 && reg < 0x5000) + val = bus_space_read_4(tag, h, reg); + else +#endif + val = bus_space_read_stream_4(tag, h, reg); + return val; +} +#endif /* AH_DEBUG || AH_REGOPS_FUNC */ + +#ifdef AH_ASSERT +void +ath_hal_assert_failed(const char* filename, int lineno, const char *msg) +{ + printf("Atheros HAL assertion failure: %s: line %u: %s\n", + filename, lineno, msg); + panic("ath_hal_assert"); +} +#endif /* AH_ASSERT */ + +/* + * Delay n microseconds. + */ +void +ath_hal_delay(int n) +{ + DELAY(n); +} + +u_int32_t +ath_hal_getuptime(struct ath_hal *ah) +{ + struct bintime bt; + getbinuptime(&bt); + return (bt.sec * 1000) + + (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32); +} + +void +ath_hal_memzero(void *dst, size_t n) +{ + bzero(dst, n); +} + +void * +ath_hal_memcpy(void *dst, const void *src, size_t n) +{ + return memcpy(dst, src, n); +} + +/* + * Module glue. + */ + +static int +ath_hal_modevent(module_t mod, int type, void *unused) +{ + const char *sep; + int i; + + switch (type) { + case MOD_LOAD: + printf("ath_hal: %s (", ath_hal_version); + sep = ""; + for (i = 0; ath_hal_buildopts[i] != NULL; i++) { + printf("%s%s", sep, ath_hal_buildopts[i]); + sep = ", "; + } + printf(")\n"); + return 0; + case MOD_UNLOAD: + return 0; + } + return EINVAL; +} + +static moduledata_t ath_hal_mod = { + "ath_hal", + ath_hal_modevent, + 0 +}; +DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY); +MODULE_VERSION(ath_hal, 1); diff --git a/sys/dev/ath/ah_osdep.h b/sys/dev/ath/ah_osdep.h new file mode 100644 index 0000000..b856080 --- /dev/null +++ b/sys/dev/ath/ah_osdep.h @@ -0,0 +1,127 @@ +/*- + * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer, + * without modification. + * 2. Redistributions in binary form must reproduce at minimum a disclaimer + * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any + * redistribution must be conditioned upon including a substantially + * similar Disclaimer requirement for further binary redistribution. + * 3. Neither the names of the above-listed copyright holders nor the names + * of any contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL") version 2 as published by the Free + * Software Foundation. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY + * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGES. + * + * $FreeBSD$ + */ +#ifndef _ATH_AH_OSDEP_H_ +#define _ATH_AH_OSDEP_H_ +/* + * Atheros Hardware Access Layer (HAL) OS Dependent Definitions. + */ +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/endian.h> + +#include <machine/bus.h> + +/* + * Delay n microseconds. + */ +extern void ath_hal_delay(int); +#define OS_DELAY(_n) ath_hal_delay(_n) + +#define OS_INLINE __inline +#define OS_MEMZERO(_a, _n) ath_hal_memzero((_a), (_n)) +extern void ath_hal_memzero(void *, size_t); +#define OS_MEMCPY(_d, _s, _n) ath_hal_memcpy(_d,_s,_n) +extern void *ath_hal_memcpy(void *, const void *, size_t); + +#define abs(_a) __builtin_abs(_a) + +struct ath_hal; +extern u_int32_t ath_hal_getuptime(struct ath_hal *); +#define OS_GETUPTIME(_ah) ath_hal_getuptime(_ah) + +/* + * Register read/write operations are either handled through + * platform-dependent routines (or when debugging is enabled + * with AH_DEBUG); or they are inline expanded using the macros + * defined below. For public builds we inline expand only for + * platforms where it is certain what the requirements are to + * read/write registers--typically they are memory-mapped and + * no explicit synchronization or memory invalidation operations + * are required (e.g. i386). + */ +#if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ) +#define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val) +#define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg) + +extern void ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val); +extern u_int32_t ath_hal_reg_read(struct ath_hal *ah, u_int reg); +#else +/* + * The hardware registers are native little-endian byte order. + * Big-endian hosts are handled by enabling hardware byte-swap + * of register reads and writes at reset. But the PCI clock + * domain registers are not byte swapped! Thus, on big-endian + * platforms we have to explicitly byte-swap those registers. + * Most of this code is collapsed at compile time because the + * register values are constants. + */ +#define AH_LITTLE_ENDIAN 1234 +#define AH_BIG_ENDIAN 4321 + +#if _BYTE_ORDER == _BIG_ENDIAN +#define OS_REG_WRITE(_ah, _reg, _val) do { \ + if ( (_reg) >= 0x4000 && (_reg) < 0x5000) \ + bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \ + (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)); \ + else \ + bus_space_write_stream_4((bus_space_tag_t)(_ah)->ah_st, \ + (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)); \ +} while (0) +#define OS_REG_READ(_ah, _reg) \ + (((_reg) >= 0x4000 && (_reg) < 0x5000) ? \ + bus_space_read_4((bus_space_tag_t)(_ah)->ah_st, \ + (bus_space_handle_t)(_ah)->ah_sh, (_reg)) : \ + bus_space_read_stream_4((bus_space_tag_t)(_ah)->ah_st, \ + (bus_space_handle_t)(_ah)->ah_sh, (_reg))) +#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ +#define OS_REG_WRITE(_ah, _reg, _val) \ + bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \ + (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)) +#define OS_REG_READ(_ah, _reg) \ + bus_space_read_4((bus_space_tag_t)(_ah)->ah_st, \ + (bus_space_handle_t)(_ah)->ah_sh, (_reg)) +#endif /* _BYTE_ORDER */ +#endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */ + +#ifdef AH_DEBUG_ALQ +extern void OS_MARK(struct ath_hal *, u_int id, u_int32_t value); +#else +#define OS_MARK(_ah, _id, _v) +#endif + +#endif /* _ATH_AH_OSDEP_H_ */ diff --git a/sys/modules/ath/Makefile b/sys/modules/ath/Makefile index 9b6f3da..fdc0150 100644 --- a/sys/modules/ath/Makefile +++ b/sys/modules/ath/Makefile @@ -43,7 +43,7 @@ SRCS= if_ath.c if_ath_pci.c SRCS+= device_if.h bus_if.h pci_if.h opt_inet.h opt_ath.h HAL= ${.CURDIR}/../../contrib/dev/ath -CFLAGS+= -I. -I${HAL}/freebsd -I${HAL} +CFLAGS+= -I. -I${.CURDIR}/../../dev/ath -I${HAL} opt_ath.h: echo > $@ diff --git a/sys/modules/ath_hal/Makefile b/sys/modules/ath_hal/Makefile index 7324171..42837fc 100644 --- a/sys/modules/ath_hal/Makefile +++ b/sys/modules/ath_hal/Makefile @@ -44,18 +44,17 @@ # maintenance and isolate the bits that are not (currently) distributed # in source form. # -HAL= ${.CURDIR}/../../contrib/dev/ath +HAL?= ${.CURDIR}/../../contrib/dev/ath -.PATH: ${HAL}/freebsd +.PATH: ${.CURDIR}/../../dev/ath KMOD= ath_hal SRCS= ah_osdep.c -SRCS+= bus_if.h device_if.h pci_if.h ah_if.h opt_ah.h +SRCS+= bus_if.h device_if.h pci_if.h opt_ah.h OBJS= hal.o -MFILES= kern/bus_if.m kern/device_if.m dev/pci/pci_if.m \ - contrib/dev/ath/freebsd/ah_if.m +MFILES= kern/bus_if.m kern/device_if.m dev/pci/pci_if.m -CFLAGS+= -I. -I${HAL}/freebsd -I${HAL} +CFLAGS+= -I. -I${.CURDIR}/../../dev/ath -I${HAL} # patch for hal naming difference .if ${MACHINE_ARCH} == "amd64" @@ -68,14 +67,9 @@ ATH_MODULE_ARCH=powerpc-be ATH_MODULE_ARCH=${MACHINE_ARCH} .endif -.if defined(HAL_SRC) -.include "${HAL}/freebsd/Makefile.inc" -.else - hal.o: ${HAL}/public/${ATH_MODULE_ARCH}-elf.hal.o.uu uudecode -p < ${HAL}/public/${ATH_MODULE_ARCH}-elf.hal.o.uu > ${.TARGET} opt_ah.h: ${HAL}/public/${ATH_MODULE_ARCH}-elf.opt_ah.h cp ${HAL}/public/${ATH_MODULE_ARCH}-elf.opt_ah.h ${.TARGET} -.endif .include <bsd.kmod.mk> diff --git a/sys/modules/ath_rate_onoe/Makefile b/sys/modules/ath_rate_onoe/Makefile index b7a6732..bec7967 100644 --- a/sys/modules/ath_rate_onoe/Makefile +++ b/sys/modules/ath_rate_onoe/Makefile @@ -43,6 +43,6 @@ SRCS= onoe.c SRCS+= device_if.h bus_if.h pci_if.h opt_inet.h HAL= ${.CURDIR}/../../contrib/dev/ath -CFLAGS+= -I. -I${HAL}/freebsd -I${HAL} +CFLAGS+= -I. -I${.CURDIR}/../../dev/ath -I${HAL} .include <bsd.kmod.mk> diff --git a/sys/modules/ath_rate_sample/Makefile b/sys/modules/ath_rate_sample/Makefile index 51c3130..e7b8812 100644 --- a/sys/modules/ath_rate_sample/Makefile +++ b/sys/modules/ath_rate_sample/Makefile @@ -43,6 +43,6 @@ SRCS= sample.c SRCS+= device_if.h bus_if.h pci_if.h opt_inet.h HAL= ${.CURDIR}/../../contrib/dev/ath -CFLAGS+= -I. -I${HAL}/freebsd -I${HAL} +CFLAGS+= -I. -I${.CURDIR}/../../dev/ath -I${HAL} .include <bsd.kmod.mk> |