diff options
| author | mdodd <mdodd@FreeBSD.org> | 2000-07-18 06:37:08 +0000 |
|---|---|---|
| committer | mdodd <mdodd@FreeBSD.org> | 2000-07-18 06:37:08 +0000 |
| commit | 3c463952e14da2001587df0357914dc7215bf706 (patch) | |
| tree | d37b65b4ae8abedb6d19ec276b2d5e7327b21318 /sys | |
| parent | bf473790e8e393671834d726eb6fa54b64952a0f (diff) | |
| download | FreeBSD-src-3c463952e14da2001587df0357914dc7215bf706.zip FreeBSD-src-3c463952e14da2001587df0357914dc7215bf706.tar.gz | |
Properly detect ISA cards in EISA mode and skip them in the ISA identify
routine so that they will be picked up by the EISA front end.
PR: i386/2598
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/ep/if_ep_isa.c | 12 | ||||
| -rw-r--r-- | sys/dev/ep/if_epreg.h | 2 |
2 files changed, 12 insertions, 2 deletions
diff --git a/sys/dev/ep/if_ep_isa.c b/sys/dev/ep/if_ep_isa.c index a4e9ac6..6d4b973 100644 --- a/sys/dev/ep/if_ep_isa.c +++ b/sys/dev/ep/if_ep_isa.c @@ -221,11 +221,19 @@ ep_isa_identify (driver_t *driver, device_t parent) /* Retreive IOPORT */ data = get_eeprom_data(ELINK_ID_PORT, EEPROM_ADDR_CFG); #ifdef PC98 - ioport = (((data & 0x1f) * 0x100) + 0x40d0); + ioport = (((data & ADDR_CFG_MASK) * 0x100) + 0x40d0); #else - ioport = (((data & 0x1f) << 4) + 0x200); + ioport = (((data & ADDR_CFG_MASK) << 4) + 0x200); #endif + if ((data & ADDR_CFG_MASK) == ADDR_CFG_EISA) { + device_printf(parent, "if_ep: <%s> at port 0x%03x in EISA mode!\n", + desc, ioport); + /* Set the adaptor tag so that the next card can be found. */ + outb(ELINK_ID_PORT, tag--); + continue; + } + /* Test for an adapter with PnP support. */ data = get_eeprom_data(ELINK_ID_PORT, EEPROM_CAP); if (data == CAP_ISA) { diff --git a/sys/dev/ep/if_epreg.h b/sys/dev/ep/if_epreg.h index 5fa60aa..9fb95f5 100644 --- a/sys/dev/ep/if_epreg.h +++ b/sys/dev/ep/if_epreg.h @@ -99,6 +99,8 @@ #define EEPROM_MFG_PRODUCT 0x6 /* Product code */ #define EEPROM_MFG_ID 0x7 /* 0x6d50 */ #define EEPROM_ADDR_CFG 0x8 /* Base addr */ +# define ADDR_CFG_EISA 0x1f +# define ADDR_CFG_MASK 0x1f #define EEPROM_RESOURCE_CFG 0x9 /* IRQ. Bits 12-15 */ #define EEPROM_OEM_ADDR0 0xa #define EEPROM_OEM_ADDR1 0xb |
