diff options
author | phk <phk@FreeBSD.org> | 2005-02-07 08:19:53 +0000 |
---|---|---|
committer | phk <phk@FreeBSD.org> | 2005-02-07 08:19:53 +0000 |
commit | 275ba1001de21874b70d7b591cb872eac2624e60 (patch) | |
tree | b1a95d2dcefa37b7d37c260cb4255bc561b39320 /sys | |
parent | 2de4f1160913c125779b755b3259707ac583430c (diff) | |
download | FreeBSD-src-275ba1001de21874b70d7b591cb872eac2624e60.zip FreeBSD-src-275ba1001de21874b70d7b591cb872eac2624e60.tar.gz |
Add missing isa_dmatc() function.
This may or may not be correct, Only the pcii driver would notice and
it doesn't support PC98 yet.
Diffstat (limited to 'sys')
-rw-r--r-- | sys/pc98/cbus/cbus_dma.c | 19 | ||||
-rw-r--r-- | sys/pc98/pc98/isa_dma.c | 19 |
2 files changed, 24 insertions, 14 deletions
diff --git a/sys/pc98/cbus/cbus_dma.c b/sys/pc98/cbus/cbus_dma.c index 25f52f9..541185a 100644 --- a/sys/pc98/cbus/cbus_dma.c +++ b/sys/pc98/cbus/cbus_dma.c @@ -73,22 +73,17 @@ /* ** Register definitions for DMA controller 1 (channels 0..3): */ -#ifdef PC98 #define DMA1_CHN(c) (IO_DMA + (4*(c))) /* addr reg for channel c */ +#define DMA1_STATUS (IO_DMA + 0x10) /* status register */ #define DMA1_SMSK (IO_DMA + 0x14) /* single mask register */ #define DMA1_MODE (IO_DMA + 0x16) /* mode register */ #define DMA1_FFC (IO_DMA + 0x18) /* clear first/last FF */ -#else -#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ -#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ -#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ -#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ -#endif /* ** Register definitions for DMA controller 2 (channels 4..7): */ #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ +#define DMA2_STATUS (IO_DMA2 + 2*8) /* status register */ #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ @@ -560,6 +555,16 @@ isa_dmastatus(int chan) } /* + * Reached terminal count yet ? + */ +int +isa_dmatc(int chan) +{ + + return(inb(DMA1_STATUS) & (1 << chan)); +} + +/* * Stop a DMA transfer currently in progress. */ int diff --git a/sys/pc98/pc98/isa_dma.c b/sys/pc98/pc98/isa_dma.c index 25f52f9..541185a 100644 --- a/sys/pc98/pc98/isa_dma.c +++ b/sys/pc98/pc98/isa_dma.c @@ -73,22 +73,17 @@ /* ** Register definitions for DMA controller 1 (channels 0..3): */ -#ifdef PC98 #define DMA1_CHN(c) (IO_DMA + (4*(c))) /* addr reg for channel c */ +#define DMA1_STATUS (IO_DMA + 0x10) /* status register */ #define DMA1_SMSK (IO_DMA + 0x14) /* single mask register */ #define DMA1_MODE (IO_DMA + 0x16) /* mode register */ #define DMA1_FFC (IO_DMA + 0x18) /* clear first/last FF */ -#else -#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ -#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ -#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ -#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ -#endif /* ** Register definitions for DMA controller 2 (channels 4..7): */ #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ +#define DMA2_STATUS (IO_DMA2 + 2*8) /* status register */ #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ @@ -560,6 +555,16 @@ isa_dmastatus(int chan) } /* + * Reached terminal count yet ? + */ +int +isa_dmatc(int chan) +{ + + return(inb(DMA1_STATUS) & (1 << chan)); +} + +/* * Stop a DMA transfer currently in progress. */ int |