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| author | zbb <zbb@FreeBSD.org> | 2016-01-20 13:55:51 +0000 |
|---|---|---|
| committer | zbb <zbb@FreeBSD.org> | 2016-01-20 13:55:51 +0000 |
| commit | 182c23f7f549e3e0235a58d736ac2a6dcdff419c (patch) | |
| tree | 13b99bdca09448e61fe2116480d14caf80bce68e /sys | |
| parent | 62a64d80822c78bb8c3f944498450fc02507b001 (diff) | |
| download | FreeBSD-src-182c23f7f549e3e0235a58d736ac2a6dcdff419c.zip FreeBSD-src-182c23f7f549e3e0235a58d736ac2a6dcdff419c.tar.gz | |
Enable SCU unit for Armada38x
Valid SCU operation is necessary for SMP interoperability.
Initialization function armada38x_enable_scu() was added.
Reviewed by: andrew, ian
Obtained from: Semihalf
Sponsored by: Stormshield
Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Differential revision: https://reviews.freebsd.org/D4220
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/arm/mv/armada38x/armada38x.c | 23 | ||||
| -rw-r--r-- | sys/arm/mv/mv_machdep.c | 3 | ||||
| -rw-r--r-- | sys/arm/mv/mvreg.h | 13 |
3 files changed, 39 insertions, 0 deletions
diff --git a/sys/arm/mv/armada38x/armada38x.c b/sys/arm/mv/armada38x/armada38x.c index 1caccb0..7279ecc 100644 --- a/sys/arm/mv/armada38x/armada38x.c +++ b/sys/arm/mv/armada38x/armada38x.c @@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$"); #include <arm/mv/mvvar.h> int armada38x_win_set_iosync_barrier(void); +int armada38x_scu_enable(void); uint32_t get_tclk(void) @@ -78,3 +79,25 @@ armada38x_win_set_iosync_barrier(void) return (rv); } + +int +armada38x_scu_enable(void) +{ + bus_space_handle_t vaddr_scu; + int rv; + uint32_t val; + + rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_SCU_BASE, + MV_SCU_REGS_LEN, 0, &vaddr_scu); + if (rv != 0) + return (rv); + + /* Enable SCU */ + val = bus_space_read_4(fdtbus_bs_tag, vaddr_scu, MV_SCU_REG_CTRL); + if (!(val & MV_SCU_ENABLE)) + bus_space_write_4(fdtbus_bs_tag, vaddr_scu, 0, + val | MV_SCU_ENABLE); + + bus_space_unmap(fdtbus_bs_tag, vaddr_scu, MV_SCU_REGS_LEN); + return (0); +} diff --git a/sys/arm/mv/mv_machdep.c b/sys/arm/mv/mv_machdep.c index bdb67c6..c59ee7f 100644 --- a/sys/arm/mv/mv_machdep.c +++ b/sys/arm/mv/mv_machdep.c @@ -68,6 +68,7 @@ void armadaxp_l2_init(void); #endif #if defined(SOC_MV_ARMADA38X) int armada38x_win_set_iosync_barrier(void); +int armada38x_scu_enable(void); #endif #define MPP_PIN_MAX 68 @@ -257,6 +258,8 @@ platform_late_init(void) /* Set IO Sync Barrier bit for all Mbus devices */ if (armada38x_win_set_iosync_barrier() != 0) printf("WARNING: could not map CPU Subsystem registers\n"); + if (armada38x_scu_enable() != 0) + printf("WARNING: could not enable SCU\n"); #endif } diff --git a/sys/arm/mv/mvreg.h b/sys/arm/mv/mvreg.h index 7df6005..d49aa19 100644 --- a/sys/arm/mv/mvreg.h +++ b/sys/arm/mv/mvreg.h @@ -34,6 +34,8 @@ #ifndef _MVREG_H_ #define _MVREG_H_ +#include <arm/mv/mvwin.h> + #if defined(SOC_MV_DISCOVERY) #define IRQ_CAUSE_ERROR 0x0 #define IRQ_CAUSE 0x4 @@ -452,4 +454,15 @@ #define MV_DRBL_MASK(d,u) (0x10 * (u) + 0x8 * (d) + 0x4) #define MV_DRBL_MSG(m,d,u) (0x10 * (u) + 0x8 * (d) + 0x4 * (m) + 0x30) #endif + +/* + * SCU + */ +#if defined(SOC_MV_ARMADA38X) +#define MV_SCU_BASE (MV_BASE + 0xc000) +#define MV_SCU_REGS_LEN 0x100 +#define MV_SCU_REG_CTRL 0 +#define MV_SCU_ENABLE 1 +#endif + #endif /* _MVREG_H_ */ |
