KNF'ize.

14 files changed, 448 insertions, 419 deletions

diff --git a/sys/alpha/alpha/api_up1000.c b/sys/alpha/alpha/api_up1000.c
index cdd68a3..86218b1 100644
--- a/sys/alpha/alpha/api_up1000.c
+++ b/sys/alpha/alpha/api_up1000.c
@@ -125,5 +125,3 @@ api_up1000_cons_init()
 		    ctb->ctb_term_type);
 	}
 }
-
-
diff --git a/sys/alpha/alpha/dec_1000a.c b/sys/alpha/alpha/dec_1000a.c
index 9525b26..ba8b27f 100644
--- a/sys/alpha/alpha/dec_1000a.c
+++ b/sys/alpha/alpha/dec_1000a.c
@@ -43,17 +43,17 @@
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
- * 
+ *
  * Permission to use, copy, modify and distribute this software and
  * its documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
  *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
@@ -68,7 +68,7 @@
  * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center
  */
 /*
- * Additional Copyright (c) 1999 by Andrew Gallatin 
+ * Additional Copyright (c) 1999 by Andrew Gallatin
  *
  * $FreeBSD$
  */
@@ -163,7 +163,9 @@ dec_1000a_init(int cputype)
 	platform.cons_init = dec_1000a_cons_init;
 }
 
-extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */
+/* XXX for forcing comconsole when srm serial console is used */
+extern int comconsole;
+
 static void
 dec_1000a_cons_init()
 {
@@ -182,20 +184,20 @@ dec_1000a_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/* XXX */
 		{
 			/*
 			 * Delay to allow PROM putchars to complete.
 			 * FIFO depth * character time,
-			 * character time = (1000000 / (defaultrate / 10))
+			 * character time = (1000000 / (defaultrate / 10)).
 			 */
 			DELAY(160000000 / comcnrate);
 
-                        /* 
-                         * force a comconsole on com1 if the SRM has a serial
-			 * console
+                        /*
+                         * Force a comconsole on com1 if the SRM has a serial
+			 * console.
                          */
                         comconsole = 0;
 			if (siocnattach(0x3f8, comcnrate))
@@ -220,7 +222,7 @@ dec_1000a_cons_init()
 		printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot);
 
 		panic("consinit: unknown console type %d\n",
-		    (int) ctb->ctb_term_type);
+		    (int)ctb->ctb_term_type);
 	}
 }
 
@@ -229,8 +231,9 @@ static void
 dec_1000_intr_map(arg)
 	void *arg;
 {
-	pcicfgregs *cfg = (pcicfgregs *)arg;
+	pcicfgregs *cfg;
 
+	cfg = (pcicfgregs *)arg;
 	if (cfg->intpin == 0)	/* No IRQ used. */
 		return;
 	if (!(1 <= cfg->intpin && cfg->intpin <= 4))
@@ -251,26 +254,27 @@ dec_1000_intr_map(arg)
 		break;
 	}
 bad:	printf("dec_1000_intr_map: can't map dev %d pin %d\n",
-                cfg->slot, cfg->intpin);
+	    cfg->slot, cfg->intpin);
 }
 
 
 /*
  * Read and write the mystery ICU IMR registers
- * on the AlphaServer 1000
+ * on the AlphaServer 1000.
  */
 
 #define IR() 	inw(0x536)
 #define IW(x)	outw(0x536, (x))
 
 /*
- * Enable and disable interrupts at the ICU level
+ * Enable and disable interrupts at the ICU level.
  */
 
 static void
 dec_1000_intr_enable(irq)
 	int irq;
 {
+
 	IW(IR() | 1 << irq);
 }
 
@@ -278,6 +282,7 @@ static void
 dec_1000_intr_disable(irq)
 	int irq;
 {
+
 	IW(IR() & ~(1 << irq));
 }
 
@@ -285,19 +290,20 @@ dec_1000_intr_disable(irq)
 static void
 dec_1000_intr_init()
 {
-/*
- * Initialize mystery ICU
- */
+	/*
+ 	 * Initialize mystery ICU.
+ 	 */
 	IW(0);					/* XXX ?? */	
-/*
- * Enable cascade interrupt.
- */
+
+	/*
+ 	 * Enable cascade interrupt.
+ 	 */
 	dec_1000_intr_enable(2);
 }
 
 /*
  * Read and write the mystery ICU IMR registers
- * on the AlphaServer 1000a
+ * on the AlphaServer 1000a.
  */
 
 #define IRA(o) 		inw(0x54a + 2*(o))
@@ -305,15 +311,14 @@ dec_1000_intr_init()
 #define IMR2IRQ(bn) 	((bn) - 1)
 #define IRQ2IMR(irq) 	((irq) + 1)
 
-static void 
+static void
 dec_1000a_intr_map(arg)
 	void *arg;
 {
-	pcicfgregs *cfg = (pcicfgregs *)arg;
-	int device = cfg->slot;
-	int imrbit;
+	pcicfgregs *cfg;
+	int device, imrbit;
 	/*
-	 * Get bit number in mystery ICU imr
+	 * Get bit number in mystery ICU imr.
 	 */
 	static const signed char imrmap[][4] = {
 #		define	IRQSPLIT(o) { (o), (o)+1, (o)+16, (o)+16+1 }
@@ -335,6 +340,9 @@ dec_1000a_intr_map(arg)
 		/* 14  */ IRQSPLIT(8)		/* Corelle */
 	};
 
+	cfg = (pcicfgregs *)arg;
+	device = cfg->slot;
+
 	if (cfg->intpin == 0)	/* No IRQ used. */
 		return;
 	if (!(1 <= cfg->intpin && cfg->intpin <= 4))
@@ -347,7 +355,8 @@ dec_1000a_intr_map(arg)
 			return;
 		}
 	}
-bad:	printf("dec_1000a_intr_map: can't map dev %d pin %d\n", device, cfg->intpin);
+bad:	printf("dec_1000a_intr_map: can't map dev %d pin %d\n",
+	    device, cfg->intpin);
 }
 
 
@@ -357,20 +366,24 @@ static void
 dec_1000a_intr_enable(irq)
 	int irq;
 {
-	int imrval = IRQ2IMR(irq);
-	int i = imrval >= 16;
+	int imrval, i;
+
+	imrval = IRQ2IMR(irq);
+	i = imrval >= 16;
 
 	IWA(i, IRA(i) | 1 << (imrval & 0xf));
 }
 
 
 
-static void 
+static void
 dec_1000a_intr_disable(irq)
 	int irq;
 {
-	int imrval = IRQ2IMR(irq);
-	int i = imrval >= 16;
+	int imrval, i;
+
+	imrval = IRQ2IMR(irq);
+	i = imrval >= 16;
 
 	IWA(i, IRA(i) & ~(1 << (imrval & 0xf)));
 }
@@ -380,14 +393,13 @@ dec_1000a_intr_init()
 {
 
 /*
- * Initialize mystery ICU
+ * Initialize mystery ICU.
  */
+	IWA(0, IRA(0) & 1);
+	IWA(1, IRA(0) & 3);
 
-        IWA(0, IRA(0) & 1);
-        IWA(1, IRA(0) & 3);
 /*
  * Enable cascade interrupt.
- */	
+ */
 	dec_1000_intr_enable(2);
 }
-
diff --git a/sys/alpha/alpha/dec_2100_a50.c b/sys/alpha/alpha/dec_2100_a50.c
index f4e9e97..bafb34b 100644
--- a/sys/alpha/alpha/dec_2100_a50.c
+++ b/sys/alpha/alpha/dec_2100_a50.c
@@ -6,17 +6,17 @@
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
- * 
+ *
  * Permission to use, copy, modify and distribute this software and
  * its documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
  *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
@@ -31,7 +31,7 @@
  * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center
  */
 /*
- * Additional Copyright (c) 1998 by Andrew Gallatin for Duke University 
+ * Additional Copyright (c) 1998 by Andrew Gallatin for Duke University.
  */
 
 #include "opt_ddb.h"
@@ -51,17 +51,17 @@
 
 #include "sio.h"
 #include "sc.h"
-#ifndef CONSPEED
-#define CONSPEED TTYDEF_SPEED
+#ifndef	CONSPEED
+#define	CONSPEED TTYDEF_SPEED
 #endif
 static int comcnrate = CONSPEED;
 
 void dec_2100_a50_init __P((void));
 static void dec_2100_a50_cons_init __P((void));
 static void dec_2100_a50_intr_map  __P((void *));
-void            sio_intr_establish __P((int));
-void            sio_intr_disestablish __P((int));
-void            sio_intr_setup __P((void));
+void sio_intr_establish __P((int));
+void sio_intr_disestablish __P((int));
+void sio_intr_setup __P((void));
 
 extern int siocnattach __P((int, int));
 extern int siogdbattach __P((int, int));
@@ -100,7 +100,8 @@ dec_2100_a50_init()
 	platform.pci_intr_map  = dec_2100_a50_intr_map;
 }
 
-extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */
+/* XXX for forcing comconsole when srm serial console is used */
+extern int comconsole;
 
 static void
 dec_2100_a50_cons_init()
@@ -115,18 +116,18 @@ dec_2100_a50_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/* XXX */
 		{
 			/*
 			 * Delay to allow PROM putchars to complete.
 			 * FIFO depth * character time,
-			 * character time = (1000000 / (defaultrate / 10))
+			 * character time = (1000000 / (defaultrate / 10)).
 			 */
 			DELAY(160000000 / comcnrate);
 			/*
-			 * force a comconsole on com1 if the SRM has a serial console
+			 * Force a comconsole on com1 if the SRM has a serial console.
 			 */
 			comconsole = 0;
 			if (siocnattach(0x3f8, comcnrate))
@@ -155,19 +156,22 @@ dec_2100_a50_cons_init()
 	}
 }
 
-#define        SIO_PCIREG_PIRQ_RTCTRL        0x60    /* PIRQ0 Route Control */
+#define	SIO_PCIREG_PIRQ_RTCTRL	0x60    /* PIRQ0 Route Control */
 
 void
 dec_2100_a50_intr_map(void *arg)
 {
 	u_int8_t pirqline;
 	u_int32_t pirqreg;
-	int pirq=0;  /* gcc -Wuninitialized XXX */
-	pcicfgregs *cfg = (pcicfgregs *)arg;
+	int pirq;
+	pcicfgregs *cfg;
 
-        /*
-         * Slot->interrupt translation.  Taken from NetBSD 
-         */
+	pirq = 0;  /* gcc -Wuninitialized XXX */
+	cfg = (pcicfgregs *)arg;
+
+	/*
+	 * Slot->interrupt translation.  Taken from NetBSD.
+	 */
 
 	if(cfg->intpin == 0)
 		return;
@@ -176,13 +180,13 @@ dec_2100_a50_intr_map(void *arg)
 		panic("dec_2100_a50_intr_map: bad intpin %d",cfg->intpin);
 
 	switch (cfg->slot) {
-        case 6:                                 /*  NCR SCSI */
-                pirq = 3;
-                break;
+	case 6:					/*  NCR SCSI */
+		pirq = 3;
+		break;
 
-        case 11:                                /* slot 1 */
-        case 14:                                /* slot 3 */
-		switch(cfg->intpin){
+	case 11:				/* slot 1 */
+	case 14:				/* slot 3 */
+		switch(cfg->intpin) {
 		case 1:
 		case 4:
 			pirq = 0;
@@ -193,60 +197,61 @@ dec_2100_a50_intr_map(void *arg)
 		case 3:
 			pirq = 1;
 			break;
-                default:                        
-                        panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
-                           cfg->intpin);
+		default:
+			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
+			    cfg->intpin);
 
 		}
-                break;
-        case 12:                                /* slot 2 */
-                switch (cfg->intpin) {
-                case 1:
-                case 4:
-                        pirq = 1;
-                        break;
-                case 2:
-                        pirq = 0;
-                        break;
-                case 3:
-                        pirq = 2;
-                        break;
-                default:      
-                        panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
-                            cfg->intpin);
-
-                };
-                break;
-
-        case 13:                                /* slot 3 */
-                switch (cfg->intpin) {
-                case 1:
-                case 4:
-                        pirq = 2;
-                        break;
-                case 2:
-                        pirq = 1;
-                        break;
-                case 3:
-                        pirq = 0;
-                        break;
+		break;
+	case 12:				/* slot 2 */
+		switch (cfg->intpin) {
+		case 1:
+		case 4:
+			pirq = 1;
+			break;
+		case 2:
+			pirq = 0;
+			break;
+		case 3:
+			pirq = 2;
+			break;
+		default:
+			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
+			    cfg->intpin);
+
+		};
+		break;
+
+	case 13:				/* slot 3 */
+		switch (cfg->intpin) {
+		case 1:
+		case 4:
+			pirq = 2;
+			break;
+		case 2:
+			pirq = 1;
+			break;
+		case 3:
+			pirq = 0;
+			break;
 		};
 		break;
-        default:
-                printf("dec_2100_a50_intr_map: weird slot %d\n",
-                    cfg->slot);
-/*                return;*/
+default:
+		printf("dec_2100_a50_intr_map: weird slot %d\n",
+		    cfg->slot);
+
+		/* return; */
         }
 
-	/* 
-	 *  read the SIO IRQ routing register to determine where the
-	 *  interrupt will actually be routed.  Thank you, NetBSD
+	/*
+	 *  Read the SIO IRQ routing register to determine where the
+	 *  interrupt will actually be routed.  Thank you, NetBSD.
 	 */
-	   
+
 	pirqreg = chipset.cfgreadl(0, 0, 7, 0, SIO_PCIREG_PIRQ_RTCTRL);
 	pirqline = (pirqreg >> (pirq * 8)) & 0xff;
 	if ((pirqline & 0x80) != 0)
 		panic("bad pirqline %d",pirqline);
-        pirqline &= 0xf;
+	pirqline &= 0xf;
 	cfg->intline = pirqline;
 }
diff --git a/sys/alpha/alpha/dec_2100_a500.c b/sys/alpha/alpha/dec_2100_a500.c
index 6e66d75..e8c92a3 100644
--- a/sys/alpha/alpha/dec_2100_a500.c
+++ b/sys/alpha/alpha/dec_2100_a500.c
@@ -43,8 +43,8 @@
 
 #include "sio.h"
 #include "sc.h"
-#ifndef CONSPEED
-#define CONSPEED TTYDEF_SPEED
+#ifndef	CONSPEED
+#define	CONSPEED TTYDEF_SPEED
 #endif
 static int comcnrate = CONSPEED;
 
@@ -62,95 +62,95 @@ extern vm_offset_t t2_csr_base;
 void
 dec_2100_a500_init(cputype)
 {
-
-    /* 
-     * see if we're a Sable or a Lynx
-     */
-    if (cputype == ST_DEC_2100_A500) {
-	    t2_csr_base = SABLE_BASE;
-	    platform.family = "DEC AlphaServer 2100";
-    } else if (cputype == ST_DEC_2100A_A500) {
-	    t2_csr_base = LYNX_BASE;
-    	    platform.family = "DEC AlphaServer 2100A";
-    } else {
-	    t2_csr_base = SABLE_BASE;
-	    platform.family = "DEC AlphaServer 2100?????";
-    }
-
-
-    if ((platform.model = alpha_dsr_sysname()) == NULL) {
-	     platform.model = alpha_unknown_sysname();
-    }
-
-    platform.iobus = "t2";
-    platform.cons_init = dec_2100_a500_cons_init;
-    platform.pci_intr_map = dec_2100_a500_intr_map;
-    platform.pci_intr_init = dec_2100_a500_intr_init;
-
-
-    t2_init();
+	/*
+	 * See if we're a `Sable' or a `Lynx'.
+	 */
+	if (cputype == ST_DEC_2100_A500) {
+		t2_csr_base = SABLE_BASE;
+		platform.family = "DEC AlphaServer 2100";
+	} else if (cputype == ST_DEC_2100A_A500) {
+		t2_csr_base = LYNX_BASE;
+		platform.family = "DEC AlphaServer 2100A";
+	} else {
+		t2_csr_base = SABLE_BASE;
+		platform.family = "DEC AlphaServer 2100?????";
+	}
+
+	if ((platform.model = alpha_dsr_sysname()) == NULL) {
+		platform.model = alpha_unknown_sysname();
+	}
+
+	platform.iobus = "t2";
+	platform.cons_init = dec_2100_a500_cons_init;
+	platform.pci_intr_map = dec_2100_a500_intr_map;
+	platform.pci_intr_init = dec_2100_a500_intr_init;
+
+	t2_init();
 }
 
-extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */
+/* XXX for forcing comconsole when srm serial console is used */
+extern int comconsole; 
 
 static void
 dec_2100_a500_cons_init()
 {
-    struct ctb *ctb;
-    t2_init();
+	struct ctb *ctb;
+	t2_init();
 
 #ifdef DDB
-    siogdbattach(0x2f8, 9600);
+	siogdbattach(0x2f8, 9600);
 #endif
-    ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
-
-    switch (ctb->ctb_term_type) {
-    case 2: 
-	/* serial console ... */
-	/* XXX */
-	/*
-	 * Delay to allow PROM putchars to complete.
-	 * FIFO depth * character time,
-	 * character time = (1000000 / (defaultrate / 10))
-	 */
-	DELAY(160000000 / comcnrate);
-	/*
-	 * force a comconsole on com1 if the SRM has a serial console
-	 */
-	comconsole = 0;
-	if (siocnattach(0x3f8, comcnrate))
-	    panic("can't init serial console");
-
-	boothowto |= RB_SERIAL;
-	break;
-
-    case 3:
-	/* display console ... */
-	/* XXX */
+	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
+
+	switch (ctb->ctb_term_type) {
+	case 2:
+		/* serial console ... */
+		/* XXX */
+		/*
+		 * Delay to allow PROM putchars to complete.
+		 * FIFO depth * character time,
+		 * character time = (1000000 / (defaultrate / 10))
+		 */
+		DELAY(160000000 / comcnrate);
+		/*
+		 * force a comconsole on com1 if the SRM has a serial console
+		 */
+		comconsole = 0;
+		if (siocnattach(0x3f8, comcnrate))
+			panic("can't init serial console");
+
+		boothowto |= RB_SERIAL;
+		break;
+
+	case 3:
+		/* display console ... */
+		/* XXX */
 #if NSC > 0
-	sccnattach();
+		sccnattach();
 #else
-	panic("not configured to use display && keyboard console");
+		panic("not configured to use display && keyboard console");
 #endif
-	break;
+		break;
 
-    default:
-	printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type);
-	panic("consinit: unknown console type");
-    }
+	default:
+		printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type);
+		panic("consinit: unknown console type");
+	}
 }
 
 void
 dec_2100_a500_intr_map(void *arg)
 {
-    pcicfgregs *cfg = (pcicfgregs *)arg;
+	pcicfgregs *cfg;
 
-    cfg->intline += 32;
+	cfg = (pcicfgregs *)arg;
+	cfg->intline += 32;
 }
 
 void
 dec_2100_a500_intr_init(void )
 {
+
 	outb(SLAVE0_ICU, 0);
 	outb(SLAVE1_ICU, 0);
 	outb(SLAVE2_ICU, 0);
diff --git a/sys/alpha/alpha/dec_3000_300.c b/sys/alpha/alpha/dec_3000_300.c
index f135560..469eee0 100644
--- a/sys/alpha/alpha/dec_3000_300.c
+++ b/sys/alpha/alpha/dec_3000_300.c
@@ -46,10 +46,10 @@ void dec_3000_300_init(int);
 static void dec_3000_300_cons_init(void);
 
 static const struct alpha_variation_table dec_3000_300_variations[] = {
-        { SV_ST_PELICAN, "DEC 3000/300 (\"Pelican\")" },
-        { SV_ST_PELICA, "DEC 3000/300L (\"Pelica\")" },
-        { SV_ST_PELICANPLUS, "DEC 3000/300X (\"Pelican+\")" },
-        { SV_ST_PELICAPLUS, "DEC 3000/300LX (\"Pelica+\")" },
+	{ SV_ST_PELICAN, "DEC 3000/300 (\"Pelican\")" },
+	{ SV_ST_PELICA, "DEC 3000/300L (\"Pelica\")" },
+	{ SV_ST_PELICANPLUS, "DEC 3000/300X (\"Pelican+\")" },
+	{ SV_ST_PELICAPLUS, "DEC 3000/300LX (\"Pelica+\")" },
 	{ 0, NULL },
 };
 
@@ -78,5 +78,6 @@ dec_3000_300_init(int cputype)
 static void
 dec_3000_300_cons_init(void)
 {
+
 	return;
 }
diff --git a/sys/alpha/alpha/dec_3000_500.c b/sys/alpha/alpha/dec_3000_500.c
index e4f68bf..c9b8d1d 100644
--- a/sys/alpha/alpha/dec_3000_500.c
+++ b/sys/alpha/alpha/dec_3000_500.c
@@ -49,14 +49,14 @@ static const char dec_3000_500_sp[] = "DEC 3000/400 (\"Sandpiper\")";
 static const char dec_3000_500_sf[] = "DEC 3000/500 (\"Flamingo\")";
 
 const struct alpha_variation_table dec_3000_500_variations[] = {
-        { SV_ST_SANDPIPER, dec_3000_500_sp },
-        { SV_ST_FLAMINGO, dec_3000_500_sf },
-        { SV_ST_HOTPINK, "DEC 3000/500X (\"Hot Pink\")" },
-        { SV_ST_FLAMINGOPLUS, "DEC 3000/800 (\"Flamingo+\")" },
-        { SV_ST_SANDPLUS, "DEC 3000/600 (\"Sandpiper+\")" },
-        { SV_ST_SANDPIPER45, "DEC 3000/700 (\"Sandpiper45\")" },
-        { SV_ST_FLAMINGO45, "DEC 3000/900 (\"Flamingo45\")" },
-        { 0, NULL },
+	{ SV_ST_SANDPIPER, dec_3000_500_sp },
+	{ SV_ST_FLAMINGO, dec_3000_500_sf },
+	{ SV_ST_HOTPINK, "DEC 3000/500X (\"Hot Pink\")" },
+	{ SV_ST_FLAMINGOPLUS, "DEC 3000/800 (\"Flamingo+\")" },
+	{ SV_ST_SANDPLUS, "DEC 3000/600 (\"Sandpiper+\")" },
+	{ SV_ST_SANDPIPER45, "DEC 3000/700 (\"Sandpiper45\")" },
+	{ SV_ST_FLAMINGO45, "DEC 3000/900 (\"Flamingo45\")" },
+	{ 0, NULL },
 };
 
 void
@@ -66,26 +66,26 @@ dec_3000_500_init(int cputype)
 
 	platform.family = "DEC 3000/500 (\"Flamingo\")";
 
-        if ((platform.model = alpha_dsr_sysname()) == NULL) {
-                variation = hwrpb->rpb_variation & SV_ST_MASK;
-                if (variation == SV_ST_ULTRA) {
-                        /* These are really the same. */
-                        variation = SV_ST_FLAMINGOPLUS;
-                }
-                if ((platform.model = alpha_variation_name(variation,
-                    dec_3000_500_variations)) == NULL) {
-                        /*
-                         * This is how things used to be done.
-                         */
-                        if (variation == SV_ST_RESERVED) {
-                                if (hwrpb->rpb_variation & SV_GRAPHICS)
-                                        platform.model = dec_3000_500_sf;
-                                else
-                                        platform.model = dec_3000_500_sp;
-                        } else
-                                platform.model = alpha_unknown_sysname();
-                }
-        }
+	if ((platform.model = alpha_dsr_sysname()) == NULL) {
+		variation = hwrpb->rpb_variation & SV_ST_MASK;
+		if (variation == SV_ST_ULTRA) {
+			/* These are really the same. */
+			variation = SV_ST_FLAMINGOPLUS;
+		}
+		if ((platform.model = alpha_variation_name(variation,
+		    dec_3000_500_variations)) == NULL) {
+			/*
+			 * This is how things used to be done.
+			 */
+			if (variation == SV_ST_RESERVED) {
+				if (hwrpb->rpb_variation & SV_GRAPHICS)
+					platform.model = dec_3000_500_sf;
+				else
+					platform.model = dec_3000_500_sp;
+			} else
+				platform.model = alpha_unknown_sysname();
+		}
+	}
 
 	platform.iobus = "tcasic";
 	platform.cons_init = dec_3000_500_cons_init;
@@ -98,5 +98,6 @@ dec_3000_500_init(int cputype)
 static void
 dec_3000_500_cons_init(void)
 {
+
 	return;
 }
diff --git a/sys/alpha/alpha/dec_axppci_33.c b/sys/alpha/alpha/dec_axppci_33.c
index f212f5c..54984a8 100644
--- a/sys/alpha/alpha/dec_axppci_33.c
+++ b/sys/alpha/alpha/dec_axppci_33.c
@@ -6,17 +6,17 @@
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
- * 
+ *
  * Permission to use, copy, modify and distribute this software and
  * its documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
  *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
@@ -47,8 +47,8 @@
 
 #include "sio.h"
 #include "sc.h"
-#ifndef CONSPEED
-#define CONSPEED TTYDEF_SPEED
+#ifndef	CONSPEED
+#define	CONSPEED TTYDEF_SPEED
 #endif
 static int comcnrate = CONSPEED;
 
@@ -65,15 +65,15 @@ const struct alpha_variation_table dec_axppci_33_variations[] = {
 	{ 0, NULL },
 };
 
-#define	NSIO_PORT  0x26e	/* Hardware enabled option: 0x398 */
-#define	NSIO_BASE  0
-#define	NSIO_INDEX NSIO_BASE
-#define	NSIO_DATA  1
-#define	NSIO_SIZE  2
-#define	NSIO_CFG0  0
-#define	NSIO_CFG1  1
-#define	NSIO_CFG2  2
-#define	NSIO_IDE_ENABLE 0x40
+#define	NSIO_PORT	0x26e	/* Hardware enabled option: 0x398 */
+#define	NSIO_BASE	0
+#define	NSIO_INDEX	NSIO_BASE
+#define	NSIO_DATA	1
+#define	NSIO_SIZE	2
+#define	NSIO_CFG0	0
+#define	NSIO_CFG1	1
+#define	NSIO_CFG2	2
+#define	NSIO_IDE_ENABLE	0x40
 
 void
 dec_axppci_33_init()
@@ -109,7 +109,8 @@ dec_axppci_33_init()
 	outb(NSIO_PORT + NSIO_DATA, cfg0val);
 }
 
-extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */
+/* XXX for forcing comconsole when srm serial console is used */
+extern int comconsole;
 
 static void
 dec_axppci_33_cons_init()
@@ -124,7 +125,7 @@ dec_axppci_33_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/* XXX */
 		{
@@ -163,23 +164,25 @@ dec_axppci_33_cons_init()
 	}
 }
 
-#define        SIO_PCIREG_PIRQ_RTCTRL        0x60    /* PIRQ0 Route Control */
+#define	SIO_PCIREG_PIRQ_RTCTRL	0x60	/* PIRQ0 Route Control */
 
 void
 dec_axppci_33_intr_map(void *arg)
 {
-	pcicfgregs *cfg = (pcicfgregs *)arg;
+	pcicfgregs *cfg;
 	int pirq;
 	u_int32_t pirqreg;
 	u_int8_t pirqline;
 
+	cfg = (pcicfgregs *)arg;
+
 #ifndef DIAGNOSTIC
 	pirq = 0;				/* XXX gcc -Wuninitialized */
 #endif
 
-        /*
-         * Slot->interrupt translation.  Taken from NetBSD 
-         */
+	/*
+	 * Slot->interrupt translation.  Taken from NetBSD.
+	 */
 
 	if (cfg->intpin == 0) {
 		/* No IRQ used. */
@@ -187,7 +190,7 @@ dec_axppci_33_intr_map(void *arg)
 	}
 	if (cfg->intpin > 4) {
 		printf("dec_axppci_33_intr_map: bad interrupt pin %d\n",
-		       cfg->intpin);
+		    cfg->intpin);
 		return;
 	}
 
@@ -257,9 +260,9 @@ dec_axppci_33_intr_map(void *arg)
 		break;
 
 	default:
-                printf("dec_axppci_33_intr_map: weird device number %d\n",
+		printf("dec_axppci_33_intr_map: weird device number %d\n",
 		    cfg->slot);
-                return;
+		return;
 	}
 
 	pirqreg = chipset.cfgreadl(0, 0, 7, 0, SIO_PCIREG_PIRQ_RTCTRL);
diff --git a/sys/alpha/alpha/dec_eb164.c b/sys/alpha/alpha/dec_eb164.c
index 4293d37..e1efa03 100644
--- a/sys/alpha/alpha/dec_eb164.c
+++ b/sys/alpha/alpha/dec_eb164.c
@@ -6,17 +6,17 @@
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
- * 
+ *
  * Permission to use, copy, modify and distribute this software and
  * its documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
  *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
@@ -47,8 +47,8 @@
 #include "sio.h"
 #include "sc.h"
 
-#ifndef CONSPEED
-#define CONSPEED TTYDEF_SPEED
+#ifndef	CONSPEED
+#define	CONSPEED TTYDEF_SPEED
 #endif
 static int comcnrate = CONSPEED;
 
@@ -95,7 +95,7 @@ dec_eb164_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/* XXX */
 		{
@@ -106,11 +106,11 @@ dec_eb164_cons_init()
 			 */
 			DELAY(160000000 / comcnrate);
 
-                        /* 
-                         * force a comconsole on com1 if the SRM has a serial
-			 * console
-                         */
-                        comconsole = 0;
+			/*
+			 * Force a comconsole on com1 if the SRM has a serial
+			 * console.
+			 */
+			comconsole = 0;
 			if (siocnattach(0x3f8, comcnrate))
 				panic("can't init serial console");
 
@@ -133,7 +133,7 @@ dec_eb164_cons_init()
 		printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot);
 
 		panic("consinit: unknown console type %d\n",
-		    (int) ctb->ctb_term_type);
+		    (int)ctb->ctb_term_type);
 	}
 }
 
diff --git a/sys/alpha/alpha/dec_eb64plus.c b/sys/alpha/alpha/dec_eb64plus.c
index 6b20153..fd68f5d 100644
--- a/sys/alpha/alpha/dec_eb64plus.c
+++ b/sys/alpha/alpha/dec_eb64plus.c
@@ -5,17 +5,17 @@
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
- * 
+ *
  * Permission to use, copy, modify and distribute this software and
  * its documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
  *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
@@ -30,13 +30,13 @@
  * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center
  */
 
-/* 
- * Port to based on NetBSD/axp by Wilko Bulte <wilko@freebsd.org> 
- * FreeBSD version based on: 
+/*
+ * Port to based on NetBSD/axp by Wilko Bulte <wilko@freebsd.org>
+ * FreeBSD version based on:
  *     NetBSD: dec_eb64plus.c,v 1.15 1998/11/19 02:20:07 ross Exp
  *
  * Some info on the Aspen Alpine as this might be hard to come by:
- * - Hardware is close enough to the DEC EB64+ design to allow it to run 
+ * - Hardware is close enough to the DEC EB64+ design to allow it to run
  *   the EB64+ SRM console f/w
  * - 3 PCI slots, closest to the SIMMs: Alpine calls this slot C
  *                the middle one Alpine calls this slot B
@@ -68,8 +68,8 @@
 #include "sio.h"
 #include "sc.h"
 
-#ifndef CONSPEED
-#define CONSPEED TTYDEF_SPEED
+#ifndef	CONSPEED
+#define	CONSPEED TTYDEF_SPEED
 #endif
 static int comcnrate = CONSPEED;
 
@@ -116,7 +116,9 @@ dec_eb64plus_init()
 
 }
 
-extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */
+/* XXX for forcing comconsole when srm serial console is used */
+extern int comconsole;
+
 /* init the console, serial or graphics */
 static void
 dec_eb64plus_cons_init()
@@ -128,7 +130,7 @@ dec_eb64plus_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/* XXX */
 		{
@@ -139,13 +141,13 @@ dec_eb64plus_cons_init()
 			 */
 			DELAY(160000000 / comcnrate);
 
-                        /* 
-                         * force a comconsole on com1 if the SRM has a serial
-			 * console
-                         */
+			/*
+			 * force a comconsole on com1 if the SRM has a serial
+			 * console.
+			 */
 			comconsole = 0;
 			if (siocnattach(0x3f8, comcnrate))
-                                panic("can't init serial console");
+				panic("can't init serial console");
 
 			boothowto |= RB_SERIAL;
 			break;
@@ -169,19 +171,19 @@ dec_eb64plus_cons_init()
 	}
 }
 
-/* 
+/*
  * The SRM console may have left some some interrupts enabled.
  */
 static void 	
 dec_eb64plus_intr_init()
 {
-    int i;          
+	int i;
 
-    /* disable all PCI interrupts */
-    for(i = 0; i <= 32; i++) 	/* 32 ?? NetBSD sez so */
-    	eb64plus_intr_disable(i); 
+	/* disable all PCI interrupts */
+	for(i = 0; i <= 32; i++) 	/* 32 ?? NetBSD sez so */
+		eb64plus_intr_disable(i);
 
-     /* Enable ISA-PCI cascade interrupt */ 
-    eb64plus_intr_enable(4);
+	/* Enable ISA-PCI cascade interrupt */
+	eb64plus_intr_enable(4);
 
 }
diff --git a/sys/alpha/alpha/dec_kn20aa.c b/sys/alpha/alpha/dec_kn20aa.c
index ff2c6cb..9151be6 100644
--- a/sys/alpha/alpha/dec_kn20aa.c
+++ b/sys/alpha/alpha/dec_kn20aa.c
@@ -6,17 +6,17 @@
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
- * 
+ *
  * Permission to use, copy, modify and distribute this software and
  * its documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
  *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
@@ -49,8 +49,8 @@
 #include "sio.h"
 #include "sc.h"
 
-#ifndef CONSPEED
-#define CONSPEED TTYDEF_SPEED
+#ifndef	CONSPEED
+#define	CONSPEED TTYDEF_SPEED
 #endif
 static int comcnrate = CONSPEED;
 
@@ -110,7 +110,7 @@ dec_kn20aa_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/* XXX */
 		{
@@ -269,87 +269,89 @@ dec_kn20aa_device_register(dev, aux)
 void
 dec_kn20aa_intr_init()
 {
-    /*
-     * Enable ISA-PCI cascade interrupt.
-     */
-    dec_kn20aa_intr_enable(31);
+
+	/*
+	 * Enable ISA-PCI cascade interrupt.
+	 */
+	dec_kn20aa_intr_enable(31);
 }
 
 void
 dec_kn20aa_intr_map(void *arg)
 {
-	pcicfgregs *cfg = (pcicfgregs *)arg;
-        /*
-         * Slot->interrupt translation.  Appears to work, though it
-         * may not hold up forever.
-         *
-         * The DEC engineers who did this hardware obviously engaged
-         * in random drug testing.
-         */
+	pcicfgregs *cfg;
+
+	cfg = (pcicfgregs *)arg;
+	/*
+	 * Slot->interrupt translation.  Appears to work, though it
+	 * may not hold up forever.
+	 *
+	 * The DEC engineers who did this hardware obviously engaged
+	 * in random drug testing.
+	 */
 	switch (cfg->slot) {
-        case 11:
-        case 12:
-                cfg->intline = ((cfg->slot - 11) + 0) * 4;
-                break;
+	case 11:
+	case 12:
+		cfg->intline = ((cfg->slot - 11) + 0) * 4;
+		break;
 
-        case 7:
-                cfg->intline = 8;
-                break;
+	case 7:
+		cfg->intline = 8;
+		break;
 
-        case 9:
-                cfg->intline = 12;
-                break;
+	case 9:
+		cfg->intline = 12;
+		break;
 
-        case 6:                                 /* 21040 on AlphaStation 500 */
-                cfg->intline = 13;
-                break;
+	case 6:				/* 21040 on AlphaStation 500 */
+		cfg->intline = 13;
+		break;
 
-        case 8:
-                cfg->intline = 16;
-                break;
+	case 8:
+		cfg->intline = 16;
+		break;
 
-	case 10:                                /* 8275EB on AlphaStation 500 */
+	case 10:			/* 8275EB on AlphaStation 500 */
 		return;
 
-        default:
+	default:
 		if(!cfg->bus){
 			printf("dec_kn20aa_intr_map: weird slot %d\n",
-			       cfg->slot);
+			    cfg->slot);
 			return;
 		} else {
 			cfg->intline = cfg->slot;
 		}
-        }
-	
-        cfg->intline += cfg->bus*16;
-        if (cfg->intline > KN20AA_MAX_IRQ)
-                panic("dec_kn20aa_intr_map: cfg->intline too large (%d)\n",
-                    cfg->intline);
+	}
 
+	cfg->intline += cfg->bus*16;
+	if (cfg->intline > KN20AA_MAX_IRQ)
+		panic("dec_kn20aa_intr_map: cfg->intline too large (%d)\n",
+		    cfg->intline);
 }
 
 void
 dec_kn20aa_intr_enable(irq)
-        int irq;
+	int irq;
 {
 
-        /*
-         * From disassembling small bits of the OSF/1 kernel:
-         * the following appears to enable a given interrupt request.
-         * "blech."  I'd give valuable body parts for better docs or
-         * for a good decompiler.
-         */
-        alpha_mb();
-        REGVAL(0x8780000000L + 0x40L) |= (1 << irq);    /* XXX */
-        alpha_mb();
+	/*
+	 * From disassembling small bits of the OSF/1 kernel:
+	 * the following appears to enable a given interrupt request.
+	 * "blech."  I'd give valuable body parts for better docs or
+	 * for a good decompiler.
+	 */
+	alpha_mb();
+	REGVAL(0x8780000000L + 0x40L) |= (1 << irq);    /* XXX */
+	alpha_mb();
 }
 
 void
 dec_kn20aa_intr_disable(irq)
-        int irq;
+	int irq;
 {
 
-        alpha_mb();
-        REGVAL(0x8780000000L + 0x40L) &= ~(1 << irq);   /* XXX */
-        alpha_mb();
+	alpha_mb();
+	REGVAL(0x8780000000L + 0x40L) &= ~(1 << irq);   /* XXX */
+	alpha_mb();
 }
diff --git a/sys/alpha/alpha/dec_kn300.c b/sys/alpha/alpha/dec_kn300.c
index 9c31662..eabe4e0 100644
--- a/sys/alpha/alpha/dec_kn300.c
+++ b/sys/alpha/alpha/dec_kn300.c
@@ -113,7 +113,7 @@ dec_kn300_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/*
 		 * Delay to allow PROM putchars to complete.
diff --git a/sys/alpha/alpha/dec_kn8ae.c b/sys/alpha/alpha/dec_kn8ae.c
index e31cba1a..77656ce 100644
--- a/sys/alpha/alpha/dec_kn8ae.c
+++ b/sys/alpha/alpha/dec_kn8ae.c
@@ -84,6 +84,7 @@ dec_kn8ae_init(int cputype)
 static void
 dec_kn8ae_cons_init(void)
 {
+
 	boothowto |= RB_SERIAL;
 	zs_cnattach(TLSB_GBUS_BASE, GBUS_DUART0_OFFSET);
 }
diff --git a/sys/alpha/alpha/dec_st550.c b/sys/alpha/alpha/dec_st550.c
index b1a3167..cb341b1 100644
--- a/sys/alpha/alpha/dec_st550.c
+++ b/sys/alpha/alpha/dec_st550.c
@@ -4,17 +4,17 @@
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
- * 
+ *
  * Permission to use, copy, modify and distribute this software and
  * its documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
  *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
@@ -55,8 +55,8 @@
 #include "sio.h"
 #include "sc.h"
 
-#ifndef CONSPEED
-#define CONSPEED TTYDEF_SPEED
+#ifndef	CONSPEED
+#define	CONSPEED TTYDEF_SPEED
 #endif
 static int comcnrate = CONSPEED;
 
@@ -78,6 +78,7 @@ extern int sccnattach __P((void));
 void
 st550_init()
 {
+
 	platform.family = "Digital Personal Workstation (Miata)";
 
 	if ((platform.model = alpha_dsr_sysname()) == NULL) {
@@ -109,23 +110,21 @@ st550_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/* XXX */
-		{
-			/*
-			 * Delay to allow PROM putchars to complete.
-			 * FIFO depth * character time,
-			 * character time = (1000000 / (defaultrate / 10))
-			 */
-			DELAY(160000000 / comcnrate);
-			comconsole = 0;
-			if (siocnattach(0x3f8, comcnrate))
-				panic("can't init serial console");
-
-			boothowto |= RB_SERIAL;
-			break;
-		}
+		/*
+		 * Delay to allow PROM putchars to complete.
+		 * FIFO depth * character time,
+		 * character time = (1000000 / (defaultrate / 10))
+		 */
+		DELAY(160000000 / comcnrate);
+		comconsole = 0;
+		if (siocnattach(0x3f8, comcnrate))
+			panic("can't init serial console");
+
+		boothowto |= RB_SERIAL;
+		break;
 
 	case 3:
 		/* display console ... */
@@ -149,6 +148,7 @@ st550_cons_init()
 static void
 st550_intr_init()
 {
+
 	/* This is here because we need to disable extraneous pci interrupts. */
 	int i;
 	for(i = ST550_PCI_IRQ_BEGIN; i <= ST550_PCI_MAX_IRQ; i++)
@@ -162,70 +162,72 @@ st550_intr_init()
 static void
 st550_intr_map(void *arg)
 {
-	pcicfgregs *cfg = (pcicfgregs *)arg;
-
-        /* There are two main variants of Miata: Miata 1 (Intel SIO)
-         * and Miata {1.5,2} (Cypress).
-         *
-         * The Miata 1 has a CMD PCI IDE wired to compatibility mode at
-         * slot 4 of bus 0.  This variant  has the Pyxis DMA bug.
-         *
-         * On the Miata 1.5 and Miata 2, the Cypress PCI-ISA bridge lives
-         * on device 7 of bus 0.  This device has PCI IDE wired to
-         * compatibility mode on functions 1 and 2.
-         *
-         * There will be no interrupt mapping for these devices, so just
-         * bail out now.
-         */
+	pcicfgregs *cfg;
+
+	cfg = (pcicfgregs *)arg;
+
+	/* There are two main variants of Miata: Miata 1 (Intel SIO)
+	 * and Miata {1.5,2} (Cypress).
+	 *
+	 * The Miata 1 has a CMD PCI IDE wired to compatibility mode at
+	 * slot 4 of bus 0.  This variant  has the Pyxis DMA bug.
+	 *
+	 * On the Miata 1.5 and Miata 2, the Cypress PCI-ISA bridge lives
+	 * on device 7 of bus 0.  This device has PCI IDE wired to
+	 * compatibility mode on functions 1 and 2.
+	 *
+	 * There will be no interrupt mapping for these devices, so just
+	 * bail out now.
+	 */
 	if(cfg->bus == 0) {
 		if ((hwrpb->rpb_variation & SV_ST_MASK) < SV_ST_MIATA_1_5) {
-                        /* Miata 1 */
-                        if (cfg->slot == 7)
+			/* Miata 1 */
+			if (cfg->slot == 7)
 				return;
-                        else if (cfg->func == 4)
+			else if (cfg->func == 4)
 				return;
 		} else {
 			/* Miata 1.5 or Miata 2 */
-                        if (cfg->slot == 7) {
-                                if (cfg->func == 0)
+			if (cfg->slot == 7) {
+				if (cfg->func == 0)
 					return;
-                                return;
-                        }
-                }
-        }
-	        /* Account for the PCI interrupt offset. */
-        /* cfg->intline += ST550_PCI_IRQ_BEGIN; */
+				return;
+			}
+		}
+	}
+	/* Account for the PCI interrupt offset. */
+	/* cfg->intline += ST550_PCI_IRQ_BEGIN; */
 	return;
 }
 
 /*
- * The functions below were written based on a draft copy of the 
- * 21174 TRM. 
+ * The functions below were written based on a draft copy of the
+ * 21174 TRM.
  */
 static void
 pyxis_intr_enable(irq)
 	int irq;
 {
-        volatile u_int64_t temp;
+	volatile u_int64_t temp;
 
-        alpha_mb();
-        temp =  REGVAL64(PYXIS_INT_MASK);
-        alpha_mb();
+	alpha_mb();
+	temp = REGVAL64(PYXIS_INT_MASK);
+	alpha_mb();
 
-        temp |= ( 1L << irq );
-        REGVAL64(PYXIS_INT_MASK) = temp;
-        alpha_mb();
-        temp = REGVAL64(PYXIS_INT_MASK);
+	temp |= ( 1L << irq );
+	REGVAL64(PYXIS_INT_MASK) = temp;
+	alpha_mb();
+	temp = REGVAL64(PYXIS_INT_MASK);
 #if 0
 	printf("pyxis_intr_enable: enabling %d, current mask= ", irq);
-        {
-                int i;
-                for ( i = 0; i < 61; i++)
-                        if (temp & (1 << i)){
-                                printf("%d " ,i);
-                        }       
-                printf("\n");
-        }
+	{
+		int i;
+		for ( i = 0; i < 61; i++)
+			if (temp & (1 << i)) {
+				printf("%d " , i);
+			}
+		printf("\n");
+	}
 #endif
 
 }
@@ -243,29 +245,31 @@ pyxis_intr_disable(irq)
         alpha_mb();
         temp = REGVAL64(PYXIS_INT_MASK);
 #if 0
-        printf("pyxis_intr_disable: disabled %d, current mask ", irq);
-        {
-                int i;
-                for ( i = 0; i < 61; i++)
-                        if (temp & (1 << i)){
-                                printf("%d ",i);
-                        }
-                printf("\n");
-        }
+	printf("pyxis_intr_disable: disabled %d, current mask ", irq);
+	{
+		int i;
+		for ( i = 0; i < 61; i++)
+			if (temp & (1 << i)) {
+				printf("%d ", i);
+			}
+	printf("\n");
+	}
 #endif
 
 }
 
 static void
 st550_intr_enable(irq)
-        int irq;
+	int irq;
 {
+
 	pyxis_intr_enable(irq + ST550_PCI_IRQ_BEGIN);
 }
 
 static void
 st550_intr_disable(irq)
-        int irq;
+	int irq;
 {
+
 	pyxis_intr_disable(irq + ST550_PCI_IRQ_BEGIN);
 }
diff --git a/sys/alpha/alpha/dec_st6600.c b/sys/alpha/alpha/dec_st6600.c
index 124f09c..22e9455 100644
--- a/sys/alpha/alpha/dec_st6600.c
+++ b/sys/alpha/alpha/dec_st6600.c
@@ -48,8 +48,8 @@
 #include "sio.h"
 #include "sc.h"
 
-#ifndef CONSPEED
-#define CONSPEED TTYDEF_SPEED
+#ifndef	CONSPEED
+#define	CONSPEED TTYDEF_SPEED
 #endif
 static int comcnrate = CONSPEED;
 
@@ -96,7 +96,7 @@ st6600_cons_init()
 	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
 
 	switch (ctb->ctb_term_type) {
-	case 2: 
+	case 2:
 		/* serial console ... */
 		/* XXX */
 		{
@@ -136,20 +136,20 @@ st6600_cons_init()
 static void
 st6600_intr_init()
 {
-
 	int i;
+
 	for(i = ST6600_PCI_IRQ_BEGIN; i <= ST6600_PCI_MAX_IRQ; i++)
 		platform.pci_intr_disable(i);
 	/* From Linux... */
 
 	platform.pci_intr_enable(55);	
 	platform.pci_intr_enable(2);	
-
 }
 
 static void
 st6600_intr_map(void *arg)
 {
+
 	return;
 }