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author | gallatin <gallatin@FreeBSD.org> | 2000-08-31 16:19:27 +0000 |
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committer | gallatin <gallatin@FreeBSD.org> | 2000-08-31 16:19:27 +0000 |
commit | 10142f72b778cc949625c44837e2c84d41f5f030 (patch) | |
tree | 356b59a92797a26684e5bddd2da908b7e7547f86 /sys | |
parent | c7b18640f73d1506099681f39168ca0e94146d46 (diff) | |
download | FreeBSD-src-10142f72b778cc949625c44837e2c84d41f5f030.zip FreeBSD-src-10142f72b778cc949625c44837e2c84d41f5f030.tar.gz |
Introduce explicit break statements in the various chipsets'
foo_pcib_[read|write]_config() functions rather than relying on
a break or return being in the CFG macro.
This fixes a panic later in the boot process on a UP1000. From
inspection, it looks like this fixes a similar problem in the tsunami code.
Approved by: dfr
Diffstat (limited to 'sys')
-rw-r--r-- | sys/alpha/pci/apecs_pci.c | 4 | ||||
-rw-r--r-- | sys/alpha/pci/cia_pci.c | 8 | ||||
-rw-r--r-- | sys/alpha/pci/irongate_pci.c | 4 | ||||
-rw-r--r-- | sys/alpha/pci/lca_pci.c | 4 | ||||
-rw-r--r-- | sys/alpha/pci/t2_pci.c | 4 | ||||
-rw-r--r-- | sys/alpha/pci/tsunami_pci.c | 4 |
6 files changed, 28 insertions, 0 deletions
diff --git a/sys/alpha/pci/apecs_pci.c b/sys/alpha/pci/apecs_pci.c index 287b2d9..d262013 100644 --- a/sys/alpha/pci/apecs_pci.c +++ b/sys/alpha/pci/apecs_pci.c @@ -140,8 +140,10 @@ apecs_pcib_read_config(device_t dev, int b, int s, int f, switch (width) { case 1: SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t); + break; case 2: SWIZ_CFGREAD(b, s, f, reg, WORD, u_int16_t); + break; case 4: SWIZ_CFGREAD(b, s, f, reg, LONG, u_int32_t); } @@ -155,8 +157,10 @@ apecs_pcib_write_config(device_t dev, int b, int s, int f, switch (width) { case 1: SWIZ_CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t); + break; case 2: SWIZ_CFGWRITE(b, s, f, reg, val, WORD, u_int16_t); + break; case 4: SWIZ_CFGWRITE(b, s, f, reg, val, LONG, u_int32_t); } diff --git a/sys/alpha/pci/cia_pci.c b/sys/alpha/pci/cia_pci.c index 7b1620b..04e607f 100644 --- a/sys/alpha/pci/cia_pci.c +++ b/sys/alpha/pci/cia_pci.c @@ -303,8 +303,10 @@ cia_pcib_swiz_read_config(int b, int s, int f, int reg, int width) switch (width) { case 1: SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t); + break; case 2: SWIZ_CFGREAD(b, s, f, reg, WORD, u_int16_t); + break; case 4: SWIZ_CFGREAD(b, s, f, reg, LONG, u_int32_t); } @@ -318,8 +320,10 @@ cia_pcib_swiz_write_config(int b, int s, int f, int reg, switch (width) { case 1: SWIZ_CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t); + break; case 2: SWIZ_CFGWRITE(b, s, f, reg, val, WORD, u_int16_t); + break; case 4: SWIZ_CFGWRITE(b, s, f, reg, val, LONG, u_int32_t); } @@ -331,8 +335,10 @@ cia_pcib_bwx_read_config(int b, int s, int f, int reg, int width) switch (width) { case 1: BWX_CFGREAD(b, s, f, reg, 1, u_int8_t, ldbu); + break; case 2: BWX_CFGREAD(b, s, f, reg, 2, u_int16_t, ldwu); + break; case 4: BWX_CFGREAD(b, s, f, reg, 4, u_int32_t, ldl); } @@ -346,8 +352,10 @@ cia_pcib_bwx_write_config(int b, int s, int f, int reg, switch (width) { case 1: BWX_CFGWRITE(b, s, f, reg, val, 1, u_int8_t, stb); + break; case 2: BWX_CFGWRITE(b, s, f, reg, val, 2, u_int16_t, stw); + break; case 4: BWX_CFGWRITE(b, s, f, reg, val, 4, u_int32_t, stl); } diff --git a/sys/alpha/pci/irongate_pci.c b/sys/alpha/pci/irongate_pci.c index 3b62716..14278be 100644 --- a/sys/alpha/pci/irongate_pci.c +++ b/sys/alpha/pci/irongate_pci.c @@ -153,8 +153,10 @@ irongate_pcib_read_config(device_t dev, int b, int s, int f, switch (width) { case 1: CFGREAD(b, s, f, reg, 1, u_int8_t, ldbu); + break; case 2: CFGREAD(b, s, f, reg, 2, u_int16_t, ldwu); + break; case 4: CFGREAD(b, s, f, reg, 4, u_int32_t, ldl); } @@ -168,8 +170,10 @@ irongate_pcib_write_config(device_t dev, int b, int s, int f, switch (width) { case 1: CFGWRITE(b, s, f, reg, val, 1, stb); + break; case 2: CFGWRITE(b, s, f, reg, val, 2, stw); + break; case 4: CFGWRITE(b, s, f, reg, val, 4, stl); } diff --git a/sys/alpha/pci/lca_pci.c b/sys/alpha/pci/lca_pci.c index e17d1e4..cd7ae9d 100644 --- a/sys/alpha/pci/lca_pci.c +++ b/sys/alpha/pci/lca_pci.c @@ -136,8 +136,10 @@ lca_pcib_read_config(device_t dev, int b, int s, int f, switch (width) { case 1: CFGREAD(b, s, f, reg, BYTE, u_int8_t); + break; case 2: CFGREAD(b, s, f, reg, WORD, u_int16_t); + break; case 4: CFGREAD(b, s, f, reg, LONG, u_int32_t); } @@ -151,8 +153,10 @@ lca_pcib_write_config(device_t dev, int b, int s, int f, switch (width) { case 1: CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t); + break; case 2: CFGWRITE(b, s, f, reg, val, WORD, u_int16_t); + break; case 4: CFGWRITE(b, s, f, reg, val, LONG, u_int32_t); } diff --git a/sys/alpha/pci/t2_pci.c b/sys/alpha/pci/t2_pci.c index 5d3eb21..687aa17 100644 --- a/sys/alpha/pci/t2_pci.c +++ b/sys/alpha/pci/t2_pci.c @@ -142,8 +142,10 @@ t2_pcib_read_config(device_t dev, int b, int s, int f, switch (width) { case 1: SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t); + break; case 2: SWIZ_CFGREAD(b, s, f, reg, WORD, u_int16_t); + break; case 4: SWIZ_CFGREAD(b, s, f, reg, LONG, u_int32_t); } @@ -157,8 +159,10 @@ t2_pcib_write_config(device_t dev, int b, int s, int f, switch (width) { case 1: SWIZ_CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t); + break; case 2: SWIZ_CFGWRITE(b, s, f, reg, val, WORD, u_int16_t); + break; case 4: SWIZ_CFGWRITE(b, s, f, reg, val, LONG, u_int32_t); } diff --git a/sys/alpha/pci/tsunami_pci.c b/sys/alpha/pci/tsunami_pci.c index ebf8855..cd392e1 100644 --- a/sys/alpha/pci/tsunami_pci.c +++ b/sys/alpha/pci/tsunami_pci.c @@ -224,8 +224,10 @@ tsunami_pcib_read_config(device_t dev, int b, int s, int f, switch (width) { case 1: CFGREAD(h, b, s, f, reg, ldbu, 1, u_int8_t); + break; case 2: CFGREAD(h, b, s, f, reg, ldwu, 2, u_int16_t); + break; case 4: CFGREAD(h, b, s, f, reg, ldl, 4, u_int32_t); } @@ -240,8 +242,10 @@ tsunami_pcib_write_config(device_t dev, int b, int s, int f, switch (width) { case 1: CFGWRITE(h, b, s, f, reg, val, stb, 1); + break; case 2: CFGWRITE(h, b, s, f, reg, val, stw, 2); + break; case 4: CFGWRITE(h, b, s, f, reg, val, stl, 4); } |