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author | marcel <marcel@FreeBSD.org> | 2008-03-08 05:36:25 +0000 |
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committer | marcel <marcel@FreeBSD.org> | 2008-03-08 05:36:25 +0000 |
commit | 0cbb4fa0c309a44ed94f3717c5063a33a0e654e7 (patch) | |
tree | 3301c8b2b0e7143a809f4e58a9bee273e9d87052 /sys | |
parent | d18ce1d4e48aac13950771fd2be46c1baf039b8e (diff) | |
download | FreeBSD-src-0cbb4fa0c309a44ed94f3717c5063a33a0e654e7.zip FreeBSD-src-0cbb4fa0c309a44ed94f3717c5063a33a0e654e7.tar.gz |
Enable the D-cache and I-cache when not already enabled.
It so happens that U-Boot disables the D-cache when booting
an ELF image, so this change makes sure we run with the
D-cache enabled from now on. It shows too...
While here, remove the duplicate definition of the hw.model
sysctl.
Diffstat (limited to 'sys')
-rw-r--r-- | sys/powerpc/booke/machdep.c | 31 |
1 files changed, 28 insertions, 3 deletions
diff --git a/sys/powerpc/booke/machdep.c b/sys/powerpc/booke/machdep.c index a7a11d9..f5a1e06 100644 --- a/sys/powerpc/booke/machdep.c +++ b/sys/powerpc/booke/machdep.c @@ -158,6 +158,11 @@ extern void *trapcode, *trapsize; extern unsigned char kstack0_space[]; +extern void dcache_enable(void); +extern void dcache_inval(void); +extern void icache_enable(void); +extern void icache_inval(void); + struct kva_md_info kmi; struct pcpu __pcpu[MAXCPU]; struct trapframe frame0; @@ -170,9 +175,6 @@ struct bootinfo *bootinfo; char machine[] = "powerpc"; SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, ""); -static char model[128]; -SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, model, 0, ""); - static int cacheline_size = CACHELINESIZE; SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size, CTLFLAG_RD, &cacheline_size, 0, ""); @@ -318,6 +320,7 @@ e500_init(u_int32_t startkernel, u_int32_t endkernel, void *mdp) void *kmdp; vm_offset_t end; struct bi_mem_region *mr; + uint32_t csr; int i; kmdp = NULL; @@ -440,6 +443,28 @@ e500_init(u_int32_t startkernel, u_int32_t endkernel, void *mdp) mtmsr(mfmsr() | PSL_ME); isync(); + /* Enable D-cache if applicable */ + csr = mfspr(SPR_L1CSR0); + if ((csr & L1CSR0_DCE) == 0) { + dcache_inval(); + dcache_enable(); + } + csr = mfspr(SPR_L1CSR0); + if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0) + printf("L1 D-cache %sabled\n", + (csr & L1CSR0_DCE) ? "en" : "dis"); + + /* Enable L1 I-cache if applicable. */ + csr = mfspr(SPR_L1CSR1); + if ((csr & L1CSR1_ICE) == 0) { + icache_inval(); + icache_enable(); + } + csr = mfspr(SPR_L1CSR1); + if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0) + printf("L1 I-cache %sabled\n", + (csr & L1CSR1_ICE) ? "en" : "dis"); + debugf("e500_init: e\n"); } |