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author | kib <kib@FreeBSD.org> | 2015-10-30 09:24:16 +0000 |
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committer | kib <kib@FreeBSD.org> | 2015-10-30 09:24:16 +0000 |
commit | 1d3471fc07a28d67df7856d05c0510a0b3ba8692 (patch) | |
tree | f48eacd2c7f37094a6decaad5fc5d10d80d05010 /sys/x86 | |
parent | cc36be8f3e7593c10a7c9fbe77e910fc75d500b3 (diff) | |
download | FreeBSD-src-1d3471fc07a28d67df7856d05c0510a0b3ba8692.zip FreeBSD-src-1d3471fc07a28d67df7856d05c0510a0b3ba8692.tar.gz |
MFC r289823:
Decode new values for CPUID leaf 2 cache and TLB descriptors, from the
Intel SDM revision 56.
Diffstat (limited to 'sys/x86')
-rw-r--r-- | sys/x86/x86/identcpu.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index 1804595..a576a48 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -1887,6 +1887,18 @@ print_INTEL_TLB(u_int data) case 0x68: printf("1st-level data cache: 32 KB, 4 way set associative, sectored cache, 64 byte line size\n"); break; + case 0x6a: + printf("uTLB: 4KByte pages, 8-way set associative, 64 entries\n"); + break; + case 0x6b: + printf("DTLB: 4KByte pages, 8-way set associative, 256 entries\n"); + break; + case 0x6c: + printf("DTLB: 2M/4M pages, 8-way set associative, 126 entries\n"); + break; + case 0x6d: + printf("DTLB: 1 GByte pages, fully associative, 16 entries\n"); + break; case 0x70: printf("Trace cache: 12K-uops, 8-way set associative\n"); break; |