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| author | Luiz Souza <luiz@netgate.com> | 2017-06-20 15:07:17 -0500 |
|---|---|---|
| committer | Luiz Souza <luiz@netgate.com> | 2017-07-20 14:58:40 -0500 |
| commit | 7901e9183df0f4c6cca2477a33a967d035d94c90 (patch) | |
| tree | 4792805451fa9a86a70364cc1bf24484eb9568be /sys/sys | |
| parent | b7668aa23650dc6c1b806f5b940c73fc885ab793 (diff) | |
| download | FreeBSD-src-7901e9183df0f4c6cca2477a33a967d035d94c90.zip FreeBSD-src-7901e9183df0f4c6cca2477a33a967d035d94c90.tar.gz | |
Add initial GPIO PWM support.
(cherry picked from commit a70ecde4228d0d6f81b0eb8117e102d01a9a36eb)
Diffstat (limited to 'sys/sys')
| -rw-r--r-- | sys/sys/gpio.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/sys/sys/gpio.h b/sys/sys/gpio.h index 9b0a1b5..4b63baa 100644 --- a/sys/sys/gpio.h +++ b/sys/sys/gpio.h @@ -56,6 +56,11 @@ #define GPIO_PIN_LOW 0x00 /* low level (logical 0) */ #define GPIO_PIN_HIGH 0x01 /* high level (logical 1) */ +/* GPIO PWM settings */ +#define GPIO_PWM_DUTY 0x01 /* PWM duty cycle */ +#define GPIO_PWM_FREQ 0x02 /* PWM frequency */ +#define GPIO_PWM_PERIOD 0x04 /* PWM period */ + /* Max name length of a pin */ #define GPIOMAXNAME 64 @@ -70,6 +75,8 @@ #define GPIO_PIN_INVIN 0x00000080 /* invert input */ #define GPIO_PIN_INVOUT 0x00000100 /* invert output */ #define GPIO_PIN_PULSATE 0x00000200 /* pulsate in hardware */ +#define GPIO_PIN_PWM 0x00000400 /* pwm output */ +#define GPIO_PIN_MUX 0x00000800 /* pin mux */ /* GPIO interrupt capabilities */ #define GPIO_INTR_NONE 0x00000000 /* no interrupt support */ #define GPIO_INTR_LEVEL_LOW 0x00010000 /* level trigger, low */ @@ -86,6 +93,7 @@ struct gpio_pin { char gp_name[GPIOMAXNAME]; /* human-readable name */ uint32_t gp_caps; /* capabilities */ uint32_t gp_flags; /* current flags */ + uint32_t gp_pwm_caps; /* pwm capabilities */ }; /* GPIO pin request (read/write/toggle) */ @@ -94,6 +102,15 @@ struct gpio_req { uint32_t gp_value; /* value */ }; +/* GPIO pwm request (read/write) */ +struct gpio_pwm_req { + int32_t gp_pwm; /* pwm number */ + uint32_t gp_pwm_pin; /* pin number */ + uint32_t gp_pwm_reg; /* register */ + uint32_t gp_pwm_value; /* value */ + uint32_t gp_pwm_caps; /* pwm capabilities */ +}; + /* * ioctls */ @@ -104,5 +121,9 @@ struct gpio_req { #define GPIOSET _IOW('G', 4, struct gpio_req) #define GPIOTOGGLE _IOWR('G', 5, struct gpio_req) #define GPIOSETNAME _IOW('G', 6, struct gpio_pin) +#define GPIOMAXPWM _IOR('G', 7, int) +#define GPIOPWMGETCONFIG _IOWR('G', 8, struct gpio_pwm_req) +#define GPIOPWMGET _IOWR('G', 9, struct gpio_pwm_req) +#define GPIOPWMSET _IOW('G', 10, struct gpio_pwm_req) #endif /* __GPIO_H__ */ |
