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authormarius <marius@FreeBSD.org>2011-07-02 12:56:03 +0000
committermarius <marius@FreeBSD.org>2011-07-02 12:56:03 +0000
commit078b67d3f9fd9d23de396ca3a8aaa3479511910b (patch)
tree8cca35c9a5ef7d1afc2e34b606bf57784de21a2c /sys/sys/ttydevsw.h
parentef7acc0998cd61806eb4dd8378066576f99f61d6 (diff)
downloadFreeBSD-src-078b67d3f9fd9d23de396ca3a8aaa3479511910b.zip
FreeBSD-src-078b67d3f9fd9d23de396ca3a8aaa3479511910b.tar.gz
UltraSPARC-IV CPUs seem to be affected by a not publicly documented
erratum causing them to trigger stray vector interrupts accompanied by a state in which they even fault on locked TLB entries. Just retrying the instruction in that case gets the CPU back on track though. OpenSolaris also just ignores a certain number of stray vector interrupts. While at it, implement the stray vector interrupt handling for SPARC64-VI which use these for indicating uncorrectable errors in interrupt packets.
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