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| author | kib <kib@FreeBSD.org> | 2014-06-04 16:06:38 +0000 |
|---|---|---|
| committer | kib <kib@FreeBSD.org> | 2014-06-04 16:06:38 +0000 |
| commit | 23d48b19e197fac8aa55942bb6f7a177611f5e9c (patch) | |
| tree | 056c1deededcbf6e524ab08cf747efcff25c7834 /sys/sys/pmc.h | |
| parent | 48aedb6ddccb6f64756f30335443eaeebfc45d8a (diff) | |
| download | FreeBSD-src-23d48b19e197fac8aa55942bb6f7a177611f5e9c.zip FreeBSD-src-23d48b19e197fac8aa55942bb6f7a177611f5e9c.tar.gz | |
For Xeon 7500 and 48XX (Nehalem EX and Westmere EX) variants of the
Core i7 and Westmere processors, the uncore PMC subsystem is
completely different from the uncore PMC on smaller versions of CPUs.
Disable existing uncore hwpmc code for EX, otherwise non-existing MSRs
are accessed.
The cores PMCs seems to be identical for non-EX and EX, according to
the SDM.
Reviewed by: davide, fabient
Sponsored by: The FreeBSD Foundation
MFC after: 2 weeks
Diffstat (limited to 'sys/sys/pmc.h')
| -rw-r--r-- | sys/sys/pmc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/sys/pmc.h b/sys/sys/pmc.h index bcc462b..23405ea 100644 --- a/sys/sys/pmc.h +++ b/sys/sys/pmc.h @@ -92,6 +92,8 @@ __PMC_CPU(INTEL_IVYBRIDGE_XEON, 0x90, "Intel Ivy Bridge Xeon") \ __PMC_CPU(INTEL_HASWELL, 0x91, "Intel Haswell") \ __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \ + __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \ + __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ |
