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authormarius <marius@FreeBSD.org>2011-03-26 16:49:12 +0000
committermarius <marius@FreeBSD.org>2011-03-26 16:49:12 +0000
commit3584a5f5d1d3e11196e83ec12af4245969b794eb (patch)
tree28231a30f87f648ab73b4f8f7fbec469dcd054b9 /sys/sparc64/pci/schizovar.h
parentd58ef774dbf2f3c7b7b4e513edc2d63e005880fd (diff)
downloadFreeBSD-src-3584a5f5d1d3e11196e83ec12af4245969b794eb.zip
FreeBSD-src-3584a5f5d1d3e11196e83ec12af4245969b794eb.tar.gz
- Merge the *_SET macros from fire(4) which generally print out the
register changes when compiled with SCHIZO_DEBUG and take advantage of them. - Add support for the XMITS Fireplane/Safari to PCI-X bridges. I tought I'd need this for a Sun Fire 3800, which then turned out to not being equipped with such a bridge though. The support for these should be complete but given that it hasn't actually been tested probing is disabled for now. This required a way to alter the XMITS configuration in case a PCI-X device is found further down the device tree so the sparc64 specific ofw_pci kobj was revived with a ofw_pci_setup_device method, which is called by the ofw_pcibus code for every device added. - A closer inspection of the OpenSolaris code indicates that consistent DMA flushing/syncing as well as the block store workaround should be applied with every BUS_DMASYNC_POSTREAD instead of in a wrapper around interrupt handlers for devices behind PCI-PCI bridges only as suggested by the documentation (code for the latter actually exists in OpenSolaris but is disabled by default), which also makes more sense. - Add a workaround for Casinni/Skyhawk combinations. Chances are that this solves the crashes seen when using the the on-board Casinni NICs of Sun Fire V480 equipped with centerplanes other than 501-6780 or 501-6790. This also takes advantage of the ofw_pci_setup_device method. - Mark some unused parameters as such.
Diffstat (limited to 'sys/sparc64/pci/schizovar.h')
-rw-r--r--sys/sparc64/pci/schizovar.h20
1 files changed, 17 insertions, 3 deletions
diff --git a/sys/sparc64/pci/schizovar.h b/sys/sparc64/pci/schizovar.h
index bde1528..8e18b58 100644
--- a/sys/sparc64/pci/schizovar.h
+++ b/sys/sparc64/pci/schizovar.h
@@ -31,9 +31,21 @@
#ifndef _SPARC64_PCI_SCHIZOVAR_H_
#define _SPARC64_PCI_SCHIZOVAR_H_
+struct schizo_softc;
+
+struct schizo_iommu_state {
+ struct iommu_state sis_is;
+ struct schizo_softc *sis_sc;
+};
+
struct schizo_softc {
+ struct bus_dma_methods sc_dma_methods;
+
device_t sc_dev;
+ struct mtx sc_sync_mtx;
+ uint64_t sc_sync_val;
+
struct mtx *sc_mtx;
phandle_t sc_node;
@@ -45,22 +57,24 @@ struct schizo_softc {
u_int sc_flags;
#define SCHIZO_FLAGS_BSWAR (1 << 0)
-#define SCHIZO_FLAGS_CDMA (1 << 1)
+#define SCHIZO_FLAGS_XMODE (1 << 1)
bus_addr_t sc_cdma_clr;
uint32_t sc_cdma_state;
-#define SCHIZO_CDMA_STATE_DONE (1 << 0)
+#define SCHIZO_CDMA_STATE_IDLE (1 << 0)
#define SCHIZO_CDMA_STATE_PENDING (1 << 1)
+#define SCHIZO_CDMA_STATE_RECEIVED (1 << 2)
u_int sc_half;
uint32_t sc_ign;
uint32_t sc_ver;
+ uint32_t sc_mrev;
struct resource *sc_mem_res[TOM_NREG];
struct resource *sc_irq_res[STX_NINTR];
void *sc_ihand[STX_NINTR];
- struct iommu_state sc_is;
+ struct schizo_iommu_state sc_is;
struct rman sc_pci_mem_rman;
struct rman sc_pci_io_rman;
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