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author | tmm <tmm@FreeBSD.org> | 2002-03-24 02:11:06 +0000 |
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committer | tmm <tmm@FreeBSD.org> | 2002-03-24 02:11:06 +0000 |
commit | 521e80e7004d21d31b68b84f1038865ad8513c5b (patch) | |
tree | 38a7ef1596d0873fd81c61d83dd216b08b60752f /sys/sparc64/pci/apb.c | |
parent | 587f263c4d8db119551ac4d9518abee9498ebd04 (diff) | |
download | FreeBSD-src-521e80e7004d21d31b68b84f1038865ad8513c5b.zip FreeBSD-src-521e80e7004d21d31b68b84f1038865ad8513c5b.tar.gz |
Make the OpenFirmware interrupt mapping code more generic, to reduce
the bus-dependent code and to be able to support more systems. The core
of the new code is mostly obtained from NetBSD.
Kluge the interrupt routing methods of the psycho and apb drivers so
that an intline of 0 can be handled for now; real routing is still not
possible (all intline registers are preinitialized instead); this will
require a sparc64-specific adaption of the driver for generic PCI-PCI
bridges with a custom routing method to work right.
Diffstat (limited to 'sys/sparc64/pci/apb.c')
-rw-r--r-- | sys/sparc64/pci/apb.c | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/sys/sparc64/pci/apb.c b/sys/sparc64/pci/apb.c index 52a5270..4f01630 100644 --- a/sys/sparc64/pci/apb.c +++ b/sys/sparc64/pci/apb.c @@ -46,8 +46,13 @@ #include <sys/malloc.h> #include <sys/bus.h> +#include <dev/ofw/openfirm.h> +#include <dev/ofw/ofw_pci.h> + #include <machine/resource.h> +#include <sparc64/pci/ofw_pci.h> + #include <pci/pcivar.h> #include <pci/pcireg.h> @@ -343,12 +348,27 @@ apb_write_config(device_t dev, int b, int s, int f, int reg, u_int32_t val, } /* - * Route an interrupt across a PCI bridge - the APB does not route interrupts, - * and routing of interrupts that are not preinitialized is not supported yet. + * Route an interrupt across a PCI bridge - we need to rely on the firmware + * here. */ static int apb_route_interrupt(device_t pcib, device_t dev, int pin) { - panic("apb_route_interrupt"); + /* + * XXX: ugly loathsome hack: + * We can't use ofw_pci_route_intr() here; the device passed may be + * the one of a bridge, so the original device can't be recovered. + * + * We need to use the firmware to route interrupts, however it has + * no interface which could be used to interpret intpins; instead, + * all assignments are done by device. + * + * The MI pci code will try to reroute interrupts of 0, although they + * are correct; all other interrupts are preinitialized, so if we + * get here, the intline is either 0 (so return 0), or we hit a + * device which was not preinitialized (e.g. hotplugged stuff), in + * which case we are lost. + */ + return (0); } |