diff options
| author | marius <marius@FreeBSD.org> | 2010-04-10 11:13:51 +0000 |
|---|---|---|
| committer | marius <marius@FreeBSD.org> | 2010-04-10 11:13:51 +0000 |
| commit | c48055dea1028997c98d1f43c73db7cb0d62ccf1 (patch) | |
| tree | 872d58be32a030ec636a05d47626634576eadc04 /sys/sparc64/include | |
| parent | 18a6f97c167070cbeebde0850c8539db411b1076 (diff) | |
| download | FreeBSD-src-c48055dea1028997c98d1f43c73db7cb0d62ccf1.zip FreeBSD-src-c48055dea1028997c98d1f43c73db7cb0d62ccf1.tar.gz | |
Correct the DCR_IPE macro to refer to the right bit. Also improve the
associated comment as besides US-IV+ these bits are only available with
US-III++, i.e. the 1.2GHz version of the US-III+.
Diffstat (limited to 'sys/sparc64/include')
| -rw-r--r-- | sys/sparc64/include/dcr.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/sparc64/include/dcr.h b/sys/sparc64/include/dcr.h index b1f993a..42159ad 100644 --- a/sys/sparc64/include/dcr.h +++ b/sys/sparc64/include/dcr.h @@ -43,8 +43,8 @@ #define DCR_OBSDATA_CT_MASK \ (((1UL << DCR_OBSDATA_CT_BITS) - 1) << DCR_OBSDATA_SHIFT) -/* The following bits are valid for the UltraSPARC-III+/IV+ only. */ -#define DCR_IPE (1UL << 5) +/* The following bits are valid for the UltraSPARC-III++/IV+ only. */ +#define DCR_IPE (1UL << 2) #define DCR_OBSDATA_CTP_BITS 6 #define DCR_OBSDATA_CTP_MASK \ |
