summaryrefslogtreecommitdiffstats
path: root/sys/sparc64/include/cache.h
diff options
context:
space:
mode:
authormarius <marius@FreeBSD.org>2010-05-02 19:38:17 +0000
committermarius <marius@FreeBSD.org>2010-05-02 19:38:17 +0000
commit630328c1b513925136fa49a9af3f323f4a7d53c9 (patch)
treeb933ba8d8d44204848615024c83b80501df01e6d /sys/sparc64/include/cache.h
parent071496a9c757550fc1834fc2cbdd8d6d142ca23b (diff)
downloadFreeBSD-src-630328c1b513925136fa49a9af3f323f4a7d53c9.zip
FreeBSD-src-630328c1b513925136fa49a9af3f323f4a7d53c9.tar.gz
Add support for SPARC64 V (and where it already makes sense for other
HAL/Fujitsu) CPUs. For the most part this consists of fleshing out the MMU and cache handling, it doesn't add pmap optimizations possible with these CPU, yet, though. With these changes FreeBSD runs stable on Fujitsu Siemens PRIMEPOWER 250 and likely also other models based on SPARC64 V like 450, 650 and 850. Thanks go to Michael Moll for providing access to a PRIMEPOWER 250.
Diffstat (limited to 'sys/sparc64/include/cache.h')
-rw-r--r--sys/sparc64/include/cache.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/sys/sparc64/include/cache.h b/sys/sparc64/include/cache.h
index 9c4804b..29bff69 100644
--- a/sys/sparc64/include/cache.h
+++ b/sys/sparc64/include/cache.h
@@ -113,6 +113,10 @@ extern cache_flush_t *cache_flush;
extern dcache_page_inval_t *dcache_page_inval;
extern icache_page_inval_t *icache_page_inval;
+cache_flush_t zeus_cache_flush;
+dcache_page_inval_t zeus_dcache_page_inval;
+icache_page_inval_t zeus_icache_page_inval;
+
#endif /* KERNEL */
#endif /* !LOCORE */
OpenPOWER on IntegriCloud