diff options
author | benno <benno@FreeBSD.org> | 2002-02-28 12:00:24 +0000 |
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committer | benno <benno@FreeBSD.org> | 2002-02-28 12:00:24 +0000 |
commit | 9ed9d1965de29b7d01580f5b6da265b86c2638f3 (patch) | |
tree | 30a06e05295df3356db1b4bab0eb1e21faebaffb /sys/powerpc | |
parent | 63f5bcde8c52a2d10411d39ec00b48bce8d7c8b9 (diff) | |
download | FreeBSD-src-9ed9d1965de29b7d01580f5b6da265b86c2638f3.zip FreeBSD-src-9ed9d1965de29b7d01580f5b6da265b86c2638f3.tar.gz |
Various cleanups.
Diffstat (limited to 'sys/powerpc')
-rw-r--r-- | sys/powerpc/aim/clock.c | 46 | ||||
-rw-r--r-- | sys/powerpc/powerpc/clock.c | 46 |
2 files changed, 44 insertions, 48 deletions
diff --git a/sys/powerpc/aim/clock.c b/sys/powerpc/aim/clock.c index 98e6091..e8ba90f 100644 --- a/sys/powerpc/aim/clock.c +++ b/sys/powerpc/aim/clock.c @@ -167,9 +167,10 @@ resettodr() void decr_intr(struct clockframe *frame) { - u_long tb; - long tick; - int nticks; + u_long tb; + long tick; + int nticks; + register_t msr; /* * Check whether we are initialized. @@ -196,29 +197,24 @@ decr_intr(struct clockframe *frame) */ intrcnt[CNT_CLOCK]++; - { - int msr; - nticks += tickspending; - tickspending = 0; + nticks += tickspending; + tickspending = 0; -#if 0 - /* - * Reenable interrupts - */ - msr = mfmsr(); - mtmsr(msr | PSL_EE); -#endif - - /* - * Do standard timer interrupt stuff. - * Do softclock stuff only on the last iteration. - */ - while (--nticks > 0) { - hardclock(frame); - } + /* + * Reenable interrupts + */ + msr = mfmsr(); + mtmsr(msr | PSL_EE | PSL_RI); + + /* + * Do standard timer interrupt stuff. + * Do softclock stuff only on the last iteration. + */ + while (--nticks > 0) { hardclock(frame); } + hardclock(frame); } void @@ -228,6 +224,8 @@ cpu_initclocks(void) char name[32]; unsigned int msr; + phandle = 0; + /* * Get this info during autoconf? XXX */ @@ -240,7 +238,7 @@ cpu_initclocks(void) * Should check for correct CPU here? XXX */ msr = mfmsr(); - mtmsr(msr & ~PSL_EE); + mtmsr(msr & ~(PSL_EE|PSL_RI)); powerpc_timecounter.tc_frequency = ticks_per_sec; tc_init(&powerpc_timecounter); @@ -298,7 +296,7 @@ delay(int n) tbl = tb; __asm ("1: mftbu %0; cmplw %0,%1; blt 1b; bgt 2f;" "mftb %0; cmplw %0,%2; blt 1b; 2:" - :: "r"(scratch), "r"(tbh), "r"(tbl)); + : "=r"(scratch) : "r"(tbh), "r"(tbl)); } /* diff --git a/sys/powerpc/powerpc/clock.c b/sys/powerpc/powerpc/clock.c index 98e6091..e8ba90f 100644 --- a/sys/powerpc/powerpc/clock.c +++ b/sys/powerpc/powerpc/clock.c @@ -167,9 +167,10 @@ resettodr() void decr_intr(struct clockframe *frame) { - u_long tb; - long tick; - int nticks; + u_long tb; + long tick; + int nticks; + register_t msr; /* * Check whether we are initialized. @@ -196,29 +197,24 @@ decr_intr(struct clockframe *frame) */ intrcnt[CNT_CLOCK]++; - { - int msr; - nticks += tickspending; - tickspending = 0; + nticks += tickspending; + tickspending = 0; -#if 0 - /* - * Reenable interrupts - */ - msr = mfmsr(); - mtmsr(msr | PSL_EE); -#endif - - /* - * Do standard timer interrupt stuff. - * Do softclock stuff only on the last iteration. - */ - while (--nticks > 0) { - hardclock(frame); - } + /* + * Reenable interrupts + */ + msr = mfmsr(); + mtmsr(msr | PSL_EE | PSL_RI); + + /* + * Do standard timer interrupt stuff. + * Do softclock stuff only on the last iteration. + */ + while (--nticks > 0) { hardclock(frame); } + hardclock(frame); } void @@ -228,6 +224,8 @@ cpu_initclocks(void) char name[32]; unsigned int msr; + phandle = 0; + /* * Get this info during autoconf? XXX */ @@ -240,7 +238,7 @@ cpu_initclocks(void) * Should check for correct CPU here? XXX */ msr = mfmsr(); - mtmsr(msr & ~PSL_EE); + mtmsr(msr & ~(PSL_EE|PSL_RI)); powerpc_timecounter.tc_frequency = ticks_per_sec; tc_init(&powerpc_timecounter); @@ -298,7 +296,7 @@ delay(int n) tbl = tb; __asm ("1: mftbu %0; cmplw %0,%1; blt 1b; bgt 2f;" "mftb %0; cmplw %0,%2; blt 1b; 2:" - :: "r"(scratch), "r"(tbh), "r"(tbl)); + : "=r"(scratch) : "r"(tbh), "r"(tbl)); } /* |