diff options
| author | marcel <marcel@FreeBSD.org> | 2010-03-23 23:46:28 +0000 |
|---|---|---|
| committer | marcel <marcel@FreeBSD.org> | 2010-03-23 23:46:28 +0000 |
| commit | 5a3f07530107271a10e63d07977dcd797b82f8b0 (patch) | |
| tree | 9ce5c6192682e63d0af946d23a54d8e98294ef67 /sys/powerpc | |
| parent | 7977906bd1435ede2b7f64aa683bd61fcaccfa6f (diff) | |
| download | FreeBSD-src-5a3f07530107271a10e63d07977dcd797b82f8b0.zip FreeBSD-src-5a3f07530107271a10e63d07977dcd797b82f8b0.tar.gz | |
Fix an off-by-one bug for the number of slots on a PCI/PCI-X bus.
We failed to setup PCI devices on slot 31 and that's where the
SATA controller is for the P2020 eval board.
Diffstat (limited to 'sys/powerpc')
| -rw-r--r-- | sys/powerpc/mpc85xx/pci_ocp.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/sys/powerpc/mpc85xx/pci_ocp.c b/sys/powerpc/mpc85xx/pci_ocp.c index eba3f50..cdcf986 100644 --- a/sys/powerpc/mpc85xx/pci_ocp.c +++ b/sys/powerpc/mpc85xx/pci_ocp.c @@ -264,7 +264,7 @@ pci_ocp_maxslots(device_t dev) { struct pci_ocp_softc *sc = device_get_softc(dev); - return ((sc->sc_pcie_cap) ? 0 : 30); + return ((sc->sc_pcie_cap) ? 0 : 31); } static uint32_t @@ -328,6 +328,7 @@ pci_ocp_probe(device_t dev) return (ENXIO); sc = device_get_softc(dev); + sc->sc_dev = dev; sc->sc_rid = 0; sc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid, @@ -492,7 +493,7 @@ pci_ocp_route_int(struct pci_ocp_softc *sc, u_int bus, u_int slot, u_int func, } static int -pci_ocp_init(struct pci_ocp_softc *sc, int bus, int maxslot) +pci_ocp_init(struct pci_ocp_softc *sc, int bus, int nslots) { int secbus, slot; int func, maxfunc; @@ -502,7 +503,7 @@ pci_ocp_init(struct pci_ocp_softc *sc, int bus, int maxslot) uint8_t intline, intpin; secbus = bus; - for (slot = 0; slot < maxslot; slot++) { + for (slot = 0; slot < nslots; slot++) { maxfunc = 0; for (func = 0; func <= maxfunc; func++) { hdrtype = pci_ocp_read_config(sc->sc_dev, bus, slot, @@ -599,7 +600,7 @@ pci_ocp_init(struct pci_ocp_softc *sc, int bus, int maxslot) PCIR_SUBBUS_1, 0xff, 1); secbus = pci_ocp_init(sc, secbus, - (subclass == PCIS_BRIDGE_PCI) ? 31 : 1); + (subclass == PCIS_BRIDGE_PCI) ? 32 : 1); pci_ocp_write_config(sc->sc_dev, bus, slot, func, PCIR_SUBBUS_1, secbus, 1); @@ -721,7 +722,7 @@ pci_ocp_attach(device_t dev) { struct pci_ocp_softc *sc; uint32_t cfgreg; - int error, maxslot; + int error, nslots; sc = device_get_softc(dev); sc->sc_dev = dev; @@ -765,8 +766,8 @@ pci_ocp_attach(device_t dev) return (0); } - maxslot = (sc->sc_pcie_cap) ? 1 : 31; - pci_ocp_init(sc, sc->sc_busnr, maxslot); + nslots = (sc->sc_pcie_cap) ? 1 : 32; + pci_ocp_init(sc, sc->sc_busnr, nslots); device_add_child(dev, "pci", -1); return (bus_generic_attach(dev)); |
