diff options
| author | jhibbits <jhibbits@FreeBSD.org> | 2015-08-21 02:22:51 +0000 |
|---|---|---|
| committer | jhibbits <jhibbits@FreeBSD.org> | 2015-08-21 02:22:51 +0000 |
| commit | 12dbf0744776d3f7cd55afae36ca8a2965db75d9 (patch) | |
| tree | c91c8873478fb369dca6bef3d6652ab529feb279 /sys/powerpc | |
| parent | fd746f624663b3def17d398dac3e68a2c1b6d28d (diff) | |
| download | FreeBSD-src-12dbf0744776d3f7cd55afae36ca8a2965db75d9.zip FreeBSD-src-12dbf0744776d3f7cd55afae36ca8a2965db75d9.tar.gz | |
Simplify the PCI bus scanning logic.
Rather than special casing on PCIC_BRIDGE || PCIC_PROCESSOR, allow all
HDRTYPE_BRIDGE types.
Obtained from: Semihalf
Sponsored by: Alex Perez/Intertial Computing
Diffstat (limited to 'sys/powerpc')
| -rw-r--r-- | sys/powerpc/mpc85xx/pci_mpc85xx.c | 17 |
1 files changed, 3 insertions, 14 deletions
diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx.c b/sys/powerpc/mpc85xx/pci_mpc85xx.c index 0050a98..af85fde 100644 --- a/sys/powerpc/mpc85xx/pci_mpc85xx.c +++ b/sys/powerpc/mpc85xx/pci_mpc85xx.c @@ -265,7 +265,7 @@ fsl_pcib_attach(device_t dev) */ sc->sc_busnr = 0; maxslot = (sc->sc_pcie) ? 0 : PCI_SLOTMAX; - fsl_pcib_init(sc, sc->sc_busnr, maxslot); + sc->sc_busnr = fsl_pcib_init(sc, sc->sc_busnr, maxslot); if (sc->sc_pcie) { ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1); @@ -570,19 +570,8 @@ fsl_pcib_init(struct fsl_pcib_softc *sc, int bus, int maxslot) subclass = fsl_pcib_read_config(sc->sc_dev, bus, slot, func, PCIR_SUBCLASS, 1); - /* - * The PCI Root Complex comes up as a Processor/PowerPC, - * but is a bridge. - */ - /* Allow only proper PCI-PCI briges */ - if (class != PCIC_BRIDGE && class != PCIC_PROCESSOR) - continue; - if (subclass != PCIS_BRIDGE_PCI && - subclass != PCIS_PROCESSOR_POWERPC) - continue; - - if (subclass == PCIS_PROCESSOR_POWERPC && - hdrtype != PCIM_HDRTYPE_BRIDGE) + /* Allow all DEVTYPE 1 devices */ + if (hdrtype != PCIM_HDRTYPE_BRIDGE) continue; secbus++; |
