Enable power management for E500 cores. Use "doze" for now to make

sure the caches remain coherent. For single-core configurations and
with busdma changes we could eventually switch to "nap" and force
a D-cache invalidation as part of the DMA completion. To this end,
clear PSL_WE until after we handled the decrementer or external
interrupt as it tells us whether we just woke up or not.

1 files changed, 7 insertions, 0 deletions

diff --git a/sys/powerpc/powerpc/cpu.c b/sys/powerpc/powerpc/cpu.c
index d02c156..555172a 100644
--- a/sys/powerpc/powerpc/cpu.c
+++ b/sys/powerpc/powerpc/cpu.c
@@ -433,6 +433,13 @@ cpu_e500_setup(int cpuid, uint16_t vers)
 	register_t hid0;
 
 	hid0 = mfspr(SPR_HID0);
+
+	/* Programe power-management mode. */
+	hid0 &= ~(HID0_DOZE | HID0_NAP | HID0_SLEEP);
+	hid0 |= HID0_DOZE;
+
+	mtspr(SPR_HID0, hid0);
+
 	printf("cpu%d: HID0 %b\n", cpuid, (int)hid0, HID0_E500_BITMASK);
 }