diff options
author | raj <raj@FreeBSD.org> | 2008-12-17 15:27:49 +0000 |
---|---|---|
committer | raj <raj@FreeBSD.org> | 2008-12-17 15:27:49 +0000 |
commit | d71801145e3d4af3d6f752336d55ddcddc1a7da1 (patch) | |
tree | 0b59b4e7b12b10dfe2627893da2236192f787c24 /sys/powerpc/mpc85xx | |
parent | ce7791f58daab11561fdaeb180f17b71fbe9bcf6 (diff) | |
download | FreeBSD-src-d71801145e3d4af3d6f752336d55ddcddc1a7da1.zip FreeBSD-src-d71801145e3d4af3d6f752336d55ddcddc1a7da1.tar.gz |
Improve MPC85XX helper routines.
- Move CCSR accessors to the shared MPC85XX area
- Simplify SVR version subfield handling
- Adjust OCP
Diffstat (limited to 'sys/powerpc/mpc85xx')
-rw-r--r-- | sys/powerpc/mpc85xx/mpc85xx.c | 32 | ||||
-rw-r--r-- | sys/powerpc/mpc85xx/mpc85xx.h | 35 | ||||
-rw-r--r-- | sys/powerpc/mpc85xx/ocpbus.c | 26 |
3 files changed, 65 insertions, 28 deletions
diff --git a/sys/powerpc/mpc85xx/mpc85xx.c b/sys/powerpc/mpc85xx/mpc85xx.c index 62a47a6..b75e301 100644 --- a/sys/powerpc/mpc85xx/mpc85xx.c +++ b/sys/powerpc/mpc85xx/mpc85xx.c @@ -38,33 +38,51 @@ __FBSDID("$FreeBSD$"); #include <machine/cpu.h> #include <machine/cpufunc.h> -#include <machine/pio.h> #include <machine/spr.h> #include <powerpc/mpc85xx/ocpbus.h> +#include <powerpc/mpc85xx/mpc85xx.h> /* * MPC85xx system specific routines */ +uint32_t +ccsr_read4(uintptr_t addr) +{ + volatile uint32_t *ptr = (void *)addr; + + return (*ptr); +} + +void +ccsr_write4(uintptr_t addr, uint32_t val) +{ + volatile uint32_t *ptr = (void *)addr; + + *ptr = val; + __asm __volatile("eieio; sync"); +} + void -cpu_reset() +cpu_reset(void) { - uint32_t svr = mfspr(SPR_SVR); + uint32_t ver = SVR_VER(mfspr(SPR_SVR)); - if (svr == SVR_MPC8572E || svr == SVR_MPC8572) + if (ver == SVR_MPC8572E || ver == SVR_MPC8572) /* Systems with dedicated reset register */ - out32(OCP85XX_RSTCR, 2); + ccsr_write4(OCP85XX_RSTCR, 2); else { /* Clear DBCR0, disables debug interrupts and events. */ mtspr(SPR_DBCR0, 0); - __asm volatile("isync"); + __asm __volatile("isync"); /* Enable Debug Interrupts in MSR. */ mtmsr(mfmsr() | PSL_DE); /* Enable debug interrupts and issue reset. */ - mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM); + mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | + DBCR0_RST_SYSTEM); } printf("Reset failed...\n"); diff --git a/sys/powerpc/mpc85xx/mpc85xx.h b/sys/powerpc/mpc85xx/mpc85xx.h new file mode 100644 index 0000000..525783a --- /dev/null +++ b/sys/powerpc/mpc85xx/mpc85xx.h @@ -0,0 +1,35 @@ +/*- + * Copyright (C) 2008 Semihalf, Rafal Jaworowski + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _MPC85XX_H_ +#define _MPC85XX_H_ + +uint32_t ccsr_read4(uintptr_t addr); +void ccsr_write4(uintptr_t addr, uint32_t val); + +#endif /* _MPC85XX_H_ */ diff --git a/sys/powerpc/mpc85xx/ocpbus.c b/sys/powerpc/mpc85xx/ocpbus.c index a741849..74af18c 100644 --- a/sys/powerpc/mpc85xx/ocpbus.c +++ b/sys/powerpc/mpc85xx/ocpbus.c @@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$"); #include <machine/bootinfo.h> #include <powerpc/mpc85xx/ocpbus.h> +#include <powerpc/mpc85xx/mpc85xx.h> #include "pic_if.h" @@ -115,23 +116,6 @@ DRIVER_MODULE(ocpbus, nexus, ocpbus_driver, ocpbus_devclass, 0, 0); static int law_max = 0; -static __inline uint32_t -ccsr_read4(uintptr_t addr) -{ - volatile uint32_t *ptr = (void *)addr; - - return (*ptr); -} - -static __inline void -ccsr_write4(uintptr_t addr, uint32_t val) -{ - volatile uint32_t *ptr = (void *)addr; - - *ptr = val; - __asm __volatile("eieio; sync"); -} - static device_t ocpbus_mk_child(device_t dev, int type, int unit) { @@ -230,15 +214,15 @@ ocpbus_write_law(int trgt, int type, u_long *startp, u_long *countp) } static int -ocpbus_probe (device_t dev) +ocpbus_probe(device_t dev) { struct ocpbus_softc *sc; - uint32_t svr; + uint32_t ver; sc = device_get_softc(dev); - svr = mfspr(SPR_SVR); - if (svr == SVR_MPC8572E || svr == SVR_MPC8572) + ver = SVR_VER(mfspr(SPR_SVR)); + if (ver == SVR_MPC8572E || ver == SVR_MPC8572) law_max = 12; else law_max = 8; |