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| author | raj <raj@FreeBSD.org> | 2009-07-21 08:38:45 +0000 |
|---|---|---|
| committer | raj <raj@FreeBSD.org> | 2009-07-21 08:38:45 +0000 |
| commit | b89a897a7d3e40d6418f946a3395e4a2aa37b554 (patch) | |
| tree | 65c626e22875b25d3028e3a99496b2256bf6a143 /sys/powerpc/mpc85xx | |
| parent | f7cf3989b309c48a6fe4a62968168c2914a065b0 (diff) | |
| download | FreeBSD-src-b89a897a7d3e40d6418f946a3395e4a2aa37b554.zip FreeBSD-src-b89a897a7d3e40d6418f946a3395e4a2aa37b554.tar.gz | |
Do not use OCP85XX_LBC_OFF twice when accessing LBC registers on MPC85XX.
It turns LBC control registers were not programmed correctly on MPC85XX. We
were accessing bogus addresses as the base offset (OCP85XX_LBC_OFF) was
erroneously added during offset calculations. Effectively the state of LBC
control registers was not altered by the kernel initialization code, but
everything worked as long as we coincided to use the same settings (LBC decode
windows) as firmware has initialized.
Submitted by: Lukasz Wojcik
Reviewed by: marcel
Approved by: re (kensmith)
Obtained from: Semihalf
Diffstat (limited to 'sys/powerpc/mpc85xx')
| -rw-r--r-- | sys/powerpc/mpc85xx/lbc.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/powerpc/mpc85xx/lbc.h b/sys/powerpc/mpc85xx/lbc.h index 24e741a..c5d19e2 100644 --- a/sys/powerpc/mpc85xx/lbc.h +++ b/sys/powerpc/mpc85xx/lbc.h @@ -39,10 +39,10 @@ #define LBC_DEVTYPE_RTC 2 /* Local access registers */ -#define LBC85XX_BR(n) (OCP85XX_LBC_OFF + (8 * n)) -#define LBC85XX_OR(n) (OCP85XX_LBC_OFF + 4 + (8 * n)) -#define LBC85XX_LBCR (OCP85XX_LBC_OFF + 0xd0) -#define LBC85XX_LCRR (OCP85XX_LBC_OFF + 0xd4) +#define LBC85XX_BR(n) (8 * n) +#define LBC85XX_OR(n) (4 + (8 * n)) +#define LBC85XX_LBCR (0xd0) +#define LBC85XX_LCRR (0xd4) /* LBC machine select */ #define LBCRES_MSEL_GPCM 0 |
