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| author | raj <raj@FreeBSD.org> | 2009-06-06 09:37:55 +0000 |
|---|---|---|
| committer | raj <raj@FreeBSD.org> | 2009-06-06 09:37:55 +0000 |
| commit | 4438ca8fc58af2d6d47376e6f8c08de0956357f4 (patch) | |
| tree | 94d86b67479a5d28d6fc5618a325babdb9b1a526 /sys/powerpc/mpc85xx | |
| parent | 482c6163f828f58341fb3d8c962baad0bcde80ea (diff) | |
| download | FreeBSD-src-4438ca8fc58af2d6d47376e6f8c08de0956357f4.zip FreeBSD-src-4438ca8fc58af2d6d47376e6f8c08de0956357f4.tar.gz | |
Initial version of the sec(4) driver for the integrated security engine found
in Freescale system-on-chip devices.
The following algorithms and schemes are currently supported:
- 3DES, AES, DES
- MD5, SHA1, SHA256, SHA384, SHA512
Reviewed by: philip
Obtained from: Freescale, Semihalf
Diffstat (limited to 'sys/powerpc/mpc85xx')
| -rw-r--r-- | sys/powerpc/mpc85xx/ocpbus.c | 6 | ||||
| -rw-r--r-- | sys/powerpc/mpc85xx/ocpbus.h | 2 |
2 files changed, 8 insertions, 0 deletions
diff --git a/sys/powerpc/mpc85xx/ocpbus.c b/sys/powerpc/mpc85xx/ocpbus.c index 817cf69..2adec47 100644 --- a/sys/powerpc/mpc85xx/ocpbus.c +++ b/sys/powerpc/mpc85xx/ocpbus.c @@ -216,6 +216,7 @@ ocpbus_attach(device_t dev) ocpbus_mk_child(dev, OCPBUS_DEVTYPE_TSEC, 3); ocpbus_mk_child(dev, OCPBUS_DEVTYPE_PIC, 0); ocpbus_mk_child(dev, OCPBUS_DEVTYPE_QUICC, 0); + ocpbus_mk_child(dev, OCPBUS_DEVTYPE_SEC, 0); /* Set up IRQ rman */ start = 0; @@ -348,6 +349,11 @@ const struct ocp_resource mpc8555_resources[] = { OCP85XX_I2C_SIZE}, {OCPBUS_DEVTYPE_I2C, 1, SYS_RES_IRQ, 0, PIC_IRQ_INT(27), 1}, + {OCPBUS_DEVTYPE_SEC, 0, SYS_RES_MEMORY, 0, OCP85XX_SEC_OFF, + OCP85XX_SEC_SIZE}, + {OCPBUS_DEVTYPE_SEC, 0, SYS_RES_IRQ, 0, PIC_IRQ_INT(29), 1}, + {OCPBUS_DEVTYPE_SEC, 0, SYS_RES_IRQ, 1, PIC_IRQ_INT(42), 1}, + {0} }; diff --git a/sys/powerpc/mpc85xx/ocpbus.h b/sys/powerpc/mpc85xx/ocpbus.h index f33f547..6aa6de3 100644 --- a/sys/powerpc/mpc85xx/ocpbus.h +++ b/sys/powerpc/mpc85xx/ocpbus.h @@ -96,6 +96,8 @@ #define OCP85XX_OPENPIC_SIZE 0x200B4 #define OCP85XX_QUICC_OFF 0x80000 #define OCP85XX_QUICC_SIZE 0x20000 +#define OCP85XX_SEC_OFF 0x30000 +#define OCP85XX_SEC_SIZE 0x10000 /* * PIC definitions |
