Make MPC85xx LAW handling and reset routines aware of the MPC8548 variant.

Inspired by discussion with Alexey V Fedorov on freebsd-powerpc@.

3 files changed, 8 insertions, 15 deletions

diff --git a/sys/powerpc/mpc85xx/mpc85xx.c b/sys/powerpc/mpc85xx/mpc85xx.c
index de9c771..b6de50d 100644
--- a/sys/powerpc/mpc85xx/mpc85xx.c
+++ b/sys/powerpc/mpc85xx/mpc85xx.c
@@ -61,7 +61,7 @@ ccsr_write4(uintptr_t addr, uint32_t val)
 	__asm __volatile("eieio; sync");
 }
 
-static __inline int
+int
 law_getmax(void)
 {
 	uint32_t ver;
@@ -69,6 +69,8 @@ law_getmax(void)
 	ver = SVR_VER(mfspr(SPR_SVR));
 	if (ver == SVR_MPC8572E || ver == SVR_MPC8572)
 		return (12);
+	else if (ver == SVR_MPC8548E || ver == SVR_MPC8548)
+		return (10);
 	else
 		return (8);
 }
@@ -132,7 +134,8 @@ cpu_reset(void)
 {
 	uint32_t ver = SVR_VER(mfspr(SPR_SVR));
 
-	if (ver == SVR_MPC8572E || ver == SVR_MPC8572)
+	if (ver == SVR_MPC8572E || ver == SVR_MPC8572 ||
+	    ver == SVR_MPC8548E || ver == SVR_MPC8548)
 		/* Systems with dedicated reset register */
 		ccsr_write4(OCP85XX_RSTCR, 2);
 	else {
diff --git a/sys/powerpc/mpc85xx/mpc85xx.h b/sys/powerpc/mpc85xx/mpc85xx.h
index 4d31b58..e558489 100644
--- a/sys/powerpc/mpc85xx/mpc85xx.h
+++ b/sys/powerpc/mpc85xx/mpc85xx.h
@@ -33,5 +33,6 @@ uint32_t ccsr_read4(uintptr_t addr);
 void ccsr_write4(uintptr_t addr, uint32_t val);
 int law_enable(int trgt, u_long addr, u_long size);
 int law_disable(int trgt, u_long addr, u_long size);
+int law_getmax(void);
 
 #endif /* _MPC85XX_H_ */
diff --git a/sys/powerpc/mpc85xx/ocpbus.c b/sys/powerpc/mpc85xx/ocpbus.c
index ae56fb0..ddc2e74 100644
--- a/sys/powerpc/mpc85xx/ocpbus.c
+++ b/sys/powerpc/mpc85xx/ocpbus.c
@@ -114,8 +114,6 @@ devclass_t ocpbus_devclass;
 
 DRIVER_MODULE(ocpbus, nexus, ocpbus_driver, ocpbus_devclass, 0, 0);
 
-static int law_max = 0;
-
 static device_t
 ocpbus_mk_child(device_t dev, int type, int unit)
 {
@@ -189,16 +187,6 @@ ocpbus_write_law(int trgt, int type, u_long *startp, u_long *countp)
 static int
 ocpbus_probe(device_t dev)
 {
-	struct ocpbus_softc *sc;
-	uint32_t ver;
-
-	sc = device_get_softc(dev);
-
-	ver = SVR_VER(mfspr(SPR_SVR));
-	if (ver == SVR_MPC8572E || ver == SVR_MPC8572)
-		law_max = 12;
-	else
-		law_max = 8;
 
 	device_set_desc(dev, "On-Chip Peripherals bus");
 	return (BUS_PROBE_DEFAULT);
@@ -208,7 +196,7 @@ static int
 ocpbus_attach(device_t dev)
 {
 	struct ocpbus_softc *sc;
-	int error, i, tgt;
+	int error, i, tgt, law_max;
 	uint32_t sr;
 	u_long start, end;
 
@@ -261,6 +249,7 @@ ocpbus_attach(device_t dev)
 	 * Clear local access windows. Skip DRAM entries, so we don't shoot
 	 * ourselves in the foot.
 	 */
+	law_max = law_getmax();
 	for (i = 0; i < law_max; i++) {
 		sr = ccsr_read4(OCP85XX_LAWSR(i));
 		if ((sr & 0x80000000) == 0)