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| author | jhibbits <jhibbits@FreeBSD.org> | 2016-04-19 01:48:18 +0000 |
|---|---|---|
| committer | jhibbits <jhibbits@FreeBSD.org> | 2016-04-19 01:48:18 +0000 |
| commit | 01ad9aa4bf25709f5ef398b5e9d665f373d42ea7 (patch) | |
| tree | 2ace8ab57d0635a9f76fa7c28f3a24584de191a5 /sys/powerpc/include | |
| parent | 01b939b5430497c798bf0a9da3f7d030fd48aacb (diff) | |
| download | FreeBSD-src-01ad9aa4bf25709f5ef398b5e9d665f373d42ea7.zip FreeBSD-src-01ad9aa4bf25709f5ef398b5e9d665f373d42ea7.tar.gz | |
Fix SMP booting for PowerPC Book-E
Summary:
PowerPC Book-E SMP is currently broken for unknown reasons. Pull in
Semihalf changes made c2012 for e500mc/e5500, which enables booting SMP.
This eliminates the shared software TLB1 table, replacing it with
tlb1_read_entry() function.
This does not yet support ePAPR SMP booting, and doesn't handle resetting CPUs
already released (ePAPR boot releases APs to a spin loop waiting on a specific
address). This will be addressed in the near future by using the MPIC to reset
the AP into our own alternate boot address.
This does include a change to the dpaa/dtsec(4) driver, to mark the portals as
CPU-private.
Test Plan:
Tested on Amiga X5000/20 (P5020). Boots, prints the following
messages:
Adding CPU 0, pir=0, awake=1
Waking up CPU 1 (dev=1)
Adding CPU 1, pir=20, awake=1
SMP: AP CPU #1 launched
top(1) shows CPU1 active.
Obtained from: Semihalf
Relnotes: Yes
Differential Revision: https://reviews.freebsd.org/D5945
Diffstat (limited to 'sys/powerpc/include')
| -rw-r--r-- | sys/powerpc/include/tlb.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/sys/powerpc/include/tlb.h b/sys/powerpc/include/tlb.h index 65293bf..83bcf5c 100644 --- a/sys/powerpc/include/tlb.h +++ b/sys/powerpc/include/tlb.h @@ -74,7 +74,7 @@ #define MAS2_M 0x00000004 #define MAS2_G 0x00000002 #define MAS2_E 0x00000001 -#define MAS2_WIMGE_MASK 0x0000001F +#define MAS2_WIMGE_MASK 0x0000007F #define MAS3_RPN 0xFFFFF000 #define MAS3_RPN_SHIFT 12 @@ -120,9 +120,17 @@ */ #define KERNEL_REGION_MAX_TLB_ENTRIES 4 +/* + * Use MAS2_X0 to mark entries which will be copied + * to AP CPUs during SMP bootstrap. As result entries + * marked with _TLB_ENTRY_SHARED will be shared by all CPUs. + */ +#define _TLB_ENTRY_SHARED (MAS2_X0) /* XXX under SMP? */ #define _TLB_ENTRY_IO (MAS2_I | MAS2_G) #define _TLB_ENTRY_MEM (MAS2_M) +#define TLB1_MAX_ENTRIES 64 + #if !defined(LOCORE) typedef struct tlb_entry { vm_paddr_t phys; @@ -211,6 +219,7 @@ struct pmap; void tlb_lock(uint32_t *); void tlb_unlock(uint32_t *); +void tlb1_ap_prep(void); int tlb1_set_entry(vm_offset_t, vm_paddr_t, vm_size_t, uint32_t); #endif /* !LOCORE */ |
