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authorjhibbits <jhibbits@FreeBSD.org>2015-12-11 01:23:18 +0000
committerjhibbits <jhibbits@FreeBSD.org>2015-12-11 01:23:18 +0000
commitf6deaeefad36c7c5885f4d5ab53f349729e139c3 (patch)
tree2d84496279ef1e5bb77e2ea04f2054f80aba1e88 /sys/powerpc/booke
parentbe0815b50992c6e4322fb1107b9bf75295369d25 (diff)
downloadFreeBSD-src-f6deaeefad36c7c5885f4d5ab53f349729e139c3.zip
FreeBSD-src-f6deaeefad36c7c5885f4d5ab53f349729e139c3.tar.gz
Add more interrupts handled for booke.
e500mc, e5500, and e6500 all use the normal FPU, with the same behavior as AIM hardware. e6500 also supports Altivec, so, although we don't yet have e6500 hardware to test on, add these IVORs as well. Theoretically, since it boots the same as a e5500, it should work, single-threaded, single-core, with full altivec support as of this commit. With this commit, and some other patches to be committed shortly FreeBSD now boots on the P5020, single-core, all the way to user space, and should boot just fine on e500mc. Relnotes: Yes (e500mc, e5500 support) Sponsored by: Alex Perez/Inertial Computing
Diffstat (limited to 'sys/powerpc/booke')
-rw-r--r--sys/powerpc/booke/booke_machdep.c14
-rw-r--r--sys/powerpc/booke/trap_subr.S33
2 files changed, 45 insertions, 2 deletions
diff --git a/sys/powerpc/booke/booke_machdep.c b/sys/powerpc/booke/booke_machdep.c
index 4b831c4..7616686 100644
--- a/sys/powerpc/booke/booke_machdep.c
+++ b/sys/powerpc/booke/booke_machdep.c
@@ -142,7 +142,7 @@ __FBSDID("$FreeBSD$");
#include <dev/fdt/fdt_common.h>
#include <dev/ofw/openfirm.h>
-#ifdef MPC85XX
+#if defined(MPC85XX) || defined(QORIQ_DPAA)
#include <powerpc/mpc85xx/mpc85xx.h>
#endif
@@ -183,6 +183,7 @@ extern void *int_data_storage;
extern void *int_instr_storage;
extern void *int_external_input;
extern void *int_alignment;
+extern void *int_fpu;
extern void *int_program;
extern void *int_syscall;
extern void *int_decrementer;
@@ -191,6 +192,8 @@ extern void *int_watchdog;
extern void *int_data_tlb_error;
extern void *int_inst_tlb_error;
extern void *int_debug;
+extern void *int_vec;
+extern void *int_vecast;
#ifdef HWPMC_HOOKS
extern void *int_performance_counter;
#endif
@@ -234,6 +237,15 @@ ivor_setup(void)
#ifdef HWPMC_HOOKS
SET_TRAP(SPR_IVOR35, int_performance_counter);
#endif
+ switch ((mfpvr() >> 16) & 0xffff) {
+ case FSL_E6500:
+ SET_TRAP(SPR_IVOR32, int_vec);
+ SET_TRAP(SPR_IVOR33, int_vecast);
+ /* FALLTHROUGH */
+ case FSL_E500mc:
+ case FSL_E5500:
+ SET_TRAP(SPR_IVOR7, int_fpu);
+ }
}
static int
diff --git a/sys/powerpc/booke/trap_subr.S b/sys/powerpc/booke/trap_subr.S
index 11ebd30..5f5f1aa 100644
--- a/sys/powerpc/booke/trap_subr.S
+++ b/sys/powerpc/booke/trap_subr.S
@@ -393,12 +393,19 @@
.globl CNAME(interrupt_vector_base)
.align 5
interrupt_vector_base:
+/*****************************************************************************
+ * Catch-all handler to handle uninstalled IVORs
+ ****************************************************************************/
+INTERRUPT(int_unknown)
+ STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1)
+ FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_RSVD)
+ b trap_common
/*****************************************************************************
* Critical input interrupt
****************************************************************************/
INTERRUPT(int_critical_input)
- STANDARD_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1)
+ STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1)
FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_CRIT)
addi %r3, %r1, 8
bl CNAME(powerpc_interrupt)
@@ -459,6 +466,12 @@ INTERRUPT(int_program)
b trap_common
+INTERRUPT(int_fpu)
+ STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1)
+ FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_FPU)
+ b trap_common
+
+
/*****************************************************************************
* System call
****************************************************************************/
@@ -497,6 +510,24 @@ INTERRUPT(int_watchdog)
b trap_common
+/*****************************************************************************
+ * Altivec Unavailable interrupt
+ ****************************************************************************/
+INTERRUPT(int_vec)
+ STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1)
+ FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_VEC)
+ b trap_common
+
+
+/*****************************************************************************
+ * Watchdog interrupt
+ ****************************************************************************/
+INTERRUPT(int_vecast)
+ STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1)
+ FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_VECAST_E)
+ b trap_common
+
+
#ifdef HWPMC_HOOKS
/*****************************************************************************
* PMC Interrupt
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