Get the gdb/psim emulator functioning again.

aim/machdep.c:
  - the	RI status register bit needs to be set when	doing the mtmsrd 64-bit
    instruction	test
  - psim doesn't implement the dcbz instruction	so the run-time	cacheline
    test fails.	Set the	cachline size to 32 to avoid infinite loops in
    future calls to __syncicache()

aim/platform_chrp.c:
  - if after iterating through / and a name property of "cpus" still isn't
    found, just	search directly	for '/cpus'.
  - psim doesn't put a "reg" property on it's cpu nodes, so assume 0
    since it is	uniprocessor-only at this point

powerpc/openpic.c
  - the	number of CPUs reported	is 1 too many on psim's	openpic

Reviewed by:	nwhitehorn
MFC after:	1 week (openpic part)

2 files changed, 26 insertions, 6 deletions

diff --git a/sys/powerpc/aim/machdep.c b/sys/powerpc/aim/machdep.c
index 5d2665a..339e64a 100644
--- a/sys/powerpc/aim/machdep.c
+++ b/sys/powerpc/aim/machdep.c
@@ -359,7 +359,7 @@ powerpc_init(u_int startkernel, u_int endkernel, u_int basekernel, void *mdp)
 	 */
 
 	msr = mfmsr();
-	mtmsr(msr & ~(PSL_IR | PSL_DR));
+	mtmsr((msr & ~(PSL_IR | PSL_DR)) | PSL_RI);
 	isync();
 
 	/*
@@ -380,6 +380,12 @@ powerpc_init(u_int startkernel, u_int endkernel, u_int basekernel, void *mdp)
 	for (cacheline_size = 0; cacheline_size < 0x100 &&
 	    cache_check[cacheline_size] == 0; cacheline_size++);
 
+	/* Work around psim bug */
+	if (cacheline_size == 0) {
+		printf("WARNING: cacheline size undetermined, setting to 32\n");
+		cacheline_size = 32;
+	}
+
 	/*
 	 * Figure out whether we need to use the 64 bit PMAP. This works by
 	 * executing an instruction that is only legal on 64-bit PPC (mtmsrd),
diff --git a/sys/powerpc/aim/platform_chrp.c b/sys/powerpc/aim/platform_chrp.c
index 48c7a91..7a8fe3b 100644
--- a/sys/powerpc/aim/platform_chrp.c
+++ b/sys/powerpc/aim/platform_chrp.c
@@ -102,7 +102,7 @@ static u_long
 chrp_timebase_freq(platform_t plat, struct cpuref *cpuref)
 {
 	phandle_t phandle;
-	u_long ticks = -1;
+	long ticks = -1;
 
 	phandle = cpuref->cr_hwref;
 
@@ -122,8 +122,14 @@ chrp_smp_fill_cpuref(struct cpuref *cpuref, phandle_t cpu)
 
 	cpuref->cr_hwref = cpu;
 	res = OF_getprop(cpu, "reg", &cpuid, sizeof(cpuid));
-	if (res < 0)
-		return (ENOENT);
+
+	/*
+	 * psim doesn't have a reg property, so assume 0 as for the
+	 * uniprocessor case in the CHRP spec. 
+	 */
+	if (res < 0) {
+		cpuid = 0;
+	}
 
 	cpuref->cr_cpuid = cpuid & 0xff;
 	return (0);
@@ -145,10 +151,18 @@ chrp_smp_first_cpu(platform_t plat, struct cpuref *cpuref)
 			break;
 		dev = OF_peer(dev);
 	}
-	if (dev == 0)
-		return (ENOENT);
+	if (dev == 0) {
+		/*
+		 * psim doesn't have a name property on the /cpus node,
+		 * but it can be found directly
+		 */
+		dev = OF_finddevice("/cpus");
+		if (dev == 0)
+			return (ENOENT);
+	}
 
 	cpu = OF_child(dev);
+
 	while (cpu != 0) {
 		res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
 		if (res > 0 && strcmp(buf, "cpu") == 0)