Replace handrolled CRC calculation with ether_crc32_[lb]e().

11 files changed, 36 insertions, 291 deletions

diff --git a/sys/pci/if_dc.c b/sys/pci/if_dc.c
index 851bef8..24cf24a 100644
--- a/sys/pci/if_dc.c
+++ b/sys/pci/if_dc.c
@@ -1023,7 +1023,6 @@ dc_miibus_mediainit(device_t dev)
 		ifmedia_add(ifm, IFM_ETHER | IFM_HPNA_1, 0, NULL);
 }
 
-#define DC_POLY		0xEDB88320
 #define DC_BITS_512	9
 #define DC_BITS_128	7
 #define DC_BITS_64	6
@@ -1032,16 +1031,9 @@ static uint32_t
 dc_mchash_le(struct dc_softc *sc, const uint8_t *addr)
 {
 	uint32_t crc;
-	int idx, bit;
-	uint8_t data;
 
 	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
-			crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
-	}
+	crc = ether_crc32_le(addr, ETHER_ADDR_LEN);
 
 	/*
 	 * The hash table on the PNIC II and the MX98715AEC-C/D/E
@@ -1073,22 +1065,10 @@ dc_mchash_le(struct dc_softc *sc, const uint8_t *addr)
 static uint32_t
 dc_mchash_be(const uint8_t *addr)
 {
-	uint32_t crc, carry;
-	int idx, bit;
-	uint8_t data;
+	uint32_t crc;
 
 	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
-			data >>= 1;
-			crc <<= 1;
-			if (carry)
-				crc = (crc ^ 0x04c11db6) | carry;
-		}
-	}
+	crc = ether_crc32_be(addr, ETHER_ADDR_LEN);
 
 	/* Return the filter bit position. */
 	return ((crc >> 26) & 0x0000003F);
diff --git a/sys/pci/if_de.c b/sys/pci/if_de.c
index c4e184d..a56f1b8 100644
--- a/sys/pci/if_de.c
+++ b/sys/pci/if_de.c
@@ -1992,31 +1992,10 @@ tulip_mii_writereg(
 #endif
 }
 
-#define	tulip_mchash(mca)	(tulip_crc32(mca, 6) & 0x1FF)
+#define	tulip_mchash(mca)	(ether_crc32_le(mca, 6) & 0x1FF)
 #define	tulip_srom_crcok(databuf)	( \
-    ((tulip_crc32(databuf, 126) & 0xFFFFU) ^ 0xFFFFU) == \
+    ((ether_crc32_le(databuf, 126) & 0xFFFFU) ^ 0xFFFFU) == \
      ((databuf)[126] | ((databuf)[127] << 8)))
-
-static unsigned
-tulip_crc32(
-    const unsigned char *databuf,
-    size_t datalen)
-{
-    u_int idx, crc = 0xFFFFFFFFUL;
-    static const u_int crctab[] = {
-	0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac,
-	0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c,
-	0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c,
-	0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
-    };
-
-    for (idx = 0; idx < datalen; idx++) {
-	crc ^= *databuf++;
-	crc = (crc >> 4) ^ crctab[crc & 0xf];
-	crc = (crc >> 4) ^ crctab[crc & 0xf];
-    }
-    return crc;
-}
 
 static void
 tulip_identify_dec_nic(
diff --git a/sys/pci/if_pcn.c b/sys/pci/if_pcn.c
index cc0b999..daf6076 100644
--- a/sys/pci/if_pcn.c
+++ b/sys/pci/if_pcn.c
@@ -137,7 +137,6 @@ static void pcn_miibus_statchg	(device_t);
 
 static void pcn_setfilt		(struct ifnet *);
 static void pcn_setmulti	(struct pcn_softc *);
-static uint32_t pcn_mchash	(const uint8_t *);
 static void pcn_reset		(struct pcn_softc *);
 static int pcn_list_rx_init	(struct pcn_softc *);
 static int pcn_list_tx_init	(struct pcn_softc *);
@@ -307,27 +306,6 @@ pcn_miibus_statchg(dev)
 	return;
 }
 
-#define DC_POLY		0xEDB88320
-
-static u_int32_t
-pcn_mchash(addr)
-	const uint8_t *addr;
-{
-	uint32_t crc;
-	int idx, bit;
-	uint8_t data;
-
-	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
-			crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
-	}
-
-	return ((crc >> 26) & 0x3F);
-}
-
 static void
 pcn_setmulti(sc)
 	struct pcn_softc	*sc;
@@ -356,7 +334,8 @@ pcn_setmulti(sc)
 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 		if (ifma->ifma_addr->sa_family != AF_LINK)
 			continue;
-		h = pcn_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
+		h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
+		    ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
 		hashes[h >> 4] |= 1 << (h & 0xF);
 	}
 
diff --git a/sys/pci/if_rl.c b/sys/pci/if_rl.c
index 849b4c8..a1ec964 100644
--- a/sys/pci/if_rl.c
+++ b/sys/pci/if_rl.c
@@ -207,7 +207,6 @@ static int rl_miibus_readreg	(device_t, int, int);
 static int rl_miibus_writereg	(device_t, int, int, int);
 static void rl_miibus_statchg	(device_t);
 
-static uint32_t rl_mchash	(const uint8_t *);
 static void rl_setmulti		(struct rl_softc *);
 static void rl_reset		(struct rl_softc *);
 static int rl_list_tx_init	(struct rl_softc *);
@@ -734,33 +733,6 @@ rl_miibus_statchg(dev)
 }
 
 /*
- * Calculate CRC of a multicast group address, return the upper 6 bits.
- */
-static u_int32_t
-rl_mchash(addr)
-	const uint8_t *addr;
-{
-	uint32_t crc, carry;
-	int idx, bit;
-	uint8_t data;
-
-	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>=1 ) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
-			crc <<= 1;
-			if (carry)
-				crc = (crc ^ 0x04c11db6) | carry;
-		}
-	}
-
-	/* return the filter bit position */
-	return(crc >> 26);
-}
-
-/*
  * Program the 64-bit multicast hash filter.
  */
 static void
@@ -794,7 +766,8 @@ rl_setmulti(sc)
 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 		if (ifma->ifma_addr->sa_family != AF_LINK)
 			continue;
-		h = rl_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
+		h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
+		    ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
 		if (h < 32)
 			hashes[0] |= (1 << h);
 		else
diff --git a/sys/pci/if_sf.c b/sys/pci/if_sf.c
index c9eb850..4019e61 100644
--- a/sys/pci/if_sf.c
+++ b/sys/pci/if_sf.c
@@ -160,7 +160,6 @@ static int sf_setvlan		(struct sf_softc *, int, u_int32_t);
 #endif
 
 static u_int8_t sf_read_eeprom	(struct sf_softc *, int);
-static uint32_t sf_mchash	(const uint8_t *);
 
 static int sf_miibus_readreg	(device_t, int, int);
 static int sf_miibus_writereg	(device_t, int, int, int);
@@ -259,30 +258,6 @@ csr_write_4(sc, reg, val)
 	return;
 }
 
-static u_int32_t
-sf_mchash(addr)
-	const uint8_t *addr;
-{
-	uint32_t crc, carry;
-	int idx, bit;
-	uint8_t data;
-
-	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
-			crc <<= 1;
-			if (carry)
-				crc = (crc ^ 0x04c11db6) | carry;
-		}
-	}
-
-	/* return the filter bit position */
-	return(crc >> 23 & 0x1FF);
-}
-
 /*
  * Copy the address 'mac' into the perfect RX filter entry at
  * offset 'idx.' The perfect filter only has 16 entries so do
@@ -325,12 +300,12 @@ sf_sethash(sc, mac, prio)
 	caddr_t			mac;
 	int			prio;
 {
-	u_int32_t		h = 0;
+	u_int32_t		h;
 
 	if (mac == NULL)
 		return(EINVAL);
 
-	h = sf_mchash(mac);
+	h = ether_crc32_be(mac, ETHER_ADDR_LEN) >> 23;
 
 	if (prio) {
 		SF_SETBIT(sc, SF_RXFILT_HASH_BASE + SF_RXFILT_HASH_PRIOOFF +
diff --git a/sys/pci/if_sis.c b/sys/pci/if_sis.c
index 332274b..72789f7 100644
--- a/sys/pci/if_sis.c
+++ b/sys/pci/if_sis.c
@@ -842,21 +842,10 @@ sis_mchash(sc, addr)
 	struct sis_softc	*sc;
 	const uint8_t		*addr;
 {
-	uint32_t		crc, carry; 
-	int			idx, bit;
-	uint8_t			data;
+	uint32_t		crc;
 
 	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
-			crc <<= 1;
-			if (carry)
-				crc = (crc ^ 0x04c11db6) | carry;
-		}
-	}
+	crc = ether_crc32_be(addr, ETHER_ADDR_LEN);
 
 	/*
 	 * return the filter bit position
diff --git a/sys/pci/if_sk.c b/sys/pci/if_sk.c
index f33d407..3fe70eb 100644
--- a/sys/pci/if_sk.c
+++ b/sys/pci/if_sk.c
@@ -723,8 +723,6 @@ sk_marv_miibus_statchg(sc_if)
 	return;
 }
 
-#define XMAC_POLY		0xEDB88320
-#define GMAC_POLY		0x04C11DB7L
 #define HASH_BITS		6
 
 static u_int32_t
@@ -732,16 +730,9 @@ sk_xmchash(addr)
 	const uint8_t *addr;
 {
 	uint32_t crc;
-	int idx, bit;
-	uint8_t data;
 
 	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
-			crc = (crc >> 1) ^ (((crc ^ data) & 1) ? XMAC_POLY : 0);
-	}
+	crc = ether_crc32_le(addr, ETHER_ADDR_LEN);
 
 	return (~crc & ((1 << HASH_BITS) - 1));
 }
@@ -751,21 +742,10 @@ static u_int32_t
 sk_gmchash(addr)
 	const uint8_t *addr;
 {
-	uint32_t crc, carry;
-	int idx, bit;
-	uint8_t data;
+	uint32_t crc;
 
 	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
-			crc <<= 1;
-			if (carry)
-				crc = (crc ^ GMAC_POLY) | carry;
-		}
-	}
+	crc = ether_crc32_be(addr, ETHER_ADDR_LEN);
 
 	return (crc & ((1 << HASH_BITS) - 1));
 }
diff --git a/sys/pci/if_ste.c b/sys/pci/if_ste.c
index c1e60d1..4cd92fc 100644
--- a/sys/pci/if_ste.c
+++ b/sys/pci/if_ste.c
@@ -122,7 +122,6 @@ static void ste_miibus_statchg	(device_t);
 static int ste_eeprom_wait	(struct ste_softc *);
 static int ste_read_eeprom	(struct ste_softc *, caddr_t, int, int, int);
 static void ste_wait		(struct ste_softc *);
-static u_int8_t ste_calchash	(caddr_t);
 static void ste_setmulti	(struct ste_softc *);
 static int ste_init_rx_list	(struct ste_softc *);
 static void ste_init_tx_list	(struct ste_softc *);
@@ -560,33 +559,6 @@ ste_read_eeprom(sc, dest, off, cnt, swap)
 	return(err ? 1 : 0);
 }
 
-static u_int8_t
-ste_calchash(addr)
-	caddr_t			addr;
-{
-
-	u_int32_t		crc, carry;
-	int			i, j;
-	u_int8_t		c;
-
-	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (i = 0; i < 6; i++) {
-		c = *(addr + i);
-		for (j = 0; j < 8; j++) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01);
-			crc <<= 1;
-			c >>= 1;
-			if (carry)
-				crc = (crc ^ 0x04c11db6) | carry;
-		}
-	}
-
-	/* return the filter bit position */
-	return(crc & 0x0000003F);
-}
-
 static void
 ste_setmulti(sc)
 	struct ste_softc	*sc;
@@ -613,7 +585,8 @@ ste_setmulti(sc)
 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 		if (ifma->ifma_addr->sa_family != AF_LINK)
 			continue;
-		h = ste_calchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
+		h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
+		    ifma->ifma_addr), ETHER_ADDR_LEN) & 0x3F;
 		if (h < 32)
 			hashes[0] |= (1 << h);
 		else
diff --git a/sys/pci/if_vr.c b/sys/pci/if_vr.c
index 9566c6d..8604ff2 100644
--- a/sys/pci/if_vr.c
+++ b/sys/pci/if_vr.c
@@ -160,7 +160,6 @@ static int vr_miibus_writereg	(device_t, int, int, int);
 static void vr_miibus_statchg	(device_t);
 
 static void vr_setcfg		(struct vr_softc *, int);
-static uint32_t vr_mchash	(const uint8_t *);
 static void vr_setmulti		(struct vr_softc *);
 static void vr_reset		(struct vr_softc *);
 static int vr_list_rx_init	(struct vr_softc *);
@@ -562,33 +561,6 @@ vr_miibus_statchg(dev)
 }
 
 /*
- * Calculate CRC of a multicast group address, return the lower 6 bits.
- */
-static u_int32_t
-vr_mchash(addr)
-	const uint8_t *addr;
-{
-	uint32_t crc, carry;
-	int idx, bit;
-	uint8_t data;
-
-	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
-			crc <<= 1;
-			if (carry)
-				crc = (crc ^ 0x04c11db6) | carry;
-		}
-	}
-
-	/* return the filter bit position */
-	return((crc >> 26) & 0x0000003F);
-}
-
-/*
  * Program the 64-bit multicast hash filter.
  */
 static void
@@ -622,7 +594,8 @@ vr_setmulti(sc)
 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 		if (ifma->ifma_addr->sa_family != AF_LINK)
 			continue;
-		h = vr_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
+		h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
+		    ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
 		if (h < 32)
 			hashes[0] |= (1 << h);
 		else
diff --git a/sys/pci/if_wb.c b/sys/pci/if_wb.c
index 772a527..2842f88 100644
--- a/sys/pci/if_wb.c
+++ b/sys/pci/if_wb.c
@@ -175,7 +175,6 @@ static int wb_mii_readreg	(struct wb_softc *, struct wb_mii_frame *);
 static int wb_mii_writereg	(struct wb_softc *, struct wb_mii_frame *);
 
 static void wb_setcfg		(struct wb_softc *, u_int32_t);
-static uint32_t wb_mchash	(const uint8_t *);
 static void wb_setmulti		(struct wb_softc *);
 static void wb_reset		(struct wb_softc *);
 static void wb_fixmedia		(struct wb_softc *);
@@ -587,36 +586,6 @@ wb_miibus_statchg(dev)
 	return;
 }
 
-static u_int32_t
-wb_mchash(addr)
-	const uint8_t *addr;
-{
-	uint32_t crc, carry;
-	int idx, bit;
-	uint8_t data;
-
-	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
-			crc <<= 1;
-			if (carry)
-				crc = (crc ^ 0x04c11db6) | carry;
-		}
-	}
-
-	/*
-	 * return the filter bit position
-	 * Note: I arrived at the following nonsense
-	 * through experimentation. It's not the usual way to
-	 * generate the bit position but it's the only thing
-	 * I could come up with that works.
-	 */
-	return(~(crc >> 26) & 0x0000003F);
-}
-
 /*
  * Program the 64-bit multicast hash filter.
  */
@@ -651,7 +620,8 @@ wb_setmulti(sc)
 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 		if (ifma->ifma_addr->sa_family != AF_LINK)
 			continue;
-		h = wb_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
+		h = ~ether_crc32_be(LLADDR((struct sockaddr_dl *)
+		    ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
 		if (h < 32)
 			hashes[0] |= (1 << h);
 		else
diff --git a/sys/pci/if_xl.c b/sys/pci/if_xl.c
index 5533770..8ce0ee9 100644
--- a/sys/pci/if_xl.c
+++ b/sys/pci/if_xl.c
@@ -253,7 +253,6 @@ static int xl_mii_writereg	(struct xl_softc *, struct xl_mii_frame *);
 
 static void xl_setcfg		(struct xl_softc *);
 static void xl_setmode		(struct xl_softc *, int);
-static uint32_t xl_mchash	(const uint8_t *);
 static void xl_setmulti		(struct xl_softc *);
 static void xl_setmulti_hash	(struct xl_softc *);
 static void xl_reset		(struct xl_softc *);
@@ -812,44 +811,6 @@ xl_read_eeprom(sc, dest, off, cnt, swap)
 }
 
 /*
- * This routine is taken from the 3Com Etherlink XL manual,
- * page 10-7. It calculates a CRC of the supplied multicast
- * group address and returns the lower 8 bits, which are used
- * as the multicast filter position.
- * Note: the 3c905B currently only supports a 64-bit hash table,
- * which means we really only need 6 bits, but the manual indicates
- * that future chip revisions will have a 256-bit hash table,
- * hence the routine is set up to calculate 8 bits of position
- * info in case we need it some day.
- * Note II, The Sequel: _CURRENT_ versions of the 3c905B have a
- * 256 bit hash table. This means we have to use all 8 bits regardless.
- * On older cards, the upper 2 bits will be ignored. Grrrr....
- */
-static u_int32_t
-xl_mchash(addr)
-	const uint8_t *addr;
-{
-	uint32_t crc, carry;
-	int idx, bit;
-	uint8_t data;
-
-	/* Compute CRC for the address value. */
-	crc = 0xFFFFFFFF; /* initial value */
-
-	for (idx = 0; idx < 6; idx++) {
-		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
-			carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
-			crc <<= 1;
-			if (carry)
-				crc = (crc ^ 0x04c11db6) | carry;
-		}
-	}
-
-	/* return the filter bit position */
-	return(crc & 0x000000FF);
-}
-
-/*
  * NICs older than the 3c905B have only one multicast option, which
  * is to enable reception of all multicast frames.
  */
@@ -920,7 +881,20 @@ xl_setmulti_hash(sc)
 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
 		if (ifma->ifma_addr->sa_family != AF_LINK)
 			continue;
-		h = xl_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
+		/*
+		 * Note: the 3c905B currently only supports a 64-bit hash
+		 * table, which means we really only need 6 bits, but the
+		 * manual indicates that future chip revisions will have a
+		 * 256-bit hash table, hence the routine is set up to
+		 * calculate 8 bits of position info in case we need it some
+		 * day.
+		 * Note II, The Sequel: _CURRENT_ versions of the 3c905B have
+		 * a 256 bit hash table. This means we have to use all 8 bits
+		 * regardless. On older cards, the upper 2 bits will be
+		 * ignored. Grrrr....
+ 		 */
+		h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
+		    ifma->ifma_addr), ETHER_ADDR_LEN) & 0xFF;
 		CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_HASH|XL_HASH_SET|h);
 		mcnt++;
 	}