diff options
author | wpaul <wpaul@FreeBSD.org> | 1999-08-21 19:03:37 +0000 |
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committer | wpaul <wpaul@FreeBSD.org> | 1999-08-21 19:03:37 +0000 |
commit | fd0cc141860436bb7dd37eaf16c3c11c3a798f9b (patch) | |
tree | c042e7543662929753d22938bc2f2a51a65dfc05 /sys/pci/if_stereg.h | |
parent | e3f950dd51d510594fc21ab5677709af55f73425 (diff) | |
download | FreeBSD-src-fd0cc141860436bb7dd37eaf16c3c11c3a798f9b.zip FreeBSD-src-fd0cc141860436bb7dd37eaf16c3c11c3a798f9b.tar.gz |
Remove MII/PHY related junk from here. It's not needed anymore.
Diffstat (limited to 'sys/pci/if_stereg.h')
-rw-r--r-- | sys/pci/if_stereg.h | 107 |
1 files changed, 1 insertions, 106 deletions
diff --git a/sys/pci/if_stereg.h b/sys/pci/if_stereg.h index f602421..78bc215 100644 --- a/sys/pci/if_stereg.h +++ b/sys/pci/if_stereg.h @@ -29,7 +29,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. * - * $Id: if_stereg.h,v 1.2 1999/08/20 05:13:47 wpaul Exp $ + * $Id: if_stereg.h,v 1.1 1999/08/21 18:34:45 wpaul Exp $ */ /* @@ -528,111 +528,6 @@ struct ste_mii_frame { #define STE_MII_WRITEOP 0x01 #define STE_MII_TURNAROUND 0x02 -#define STE_FLAG_FORCEDELAY 1 -#define STE_FLAG_SCHEDDELAY 2 -#define STE_FLAG_DELAYTIMEO 3 - -#define PHY_UNKNOWN 6 - -#define STE_PHYADDR_MIN 0x00 -#define STE_PHYADDR_MAX 0x1F - -#define STE_PHY_GENCTL 0x00 -#define STE_PHY_GENSTS 0x01 -#define STE_PHY_VENID 0x02 -#define STE_PHY_DEVID 0x03 -#define STE_PHY_ANAR 0x04 -#define STE_PHY_LPAR 0x05 -#define STE_PHY_ANEXP 0x06 - -#define PHY_ANAR_NEXTPAGE 0x8000 -#define PHY_ANAR_RSVD0 0x4000 -#define PHY_ANAR_TLRFLT 0x2000 -#define PHY_ANAR_RSVD1 0x1000 -#define PHY_ANAR_RSVD2 0x0800 -#define PHY_ANAR_RSVD3 0x0400 -#define PHY_ANAR_100BT4 0x0200 -#define PHY_ANAR_100BTXFULL 0x0100 -#define PHY_ANAR_100BTXHALF 0x0080 -#define PHY_ANAR_10BTFULL 0x0040 -#define PHY_ANAR_10BTHALF 0x0020 -#define PHY_ANAR_PROTO4 0x0010 -#define PHY_ANAR_PROTO3 0x0008 -#define PHY_ANAR_PROTO2 0x0004 -#define PHY_ANAR_PROTO1 0x0002 -#define PHY_ANAR_PROTO0 0x0001 - -/* - * These are the register definitions for the PHY (physical layer - * interface chip). - */ -/* - * PHY BMCR Basic Mode Control Register - */ -#define PHY_BMCR 0x00 -#define PHY_BMCR_RESET 0x8000 -#define PHY_BMCR_LOOPBK 0x4000 -#define PHY_BMCR_SPEEDSEL 0x2000 -#define PHY_BMCR_AUTONEGENBL 0x1000 -#define PHY_BMCR_RSVD0 0x0800 /* write as zero */ -#define PHY_BMCR_ISOLATE 0x0400 -#define PHY_BMCR_AUTONEGRSTR 0x0200 -#define PHY_BMCR_DUPLEX 0x0100 -#define PHY_BMCR_COLLTEST 0x0080 -#define PHY_BMCR_RSVD1 0x0040 /* write as zero, don't care */ -#define PHY_BMCR_RSVD2 0x0020 /* write as zero, don't care */ -#define PHY_BMCR_RSVD3 0x0010 /* write as zero, don't care */ -#define PHY_BMCR_RSVD4 0x0008 /* write as zero, don't care */ -#define PHY_BMCR_RSVD5 0x0004 /* write as zero, don't care */ -#define PHY_BMCR_RSVD6 0x0002 /* write as zero, don't care */ -#define PHY_BMCR_RSVD7 0x0001 /* write as zero, don't care */ -/* - * RESET: 1 == software reset, 0 == normal operation - * Resets status and control registers to default values. - * Relatches all hardware config values. - * - * LOOPBK: 1 == loopback operation enabled, 0 == normal operation - * - * SPEEDSEL: 1 == 100Mb/s, 0 == 10Mb/s - * Link speed is selected byt his bit or if auto-negotiation if bit - * 12 (AUTONEGENBL) is set (in which case the value of this register - * is ignored). - * - * AUTONEGENBL: 1 == Autonegotiation enabled, 0 == Autonegotiation disabled - * Bits 8 and 13 are ignored when autoneg is set, otherwise bits 8 and 13 - * determine speed and mode. Should be cleared and then set if PHY configured - * for no autoneg on startup. - * - * ISOLATE: 1 == isolate PHY from MII, 0 == normal operation - * - * AUTONEGRSTR: 1 == restart autonegotiation, 0 = normal operation - * - * DUPLEX: 1 == full duplex mode, 0 == half duplex mode - * - * COLLTEST: 1 == collision test enabled, 0 == normal operation - */ - -/* - * PHY, BMSR Basic Mode Status Register - */ -#define PHY_BMSR 0x01 -#define PHY_BMSR_100BT4 0x8000 -#define PHY_BMSR_100BTXFULL 0x4000 -#define PHY_BMSR_100BTXHALF 0x2000 -#define PHY_BMSR_10BTFULL 0x1000 -#define PHY_BMSR_10BTHALF 0x0800 -#define PHY_BMSR_RSVD1 0x0400 /* write as zero, don't care */ -#define PHY_BMSR_RSVD2 0x0200 /* write as zero, don't care */ -#define PHY_BMSR_RSVD3 0x0100 /* write as zero, don't care */ -#define PHY_BMSR_RSVD4 0x0080 /* write as zero, don't care */ -#define PHY_BMSR_MFPRESUP 0x0040 -#define PHY_BMSR_AUTONEGCOMP 0x0020 -#define PHY_BMSR_REMFAULT 0x0010 -#define PHY_BMSR_CANAUTONEG 0x0008 -#define PHY_BMSR_LINKSTAT 0x0004 -#define PHY_BMSR_JABBER 0x0002 -#define PHY_BMSR_EXTENDED 0x0001 - #ifdef __alpha__ #undef vtophys #define vtophys(va) (pmap_kextract(((vm_offset_t) (va))) \ |