- Import the common MII bitbang'ing code from NetBSD and convert drivers to

  take advantage of it instead of duplicating it. This reduces the size of
  the i386 GENERIC kernel by about 4k. The only potential in-tree user left
  unconverted is xe(4), which generally should be changed to use miibus(4)
  instead of implementing PHY handling on its own, as otherwise it makes not
  much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just
  for the MII bitbang'ing code. The common MII bitbang'ing code also is
  useful in the embedded space for using GPIO pins to implement MII access.
- Based on lessons learnt with dc(4) (see r185750), add bus barriers to the
  MII bitbang read and write functions of the other drivers converted in
  order to ensure the intended ordering. Given that register access via an
  index register as well as register bank/window switching is subject to the
  same problem, also add bus barriers to the respective functions of smc(4),
  tl(4) and xl(4).
- Sprinkle some const.

Thanks to the following testers:
Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4))
Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4).

Reviewed by:	yongari (subset of drivers)
Obtained from:	NetBSD (partially)

1 files changed, 6 insertions, 20 deletions

diff --git a/sys/pci/if_rlreg.h b/sys/pci/if_rlreg.h
index 3a9da2e..6e7c0c1 100644
--- a/sys/pci/if_rlreg.h
+++ b/sys/pci/if_rlreg.h
@@ -597,33 +597,16 @@ struct rl_type {
 	uint16_t		rl_vid;
 	uint16_t		rl_did;
 	int			rl_basetype;
-	char			*rl_name;
+	const char		*rl_name;
 };
 
 struct rl_hwrev {
 	uint32_t		rl_rev;
 	int			rl_type;
-	char			*rl_desc;
+	const char		*rl_desc;
 	int			rl_max_mtu;
 };
 
-struct rl_mii_frame {
-	uint8_t		mii_stdelim;
-	uint8_t		mii_opcode;
-	uint8_t		mii_phyaddr;
-	uint8_t		mii_regaddr;
-	uint8_t		mii_turnaround;
-	uint16_t	mii_data;
-};
-
-/*
- * MII constants
- */
-#define	RL_MII_STARTDELIM	0x01
-#define	RL_MII_READOP		0x02
-#define	RL_MII_WRITEOP		0x01
-#define	RL_MII_TURNAROUND	0x02
-
 #define	RL_8129			1
 #define	RL_8139			2
 #define	RL_8139CPLUS		3
@@ -880,7 +863,7 @@ struct rl_softc {
 	device_t		rl_miibus;
 	bus_dma_tag_t		rl_parent_tag;
 	uint8_t			rl_type;
-	struct rl_hwrev		*rl_hwrev;
+	const struct rl_hwrev	*rl_hwrev;
 	int			rl_eecmd_read;
 	int			rl_eewidth;
 	int			rl_txthresh;
@@ -950,6 +933,9 @@ struct rl_softc {
 #define	CSR_READ_1(sc, reg)		\
 	bus_space_read_1(sc->rl_btag, sc->rl_bhandle, reg)
 
+#define	CSR_BARRIER(sc, reg, length, flags)				\
+	bus_space_barrier(sc->rl_btag, sc->rl_bhandle, reg, length, flags)
+
 #define	CSR_SETBIT_1(sc, offset, val)		\
 	CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) | (val))